CN106159044B - LED chip structure and preparation method thereof - Google Patents
LED chip structure and preparation method thereof Download PDFInfo
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- CN106159044B CN106159044B CN201510152736.5A CN201510152736A CN106159044B CN 106159044 B CN106159044 B CN 106159044B CN 201510152736 A CN201510152736 A CN 201510152736A CN 106159044 B CN106159044 B CN 106159044B
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Abstract
A kind of LED chip structure of present invention offer and preparation method thereof, wherein production method includes：It includes positive, the back side the substrate to provide；Sequentially form n type semiconductor layer, active layer and p type semiconductor layer；Form N electrode, P electrode；Form the buffer layer that refractive index is less than the refractive index of substrate.LED chip structure includes：Substrate, n type semiconductor layer, active layer and p type semiconductor layer；The N electrode being electrically connected with n type semiconductor layer and the P electrode being electrically connected with p type semiconductor layer；It is formed in the buffer layer of substrate back, the refractive index of buffer layer is less than the refractive index of substrate.The beneficial effects of the present invention are, increase the buffer layer that refractive index is less than substrate, reduce the probability of the issuable total reflection of light transmitted from substrate, the probability that light is totally reflected in substrate surface can be reduced in this way, increase the transmissivity of light, and then promotes the brightness of LED chip structure.
Description
Technical field
The present invention relates to LED manufacture technology fields, and in particular to a kind of LED chip structure and preparation method thereof.
Background technology
Light emitting diode (Light Emitting Diode, LED) is a kind of semiconductor solid-state luminescent device, utilizes half
Conductor PN junction electroluminescent principle is made.LED component have cut-in voltage is low, small, response is fast, stability is good, long lifespan,
The good photoelectric properties such as pollution-free, therefore have more and more extensively in fields such as outdoor room lighting, backlight, display, traffic instructions
General application.
In general LED chip structure is divided into horizontal structure (positive cartridge chip), vertical structure (thin-film LED) and falls
Assembling structure (flip-chip) three types；Wherein, the P in inverted structure LED chip, N electrode are respectively positioned on luminous zone the same side,
The light that active layer in LED chip structure is sent out mainly is escaped by transparent sapphire layer, and such LED chip shines
It is more efficient.
But even if existing LED chip structure is changed to above-mentioned inverted structure, luminous efficiency or not ideal enough.
Therefore, the luminous efficiency for how further promoting LED chip structure, it is urgently to be resolved hurrily to become those skilled in the art
One of technical problem.
Invention content
Problems solved by the invention is to provide a kind of LED chip structure and preparation method thereof, to promote LED chip knot as possible
The luminous efficiency of structure.
To solve the above problems, the present invention provides a kind of production method of LED chip structure, including：
Substrate is provided, the substrate is including a front and relative to the positive back side；
N type semiconductor layer, active layer and p type semiconductor layer are sequentially formed in the front of the substrate；
Form the N electrode being electrically connected with the n type semiconductor layer；
Form the P electrode being electrically connected with the p type semiconductor layer；
A buffer layer is formed at the back side of the substrate, and the refractive index of the buffer layer is less than the refractive index of the substrate.
Optionally, the step of providing substrate includes the substrate for providing sapphire material.
Optionally, after the step of forming p type semiconductor layer, form N electrode and the step of P electrode before, the making
Method further includes：
The opening of exposed portion n type semiconductor layer is formed in the p type semiconductor layer and the active layer；
The transparency conducting layer that work function is more than the p type semiconductor layer is formed on the p type semiconductor layer；
Formed P electrode the step of include：The P that work function is more than the transparency conducting layer is formed on the transparency conducting layer
Electrode；
Formed N electrode the step of include：The N electrode is formed on n type semiconductor layer in said opening.
Optionally, form N electrode and the step of P electrode after, before the step of forming buffer layer, the production method is also
Including：
The section substrate material for removing substrate back, the substrate is thinned.
Optionally, the step of organic semiconductor device includes, by the substrate thinning, make the thickness of LED chip structure 100~
In the range of 250 microns.
Optionally, the step of organic semiconductor device includes the part lining that substrate back is removed by the way of grinding or etching
Bottom material.
Optionally, the step of organic semiconductor device further includes：After the substrate is thinned, the back side of the substrate is thrown
Light processing.
Optionally, the step of being processed by shot blasting to substrate back include：To described by the way of chemically mechanical polishing
The back side of substrate is polished.
Optionally, buffer layer of the thickness range at 100~5000 angstroms is formed.
Optionally, the buffer layer of single layer or multilayered structure is formed.
Optionally, SiON or SiO is formed2The buffer layer of the single layer structure of material, alternatively, being formed by SiON and SiO2Material
The buffer layer of the multilayered structure collectively formed.
Optionally, the step of buffer layer for forming multilayered structure includes：
The first buffer layer that refractive index is less than the refractive index of substrate is formed at the back side of the substrate；
The second buffer layer that refractive index is less than the first buffer layer refractive index is formed in the first buffer layer.
Optionally, the mode of using plasma enhancing chemical vapor deposition forms the buffer layer.
In addition, the present invention also provides a kind of LED chip structures, including：
Substrate, the substrate include a front and opposite with the positive back side；
It is formed in the n type semiconductor layer of the substrate face；
The active layer being formed on the n type semiconductor layer；
The p type semiconductor layer being formed on the active layer；
The N electrode being electrically connected with the n type semiconductor layer and the P electrode being electrically connected with the p type semiconductor layer；
It is formed in the buffer layer of the substrate back, the refractive index of the buffer layer is less than the refractive index of the substrate.
Optionally, the substrate is Sapphire Substrate.
Optionally, the material of the buffer layer is SiON or SiO2, alternatively, the material of the buffer layer is by SiON and SiO2
It collectively forms.
Optionally, the thickness of the substrate is in the range of 100~250 microns.
Optionally, the buffer layer is single layer structure or multilayered structure.
Optionally, the buffer layer includes being formed in the substrate back, and refractive index is less than the refractive index of substrate
First buffer layer, and be formed in the first buffer layer, refractive index is less than the second buffer layer of first buffer layer.
Compared with prior art, technical scheme of the present invention has the following advantages：
N type semiconductor layer, active layer and p type semiconductor layer are sequentially formed in the substrate face of LED chip structure, then shape
At the N electrode being electrically connected with the n type semiconductor layer, and the P electrode that is electrically connected with the p type semiconductor layer, that is to say, that
The LED chip structure that the present invention is formed is inverted structure, and the light that the active layer is sent out will be gone out by substrate transmission.This it
Afterwards, (one side for not forming all parts of LED chip structure namely) forms buffer layer at the back side of the substrate, and makes
The refractive index of the buffer layer is less than the refractive index of the substrate.It is such to be advantageous in that, it reduces between substrate and air
The size of the difference of refractive index, because the refractive index of air is about 1, and the refractive index of general solid is all higher than the refraction of air
Rate may cause the light projected from substrate to be formed entirely in substrate surface if the refractive index of substrate and air is larger
Angle of reflection causes to be reflected back toward in substrate from the light transmitted in substrate, this is unfavorable for increasing LED chip structure
Brightness.And the present invention increase between substrate and air refractive index be less than substrate buffer layer, can efficiently reduce substrate with
The difference of refractive index between air, so reduce from the light transmitted in substrate because between different medium refractive index it is excessive
And there may be the probabilities of total reflection problem, can reduce the probability that light is totally reflected in substrate surface in this way, increase light
The transmissivity of line, and then promote the brightness of LED chip structure.
Description of the drawings
Fig. 1 is light path schematic diagram when LED chip structure in the prior art shines；
Fig. 2 to Figure 16 be LED chip structure of the present invention one embodiment of production method in each step structural schematic diagram.
Specific implementation mode
At work, the light sent out will transmit the LED chip structure of inverted structure in the prior art from substrate
Go out.
But the refractive index of substrate phase compared with the refractive index of air used by LED chip structure in the prior art
Difference is larger, referring to FIG. 1, wherein medium A indicates that the substrate of LED chip structure in the prior art, medium B indicate air, LED
The light a that chip structure generates is transmitted through from substrate in air, and still, light is from the substrate as solid as optically denser medium
Refraction is will produce close in 1 optically thinner medium (light c) is please referred to, when the refractive index of substrate and the folding of air into refractive index
Penetrate rate difference it is larger when, it is easy to cause should enter air light occur total reflection (please refer to light b) and be again introduced into lining
Bottom.
This can influence the light transmittance of LED chip structure to a certain extent, because some light total reflection returns in substrate
Absorption loss occurring, and light also can generate evanescent waves when being totally reflected in reflecting surface, these can all influence the intensity of light,
And then influence the light transmittance of entire LED chip structure.
For this purpose, a kind of LED chip structure of present invention offer and preparation method thereof, the wherein production method of LED chip structure
Include the following steps：
Substrate is provided, the substrate is including a front and relative to the positive back side；In the front of the substrate
Sequentially form n type semiconductor layer, active layer and p type semiconductor layer；Form the N electrode being electrically connected with the n type semiconductor layer；Shape
At the P electrode being electrically connected with the p type semiconductor layer；After the organic semiconductor device the step of, one is formed at the back side of the substrate
Buffer layer, the refractive index of the buffer layer are less than the refractive index of the substrate.
Through the above steps, n type semiconductor layer, active layer and p-type half is sequentially formed in the substrate face of LED chip structure
Then conductor layer forms the N electrode being electrically connected with the n type semiconductor layer, and the P being electrically connected with the p type semiconductor layer
Electrode, that is to say, that the LED chip structure that the present invention is formed is inverted structure, and the light that the active layer is sent out will pass through lining
Bottom transmits.After this, at the back side of the substrate (one side for not forming all parts of LED chip structure namely)
Buffer layer is formed, and makes the refractive index of the buffer layer less than the refractive index of the substrate.It is such to be advantageous in that, reduce lining
The size of the difference of refractive index between bottom and air, because the refractive index of air is about 1, and the refractive index of general solid is big
In the refractive index of air, if the refractive index of substrate and air is larger, the light projected from substrate may be caused to serve as a contrast
Bottom surface forms the angle of total reflection, causes to be reflected back toward in substrate from the light transmitted in substrate, this is unfavorable for increasing
The brightness of LED chip structure.And the present invention increases the buffer layer that refractive index is less than substrate between substrate and air, it can be effective
Ground reduces the difference of refractive index between substrate and air, and then reduces from the light transmitted in substrate because being rolled between different medium
The rate of penetrating has big difference and issuable total reflection problem, can reduce in this way light be totally reflected in substrate surface it is several
Rate increases the transmissivity of light, and then promotes the brightness of LED chip structure.
To make the above purposes, features and advantages of the invention more obvious and understandable, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
It please refers to Fig.2 to Figure 16, is the structural schematic diagram of each step of production method of LED chip structure of the present invention.
Referring first to Fig. 2, substrate 100 is provided；Substrate 100 in the present embodiment is sapphire (Al2O3) substrate, refraction
Rate is about 1.7~1.8.
But the present invention does not limit the material of the substrate 100, material can also be such as spinelle
(MgAl2O4), other substrates such as SiC, ZnS, ZnO or GaAs.
The substrate 100 is including a front 101 and relative to positive 101 back side 102, wherein the front
For forming all parts for constituting LED chip structure in subsequent step.
After this, n type semiconductor layer, active layer and p type semiconductor layer are sequentially formed on the substrate 100.Tool
Body, in embodiment, the n type semiconductor layer is n type gallium nitride layer 110, and the active layer is multiple quantum well layer 120
(MQW), the p type semiconductor layer is p-type gallium nitride layer 130.
Specifically, the n type gallium nitride layer 110, multiple quantum well layer 120 and p-type gallium nitride layer 130 can pass through extension
Technique is sequentially formed on the substrate 100, and the n type gallium nitride layer 110, multiple quantum well layer 120 and p-type gallium nitride layer
130 may be single layer or multilayered structure.
For example, the p-type gallium nitride layer 130 can be the In- for mixing Mg by being sequentially formed on multiple quantum well layer 120
GaN, the P-GaN for mixing Mg and the Al-GaN for mixing Mg are constituted, and the multiple quantum well layer 120 can be handed over by InGaN layer and GaN layer
For the quantum well structure constituted is stacked, the n type gallium nitride layer 110 can be made of the GaN layer for mixing Si.
It should be understood that the material of the n type gallium nitride layer 110, multiple quantum well layer 120 and p-type gallium nitride layer 130
Material and structure are only an example, and the present invention is not limited in any way this.
In the present embodiment, after the step of forming p-type gallium nitride layer 130, in the step for forming N electrode and P electrode
Before rapid, the present embodiment is further comprising the steps of：
Referring to Figure 3, forming exposed portion N-type nitrogen in the p-type gallium nitride layer 130 and multiple quantum well layer 120
Change the opening 131 of gallium layer 110, and then forms the Mesa table tops of LED chip structure.The Mesa table tops are for exposing N-type
Gallium nitride layer 110 is to be subsequently formed the N electrode being electrically connected with n type gallium nitride layer 110.
In the present embodiment, the mode that plasma etching may be used removes part p-type gallium nitride layer material and volume
Sub- well layer material, to form the opening 131.The anisotropy of this etching mode is stronger, and 131 edge of opening of formation is more
Neatly, thus opening size be more prone to control.
Boron trichloride gas and chlorine specifically may be used as plasma etching gas, argon gas is as etching gas
Carrier gas.
It should be understood that being the present invention using etching gas used by dry etching and dry etching
One example, the present invention are not construed as limiting to how to form the opening 131, other etching modes equally may be used such as wet etching
For forming the opening 131.
After this, referring to FIG. 4, forming work function on the p-type gallium nitride layer 130 is more than the p-type gallium nitride
Layer 130 and the transparency conducting layer 140 for being less than the P electrode work function being subsequently formed.That is, the transparency conducting layer 140
Work function advantageously reduces p-type gallium nitride layer in this way between the p-type gallium nitride layer 130 and the P electrode being subsequently formed
Barrier height between 130 and P electrode, and then be conducive to reduce the Ohmic contact between p-type gallium nitride layer 130 and P electrode, this
The working performance of LED chip structure can be improved, such as reduce the operating voltage of LED chip structure.
Transparency conducting layer 140 does not interfere with the P electrode being subsequently formed and p-type gallium nitride due to conductive
Electrical connection between layer 130.
In the present embodiment, can form the transparency conducting layer 140 of tin indium oxide (ITO) material, this material it is transparent
Conductive layer 140 has higher light transmittance, that is to say, that transmitance is relatively high in its visible light wave range, therefore can substantially not
The light that gear Quantum Well is sent out, reduces the loss of light.
Also, include the In-GaN layers for mixing Mg in the p-type gallium nitride layer 130 in the present embodiment, that is to say, that tin indium oxide
The transparency conducting layer 140 of material all has In components with the p-type gallium nitride layer 130, therefore is further conducive to tin indium oxide
Transparency conducting layer 140 and the p-type gallium nitride layer 130 between interpenetrate, advantageously reduce transparency conducting layer 140 in this way
Resistivity, and then electric current when further LED chip structure being helped to work spreads apart on transparency conducting layer 140 and, and reaches electricity
The purpose for flowing extension prevents the generation of electric current congestion phenomenon, increases quantum efficiency, this is further conducive to promote LED chip knot
The working performance of structure.
In addition, the work function size of tin indium oxide is typically in the range of the work function of the p-type gallium nitride layer 130 and is subsequently formed
P electrode work function between, answer this that can reach the barrier height between above-mentioned reduction p-type gallium nitride layer 130 and P electrode
Purpose.
It should be understood that those skilled in the art are understood that 140 specific work function size of transparency conducting layer
Technological parameter when can be formed by adjusting it is adjusted, it is contemplated that the work content of the transparency conducting layer 140 formed
Number is between p-type gallium nitride layer 130 and the P electrode being subsequently formed, so its specific work function size should be according to practical feelings
Condition is adjusted, and this is not limited by the present invention.
In addition, the transparency conducting layer 140 of the indium tin oxide material generally has relatively small resistance sizes, Jin Erbang
The electric current of P electrode is spread apart on transparency conducting layer 140 when LED chip structure being helped to work comes, and is conducive to reach electric current expansion in this way
The purpose of exhibition, and then the generation of electric current congestion phenomenon is prevented, increase quantum efficiency, this is further conducive to promote LED chip knot
The working performance of structure.
But whether the present invention to necessarily being formed the transparency conducting layer 140 of indium tin oxide material and being not construed as limiting, in the present invention
Other embodiment in, other transparent and conductive materials, such as zinc oxide, zinc oxide and indium oxide can also be used
Tin has similar work function, is equally beneficial for reducing the barrier height between p-type gallium nitride layer and the P electrode being subsequently formed,
And then improve the working performance of LED chip structure, reduce the operating voltage of LED chip structure.
In this embodiment, transparency conducting layer 140 of the thickness range within 50~3000 angstroms can be formed.In this thickness model
Transparency conducting layer 140 in enclosing is unlikely to excessively thin and reduces conductive capability (namely resistance being caused to become larger), and is unlikely to blocked up
Cause the absorption to light excessive, light transmittance is caused to reduce.
In the present embodiment, the mode that magnetron sputtering deposition (Sputter) may be used forms the transparency conducting layer
140, this mode is easier to control the transparency conducting layer 140 of formation.But the present invention does not make its generation type
It limits, the other modes such as other formation process such as reaction and plasma deposition (Reactive Plasma Deposition, RPD)
It can be equally used for forming the transparency conducting layer 140.
Fig. 5 and Fig. 6 are please referred to, in the present embodiment, after the step of forming transparency conducting layer 140, forms P electricity
The step of pole and N electrode includes：
Referring first to Fig. 5, forms work function on the surface of the transparency conducting layer 140 and side wall and be more than described transparent lead
The P electrode 151 of electric layer 140.
As it was noted above, transparency conducting layer 140 is separated between the P electrode 151 and p-type gallium nitride layer 130, therefore P electricity
Work function between pole 151 and p-type gallium nitride layer 130 can be reduced, and advantageously reduce LED chip structure in this way
Operating voltage.
Metal material may be used in the present embodiment and form the P electrode 151, the P electrode 151 is as electricity in this way
Also there is certain light reflectivity while pole, can be used for multiple quantum well layer in LED chip structure 120 towards 151 side of P electrode
Substrate 100 is reflexed to the light sent out, and then is conducive to increase the light efficiency of LED chip structure.
In the present embodiment, the P electrode 151 can be made to be formed in surface and the side wall of the transparency conducting layer 140,
It is exactly to be conducive to all coverings of the transparency conducting layer 140 than more comprehensively receiving and reflecting the multiple quantum well layer in this way
120 light sent out towards 151 direction of P electrode.
Specifically, the P electrode 151 of single layer or laminated construction can be formed.
In the present embodiment, the P electrode 151 of laminated construction can be formed, for example, can be in the transparency conducting layer 140
On sequentially form silver layer and titanizing tungsten layer, the silver layer and titanizing tungsten layer collectively form the P electrode of the laminated construction
151。
Specifically, can make the thickness of silver layer in the range of 750~3000 angstroms, the thickness of titanizing tungsten is 100~1000
In the range of angstrom.The P electrode to be formed 151 can be made to be unlikely to excessively thin and reflectivity is caused to reduce in this thickness range, simultaneously
Also it is unlikely to lead to 151 volume that is blocked up and influencing entire LED chip structure of P electrode.But those skilled in the art should
Solution, this numberical range is only an example, and in actual mechanical process, these constitute the thickness of each material layer of P electrode 151
It should be adjusted according to actual conditions.
In addition, whether the present invention must be that silver layer and titanizing tungsten layer do not limit to the P electrode 151 of the laminated construction
It is fixed, in other embodiments of the invention, can also be sequentially formed on the transparency conducting layer 140 silver layer, titanizing tungsten layer with
And platinum layer, the silver layer, titanizing tungsten layer and platinum layer collectively form the P electrode 151 of the laminated construction.Wherein, the silver layer
Thickness in the range of 750~3000 angstroms, for the thickness of titanizing tungsten in the range of 100~1000 angstroms, the thickness of platinum layer can be with
In the range of 100~1000 angstroms.Likewise, above-mentioned thickness parameter is also only an example, the present invention is to P electrode 151
Thickness and laminated construction P electrode 151 in the thickness of each material layer be not limited in any way.
With continued reference to FIG. 6, it is described opening 131 in n type gallium nitride layer 110 on formed N electrode 152.
In the present embodiment, the N electrode 152 should not contact the side wall of the opening 131, that is to say, that be located at opening
There is spacing 1521 between N electrode 152 and 131 side wall that is open in 131.Such be advantageous in that can be to a certain extent
The LED chip structure to be formed is further prevented to leak electricity.
N electrode 152 in the present embodiment can be single layer identical with above-mentioned P electrode or laminated construction, and institute
The material for stating N electrode 152 can be aluminium, and the work function between this material and n type gallium nitride layer 110 is smaller, it is not easy to
Cause gesture between N electrode 152, n type gallium nitride layer 110 because work function difference is larger between N electrode 152, n type gallium nitride layer 110
The operating voltage for building the LED chip structure that height increases and then results in increases.
But the material of the N electrode 152 can also be material identical with above-mentioned P electrode 151, the present invention to this not
It is construed as limiting.
It is not contacted between the P electrode 151 and N electrode 152, it is short-circuit between P electrode 151 and N electrode 152 to prevent.
It should be noted that the step of forming P electrode 151 and N electrode 152 sequence is in no particular order, or can be same
The P electrode 151 and N electrode 152 are formed simultaneously in step.
Referring to FIG. 7, in the present embodiment, after the step of forming the P electrode 151 and N electrode 152, further including
Following steps：
Conductive protecting layer 160 is formed in the P electrode 151.The conductive protecting layer 160 is used for the P electrode to formation
151 are protected, and are conducive to the influence for making P electrode 151 be not readily susceptible to subsequent process steps in this way, and then ensure P electrode
It is smooth and smooth, and then advantageously ensure that the influence of the light reflectivity step of P electrode 151.
The lead of LED chip structure will be made in subsequent step in the present embodiment, lead will be formed in the conduction
160 surface of protective layer.Since conductive protecting layer 160 is conductive, the electricity between lead and P electrode 151 is not interfered with
Connection.
Specifically, the conductive protecting layer 160 in the present embodiment is formed in surface and the side wall of the P electrode 151, also
It is to say 151 all standing of the P electrode, is conducive to more comprehensively protect P electrode 151 in this way.
In the present embodiment, the conductive protecting layer 160 is laminated construction, specifically, the conductive protection of laminated construction
The material of layer 160 can be combination one or more in chromium, platinum, titanium, gold, nickel.
For example, layers of chrome, platinum layer, titanium layer, layer gold and nickel layer can be sequentially formed to constitute the conductive protecting layer 160,
In, platinum layer and titanium layer chemical property are more stable, primarily serve protection P electrode 151, effect；Layers of chrome primarily serves adherency and makees
With, that is to say, that for increasing the adhesiveness between P electrode 151 and conductive protecting layer 160；It is conductive that layer gold and nickel layer play protection
The effect of other materials layer in protective layer 160.
In the present embodiment, the thickness of the layers of chrome is in the range of 20~500 angstroms, the thickness of the platinum layer 200~
In the range of 1000 angstroms；The thickness of the titanium layer is in the range of 200~1000 angstroms；The thickness of the layer gold is 2000~5000
In the range of angstrom, the thickness of the nickel layer is in the range of 200~2000 angstroms.These material layers are in respective thickness parameter range
Inside be conducive to be unlikely to volume that is blocked up and influencing LED chip structure while playing a protective role enough.
In the present embodiment, when forming the conductive protecting layer 160 of laminated construction, nickel layer can be eventually formed, that is,
It says, in the conductive protecting layer 160 of entire laminated construction, nickel layer is located at most surface layer.It is such to be advantageous in that, the material character of nickel
It is relatively stable, it is not easy to be corroded, the surface layer using nickel as the conductive protecting layer 160 of laminated construction is conducive to make conductive protection
Layer 160 is not easy to be affected in other subsequent steps.
But the present invention is not construed as limiting to whether the conductive protecting layer 160 is necessary for multilayered structure, in its of the present invention
In his embodiment, single layer structure can also be, specifically, the material of the conductive protecting layer 160 can be thickness range 200
Titanizing tungsten in the range of~5000 angstroms.For the same reason is conducive to playing protection work enough in this thickness range
With while be unlikely to volume that is blocked up and influencing LED chip structure.
In addition, in the present embodiment, may be used magnetron sputtering deposition or chemical vapor deposition mode formed it is described
Conductive protecting layer 160.But the present invention is not construed as limiting to how to form the conductive protecting layer 160.
Referring to FIG. 8, further including following step after the step of forming conductive protecting layer 160 in the present embodiment
Suddenly：
Insulation protection has been formed on the conductive protecting layer 160, p-type gallium nitride layer 130 and n type gallium nitride layer 110
The insulating medium layer 170 of effect.
In the present embodiment, SiO may be used in the insulating medium layer 1702, SiN SiON materials dielectric
Layer 170.These materials are the insulating dielectric materials for comparing acquisition in process of production.
In the present embodiment, plasma enhanced chemical vapor deposition (Plasma Enhanced may be used
Chemical Vapor Deposition, PECVD) mode form the insulating medium layer 170.This mode is easier
Control, and there is preferable spreadability.But how the present invention is to form the insulating medium layer 170 and be not construed as limiting.
In the present embodiment, insulating medium layer 170 of the thickness range at 5000~20000 angstroms can be formed, in this thickness
Insulating medium layer 170 in range is unlikely to excessively thin and is difficult to play dielectric effect, and is unlikely to blocked up and influences entire
The volume of LED chip structure.But above-mentioned thickness range is only one embodiment, the present invention does not make this any limit
It is fixed.
With continued reference to Fig. 8, after this, the insulating medium layer 170 is etched to form exposed portion conductive protecting layer 160
Hole 171 and exposed portion n type gallium nitride layer 110 hole 172, that is to say, that the position in the hole 171 correspond to P electrode
151, the position in hole 172 corresponds to the N electrode 152 in opening 131, will be formed in the hole 171,172 in subsequent step
Metal lead wire.
In the present embodiment, BOE etching technics (buffer oxide etch) may be used and form the hole 171,172.
As it was noted above, since 160 surface of partially electronically conductive protective layer is nickel layer, when forming hole 171, conductive protecting layer 160
It is not readily susceptible to the influence of the BOE etchings of this step.
Incorporated by reference to reference to figure 9 and in conjunction with reference to figure 10, Figure 10 is the vertical view of structure shown in Fig. 9.In the dielectric
Metal layer 180 is formed on layer 170 and in hole 171,172, wherein the part that the metal layer 180 is located in hole 171,172 is
Metallic conduction post 181,182 (illustrates only part of the metal layer 180 in 171,172) in Fig. 9, metal layer 180 is located at institute
The part for stating 170 surface of insulating medium layer includes pattern 183,184 (please referring to Fig.1 0), wherein pattern 183 is led corresponding to metal
Electric column 181, for being drawn P electrode 151 by the metallic conduction post 181；Similarly, the pattern 184 is led corresponding to metal
Electric column 182, for being drawn the N electrode 152 by above-mentioned metallic conduction post 182.
It should be understood that 180 pattern of metal layer in Figure 10 is only an example, the present invention is to the metal
The pattern which kind of pattern layer 180 forms is not limited in any way.
As it was noted above, conductive protecting layer 160 is conductive, therefore even if metal layer 180 is not in direct contact P electricity
Pole 151 will not influence being electrically connected between lead and P electrode 151.
In the present embodiment, the metal layer 180 of combination one or more in chromium, aluminium, titanium, platinum, gold, nickel can be formed.
Wherein, the thickness of chromium is in the range of 20~50 angstroms, the thickness of aluminium in the range of 750~3000 angstroms, the thickness of titanium 200~
In the range of 1000 angstroms, the thickness of platinum is in the range of 200~1000 angstroms；The thickness of gold is in the range of 2000~5000 angstroms；
The thickness of nickel is in the range of 200~1000 angstroms.
After this, 1 is please referred to Fig.1, forms passivation layer 190 on the insulating medium layer 170 and metal layer 180,
Passivation layer 190 is for the pattern of the metal layer 180 on 170 surfaces to be dielectrically separated from.
In the present embodiment, SiO may be used in the passivation layer 1902, SiN or SiON be as material.
In the present embodiment, passivation layer 190 of the thickness range at 5000~20000 angstroms can be formed, but above-mentioned thickness
It is only one embodiment to spend range, and the present invention is not limited in any way this.
After this, 2 are please referred to Fig.1, etches the passivation layer 190 to expose metallic conduction post 181,182, in order to rear
It is continuous to draw the P electrode 151 being connect respectively with metallic conduction post 181,182, N electrode 152.
Incorporated by reference to reference to figure 13, the extraction electrode 210,220 for corresponding respectively to the metallic conduction post 181,182 is formed,
Since the metallic conduction post 181 is electrically connected with the P electrode 151, the extraction electrode 210 is used for P electrode 151
It draws so as to subsequent encapsulation progress；Similarly, metallic conduction post 182 is electrically connected with N electrode 152, is accordingly used in conduct
Extraction electrode 220 is for drawing N electrode 152.
There should be spacing d1 to prevent short circuit between the extraction electrode 210,220, in the present embodiment, between described
Size away from d1 should be not less than 100 microns.
In the present embodiment, it may be used one or more as extraction electricity in chromium, aluminium, titanium, platinum, gold or tin
The material of pole 210,220.
Specifically, in the present embodiment, can make the thickness of chromium in the range of 20~50 angstroms, the thickness of aluminium 750~
In the range of 3000 angstroms, for the thickness of titanium in the range of 200~1000 angstroms, the thickness of platinum is in the range of 200~1000 angstroms；Gold
Thickness in the range of 2000~5000 angstroms；The thickness of tin is in the range of 200~1000 angstroms.
After this, 4 are please referred to Fig.1, before the step of forming buffer layer, the present embodiment is further comprising the steps of：
The section substrate material for removing 100 back side 102 of substrate, the substrate 100 is thinned.The purpose of this step is to lead to
It crosses organic semiconductor device 100 and reduces volume shared by LED chip structure.
In the present embodiment, the substrate 100 is thinned, makes model of the thickness of LED chip structure at 100~250 microns
In enclosing.But this is an example, in actual mechanical process, is specifically up to substrate 100 and is thinned to which kind of thickness answers root
Depending on actual conditions, this is not limited by the present invention.
Specifically, the mode that grinding may be used in the present embodiment removes the section substrate material at 100 back side 102 of substrate.
This mode efficiency is higher.But the present invention to whether must using grinding by the way of be not construed as limiting, the present invention other realities
It applies in example, section substrate material can also be removed by the way of etching.
In addition, in the present embodiment, after the thinned substrate 100, being thrown to the back side 102 of the substrate 100
Light processing.Polishing treatment is conducive to the back side 102 of the substrate 100 after being smoothly thinned, and is conducive to promote the LED chip formed in this way
The light transmittance of structure.
Specifically, chemically mechanical polishing (Chemical Mechanical Polish, CMP) may be used in the present embodiment
Mode the back side 102 of the substrate 100 is polished.
5 are please referred to Fig.1, after this, buffer layer 230, the buffer layer 230 are formed at the back side of the substrate 100 102
Refractive index be less than the substrate 100 refractive index.Incorporated by reference to reference to shown in figure 16, D indicates that substrate, E indicate buffer layer, F tables
Show that air, light d enter buffer layer from substrate D, light e indicates entry into the refracted light of buffer layer, and dotted line f indicates same incident
The light at angle enters refracted light when air, and light g indicates entry into the refracted light of air.
Because air is that the refractive index of optically thinner medium is about 1, and general solid, such as the substrate 100 of the present invention is light
Close medium, refractive index are more than the refractive index (100 refractive index of Sapphire Substrate in the present embodiment is 1.7~1.8) of air, such as
The refractive index of fruit substrate 100 and air is larger, and the light d projected from substrate 100 may be caused in 100 surface shape of substrate
At the angle of total reflection, the light that should be transmitted from substrate 100 is caused to be reflected back toward in substrate 100, this is unfavorable for increasing LED
The brightness of chip structure.And the present invention increases the buffer layer 230 that refractive index is less than substrate 100, energy between substrate 100 and air
The difference of refractive index between substrate 100 and air is enough efficiently reduced, light d can be reduced in this way and sent out at the interface of different medium
The probability of raw total reflection.The probability that light is totally reflected on 100 surface of substrate can be reduced in this way, increase the transmission of light
Rate, and then promote the brightness of LED chip structure.
As it was noted above, 100 material of substrate in the present embodiment is sapphire, refractive index is about 1.7~1.8, so
Correspondingly, the buffer layer 230 that refractive index is about 1.5~1.7 can be formed in the present embodiment.
In the present embodiment, the thickness range of the buffer layer is at 100~5000 angstroms, the buffer layer in this thickness range
230 have the function that above-mentioned buffering refractive index enough, while being also unlikely to blocked up and influencing light and penetrate the buffer layer 230.
In the present embodiment, the buffer layer 230 of multilayered structure can be formed, it is such to be advantageous in that, be conducive to cleverer
The refractive index of adjustment buffer layer 230 living.
For example, first that refractive index is less than 100 refractive index of the substrate can be formed at the back side of the substrate 100 102
Buffer layer；Then, the second buffer layer that refractive index is less than the first buffer layer refractive index is formed in the first buffer layer.
Further be conducive to reduce the refraction between adjacent material layer by forming gradually smaller first, second buffer layer of refractive index
Rate difference, the probability that further smaller light is totally reflected in the interface of different materials.
Specifically, may be used by SiON and SiO2The buffer layer 230 for the multilayered structure that material layer is collectively formed.Wherein
The refractive index of SiON is about 1.7, SiO2Refractive index be about 1.5, that is to say, that formed SiON materials first buffer layer, then
Form SiO2The second buffer layer of material.
But whether the present invention to necessarily being formed the buffer layer 230 of multilayered structure and being not construed as limiting, in other realities of the present invention
It applies in example, the buffer layer 230 of single layer structure can also be formed.For example, forming SiON or SiO2The buffering of the single layer structure of material
Layer, this can equally reach above-mentioned purpose.
In the present embodiment, the mode that plasma enhanced chemical vapor deposition may be used forms the buffer layer.This
The buffer layer that kind mode is formed is more uniform, this is conducive to the translucency for increasing buffer layer 230.But which kind of the present invention is to using
Mode forms the buffer layer 230 and is not construed as limiting.
In addition, please referring to Fig.1 5, the present invention also provides a kind of LED chip structures, which is characterized in that including：
Substrate 100；The substrate 100 is including a front 101 and relative to positive 101 back side 102, wherein
Described positive 101 are used to form all parts for constituting LED chip structure.
In the present embodiment, the substrate 100 passes through reduction processing, and the thickness of LED chip structure is at 100~250 microns
In the range of.But this is an example, in actual mechanical process, the thickness of the LED chip structure should be according to reality
Depending on situation, this is not limited by the present invention.
Substrate 100 in the present embodiment is sapphire (Al2O3) substrate.But the present invention is to the material of the substrate 100
It does not limit, material can also be such as spinelle (MgAl2O4), other substrates such as SiC, ZnS, ZnO or GaAs.
It is formed in the n type semiconductor layer in 100 front 101 of the substrate.In the present embodiment, the n type semiconductor layer is N
Type gallium nitride layer 110；
The active layer being formed on the n type gallium nitride layer 110, specifically, the active layer in the present embodiment can be with
It is multiple quantum well layer 120；
The p type semiconductor layer being formed on the multiple quantum well layer 120, in the present embodiment, the p type semiconductor layer can
To be p-type gallium nitride layer 130.
In the present embodiment, the p-type gallium nitride layer 130 can be by being sequentially formed in mixing on multiple quantum well layer 120
The In-GaN of Mg, the P-GaN for mixing Mg and the Al-GaN for mixing Mg are constituted, the multiple quantum well layer 120 can be by InGaN layer and
GaN layer is alternately stacked the quantum well structure of composition, and the n type gallium nitride layer 110 can be made of the GaN layer for mixing Si.
LED chip structure further include the N electrode 152 being electrically connected with the n type gallium nitride layer 110 and with the p-type nitrogen
Change the P electrode of 130 electrical connection of gallium layer, wherein：
Specifically, in the present embodiment, being formed in the p-type gallium nitride layer 130 and multiple quantum well layer 120 and exposing N
The opening 131 of type gallium nitride layer 110 (incorporated by reference to reference to figure 3)；The opening 131 is for forming LED chip structure
Mesa table tops, N electrode 152 are formed on the n type gallium nitride layer 110 in the opening 131.
Work function is formed on the p-type gallium nitride layer 130 of the Mesa table tops is more than the p-type gallium nitride layer 130 simultaneously
Less than the transparency conducting layer 140 of P electrode work function.P electrode 151 is formed on the p-type gallium nitride layer 130.
The work function of the transparency conducting layer 140 has in this way between the p-type gallium nitride layer 130 and P electrode 151
Conducive to the barrier height reduced between p-type gallium nitride layer 130 and P electrode 151, so be conducive to reduce p-type gallium nitride layer 130 with
Ohmic contact between P electrode 151, this can improve the working performance of LED chip structure, such as reduce LED chip structure
Operating voltage.
Transparency conducting layer 140 is not interfered with the P electrode 151 being subsequently formed and is nitrogenized with p-type due to conductive
Electrical connection between gallium layer 130.
In the present embodiment, the material of the transparency conducting layer 140 can be tin indium oxide (ITO), this material it is saturating
Bright conductive layer 140 has higher light transmittance, that is to say, that transmitance is relatively high in its visible light wave range, therefore can be basic
The light that Quantum Well is sent out is not kept off, reduces the loss of light.
Also, include the In-GaN layers for mixing Mg in the p-type gallium nitride layer 130 in the present embodiment, that is to say, that tin indium oxide
The transparency conducting layer 140 of material all has In components with the p-type gallium nitride layer 130, therefore is further conducive to tin indium oxide
Transparency conducting layer 140 and the p-type gallium nitride layer 130 between interpenetrate, advantageously reduce transparency conducting layer 140 in this way
Resistivity, and then electric current when further LED chip structure being helped to work spreads apart on transparency conducting layer 140 and, and reaches electricity
The purpose for flowing extension prevents the generation of electric current congestion phenomenon, increases quantum efficiency, this is further conducive to promote LED chip knot
The working performance of structure.
In addition, the work function size of tin indium oxide is typically in the range of the work function of the p-type gallium nitride layer 130 and is subsequently formed
P electrode 151 work function between, answer this that can reach the gesture between above-mentioned reduction p-type gallium nitride layer 130 and P electrode 151
Build the purpose of height.
It should be understood that those skilled in the art are understood that 140 specific work function size of transparency conducting layer
Technological parameter when can be formed by adjusting it is adjusted, it is contemplated that the work content of the transparency conducting layer 140 formed
Number is between p-type gallium nitride layer 130 and the P electrode being subsequently formed 151, so its specific work function size should be according to reality
Situation is adjusted, and this is not limited by the present invention.
In addition, the transparency conducting layer 140 of the indium tin oxide material generally has relatively small resistance sizes, Jin Erbang
The electric current of P electrode 151 is spread apart on transparency conducting layer 140 when LED chip structure being helped to work comes, and is conducive to reach electric current in this way
The purpose of extension, and then the generation of electric current congestion phenomenon is prevented, increase quantum efficiency, this is further conducive to promote LED chip
The working performance of structure.
But the present invention to the material of the transparency conducting layer 140 whether must tin indium oxide be not construed as limiting, in the present invention
Other embodiment in, transparency conducting layer 140 can also be other transparent and conductive materials, such as zinc oxide.Oxygen
Changing zinc and tin indium oxide has similar work function, and it gallium nitride layer 130 and the P electrode that is subsequently formed to be equally beneficial for reducing p-type
Barrier height between 151, and then improve the working performance of LED chip structure, reduce the operating voltage of LED chip structure.
In this embodiment, the thickness range of the transparency conducting layer 140 is in 50~3000 angstroms.In this thickness range
Transparency conducting layer 140 is unlikely to excessively thin and reduces conductive capability (namely resistance being caused to become larger), and has been unlikely to blocked up people leads
Cause is excessive to the absorption of light, and light transmittance is caused to reduce.
In the present embodiment, the P electrode 151 is metal material, and the P electrode 151 is while as electrode in this way
Also there is certain light reflectivity, can be used for sending out multiple quantum well layer in LED chip structure 120 towards 151 direction of P electrode
Light reflexes to substrate 100, and then is conducive to increase the light efficiency of LED chip structure.
In the present embodiment, the P electrode 151 is formed in surface and the side wall of the transparency conducting layer 140, that is, institute
It states P electrode 151 all to cover the transparency conducting layer 140, be conducive in this way than more comprehensively receiving and reflecting the volume
The light that sub- well layer 120 is sent out towards P electrode direction.
Specifically, P electrode 151 can be single layer structure or laminated construction.
In the present embodiment, P electrode 151 is laminated construction, for example, silver layer is formed on the transparency conducting layer 140, institute
Being formed with tungsten layer on silver layer is stated, the silver layer and titanizing tungsten layer collectively form the P electrode 151 of the laminated construction.
Specifically, the thickness of silver layer is in the range of 750~3000 angstroms, the model of the thickness of titanizing tungsten at 100~1000 angstroms
In enclosing.The P electrode 151 that can make in this thickness range is unlikely to excessively thin and reflectivity is caused to reduce, while being also unlikely to lead
Cause 151 volume that is blocked up and influencing entire LED chip structure of P electrode.But it will be understood by those skilled in the art that this numerical value model
It is only an example to enclose, and in actual mechanical process, these thickness for constituting each material layer of P electrode 151 should be according to reality
Border situation is adjusted.
In addition, whether the present invention must be that silver layer and titanizing tungsten layer do not limit to the P electrode 151 of the laminated construction
It is fixed, can also include with lower structure in other embodiments of the invention：
Silver layer on the transparency conducting layer 140, the titanizing tungsten layer on the silver layer and be located at the titanium
Change the platinum layer on tungsten layer, the silver layer, titanizing tungsten layer and platinum layer collectively form the P electrode 151 of the laminated construction.Wherein,
The thickness of the silver layer in the range of 750~3000 angstroms, the thickness of titanizing tungsten in the range of 100~1000 angstroms, platinum layer
Thickness can be in the range of 100~1000 angstroms.Likewise, above-mentioned thickness parameter is also only an example, the present invention is to P
The thickness of each material layer is not limited in any way in the thickness of electrode 151 and the P electrode 151 of laminated construction.
It is not contacted between the P electrode 151 and N electrode 152, it is short-circuit between P electrode 151 and N electrode 152 to prevent.
In addition, in the present embodiment, conductive protecting layer 160 is additionally provided in the P electrode 151.The conductive protecting layer
160 are used to protect the P electrode 151 of formation, are conducive to the influence for making P electrode 151 be not readily susceptible to other techniques in this way,
And then ensure the smooth and smooth of P electrode 151, and then advantageously ensure that the light reflectivity of P electrode 151 less than influence.
Specifically, the conductive protecting layer 160 in the present embodiment is formed in surface and the side wall of the P electrode 151, also
It is to say 151 all standing of the P electrode, is conducive to more comprehensively protect P electrode 151 in this way.
In the present embodiment, the conductive protecting layer 160 is laminated construction, specifically, the conductive protection of laminated construction
The material of layer 160 can be combination one or more in chromium, platinum, titanium, gold, nickel.
For example, conductive protecting layer 160 may include the layers of chrome being formed in P electrode 151, the platinum layer in the layers of chrome, institute
State the titanium layer on platinum layer, the nickel layer in layer gold and layer gold on the titanium layer, wherein platinum layer and titanium layer chemical property are more steady
It is fixed, primarily serve the effect of protection P electrode 151, N electrode 152；Layers of chrome primarily serves adhesive attraction, that is to say, that for increasing P
Adhesiveness between electrode 151, N electrode 152 and conductive protecting layer 160；Layer gold and nickel layer play in protection conductive protecting layer 160
The effect of other materials layer.
In the present embodiment, the thickness of the layers of chrome is in the range of 20~500 angstroms, the thickness of the platinum layer 200~
In the range of 1000 angstroms；The thickness of the titanium layer is in the range of 200~1000 angstroms；The thickness of the layer gold is 2000~5000
In the range of angstrom, the thickness of the nickel layer is in the range of 200~2000 angstroms.These materials are advantageous in respective thickness range
In being unlikely to volume that is blocked up and influencing LED chip structure while playing a protective role enough.
In the present embodiment, in the conductive protecting layer 160 of entire laminated construction, nickel layer is located at most surface layer.It is such good
It is in relatively stable in nickel material, it is not easy to it is corroded, it is advantageous as the surface layer of the conductive protecting layer 160 of laminated construction using nickel
It is protected in conductive protecting layer 160.
But the present invention is not construed as limiting to whether the conductive protecting layer 160 is necessary for multilayered structure, in its of the present invention
In his embodiment, single layer structure can also be, specifically, the material of the conductive protecting layer 160 can be thickness range 200
Titanizing tungsten in the range of~5000 angstroms.Be conducive to be unlikely to while playing a protective role enough in this thickness range
Volume that is thick and influencing LED chip structure.
In the present embodiment, it has been additionally provided on conductive protecting layer 160, p-type gallium nitride layer 130 and n type gallium nitride layer 110
The insulating medium layer 170 of insulation protection.
In the present embodiment, SiO may be used in the insulating medium layer 1702, SiN or SiON be as material.These materials
It is the insulating dielectric materials being easy to get that material, which compares,.
Specifically, in the present embodiment, the thickness range of insulating medium layer 170 is in 5000~20000 angstroms, in this thickness
Insulating medium layer 170 in range is unlikely to excessively thin and is difficult to play insulation effect, and is unlikely to blocked up and influences entire LED core
The volume of chip architecture.But above-mentioned thickness range is only one embodiment, the present invention is not limited in any way this.
In the present embodiment, in the insulating medium layer 170 and its surface is also formed with metal layer 180, wherein metal
It is respectively metallic conduction post 181,182 that layer 180, which is located at the part in insulating medium layer 170, and the position of metallic conduction post 181 corresponds to
It is contacted in P electrode 151, and with the conductive protecting layer 160 of 151 top of P electrode, for drawing the P electrode 151；Metal is led
Electric column 182 is contacted with N electrode 152, for drawing N electrode 152.
The part that metal layer 180 is located at 170 surface of the insulating medium layer includes pattern 183,184 (please referring to Fig.1 0),
Wherein, pattern 183 corresponds to metallic conduction post 181, for being drawn P electrode 151 by the metallic conduction post 181；Similarly,
The pattern 184 corresponds to metallic conduction post 182, for being drawn the N electrode 152 by above-mentioned metallic conduction post 182.
In the present embodiment, the material of the metal layer 180 can be by one or more in chromium, aluminium, titanium, platinum, gold, nickel
It constitutes.Wherein, in the range of 20~50 angstroms, in the range of 750~3000 angstroms, the thickness of titanium exists the thickness of aluminium the thickness of chromium
In the range of 200~1000 angstroms, the thickness of platinum is in the range of 200~1000 angstroms；Model of the thickness of gold at 2000~5000 angstroms
In enclosing；The thickness of nickel is in the range of 200~1000 angstroms.
In the present embodiment, passivation layer 190 is also formed on the metal layer 180, passivation layer 190 is used for 170 tables
180 pattern of metal layer in face is mutually isolated.
In the present embodiment, SiO may be used in the passivation layer 1902, SiN or SiON be as material.
In the present embodiment, the thickness range of the passivation layer 190 is in 5000~20000 angstroms, but above-mentioned thickness
Range is only one embodiment, and the present invention is not limited in any way this.
The passivation layer 190 has pattern to expose the metallic conduction post 181,182.
In the present embodiment, the extraction electrode corresponding to metallic conduction post 181,182 is formed on the passivation layer 190
210,220, since the metallic conduction post 181 is electrically connected with the P electrode 151, the extraction electrode 210 is used for P
The extraction of electrode 151 is so as to subsequent encapsulation progress；Similarly, metallic conduction post 182 is electrically connected with N electrode 152, therefore
For being used to draw N electrode 152 as extraction electrode 220.
There should be spacing d1 to prevent short circuit between the extraction electrode 210,220, in the present embodiment, between described
Size away from d1 should be not less than 100 microns.
In the present embodiment, the material of the extraction electrode 210,220 can be in chromium, aluminium, titanium, platinum, gold or tin
It is one or more.Specifically, the thickness of chromium, in the range of 20~50 angstroms, the thickness of aluminium is in the range of 750~3000 angstroms, titanium
Thickness in the range of 200~1000 angstroms, the thickness of platinum is in the range of 200~1000 angstroms；The thickness of gold 2000~
In the range of 5000 angstroms；The thickness of tin is in the range of 200~1000 angstroms.
The LED chip structure of the present invention further includes being formed in the buffer layer 230 at 100 back side 102 of the substrate, the buffering
The refractive index of layer 230 is less than the refractive index of the substrate 100.
Incorporated by reference to reference to shown in figure 16, D indicates that substrate, E indicate that buffer layer, F indicate that air, light d enter slow from substrate
Layer is rushed, light e indicates entry into the refracted light of buffer layer, and dotted line f indicates the refraction when light of same incidence angle enters air
Light, light g indicate entry into the refracted light of air.
Because air is that the refractive index of optically thinner medium is about 1, and general solid, such as the substrate 100 of the present invention is light
Close medium, refractive index are more than the refractive index (the Sapphire Substrate refractive index in the present embodiment is 1.7~1.8) of air, if
The refractive index of substrate 100 and air is larger, and the light d projected from substrate may be caused to be formed in substrate surface and be totally reflected
Angle causes to be reflected back toward in substrate from the light transmitted in substrate, this is unfavorable for increasing the bright of LED chip structure
Degree.And the present invention increases the buffer layer 230 that refractive index is less than substrate between substrate 100 and air, can efficiently reduce lining
The difference of refractive index between bottom and air can reduce the probability that light d is totally reflected at the interface of different medium in this way.This
Sample can reduce the probability that light is totally reflected in substrate surface, increase the transmissivity of light, and then promote LED chip structure
Brightness.
As it was noted above, 100 material of substrate in the present embodiment is sapphire, sapphire refractive index is about 1.7~
1.8, so correspondingly, the refractive index of the buffer layer in the present embodiment is about 1.5~1.7.
In the present embodiment, the thickness range of the buffer layer is at 100~5000 angstroms, the buffer layer in this thickness range
230 have the function that above-mentioned buffering refractive index enough, while being also unlikely to blocked up and influencing light and penetrate the buffer layer 230.
In the present embodiment, the buffer layer 230 can be multilayered structure, such to be advantageous in that, be conducive to cleverer
The refractive index of adjustment buffer layer 230 living.
For example, the buffer layer may include be formed at the back side of the substrate 102 refractive index be less than the substrate
The first buffer layer of refractive index, and be formed in the first buffer layer, refractive index be less than the first buffer layer refractive index
Second buffer layer.Gradually smaller first, second buffer layer of refractive index is further conducive to reduce between adjacent material layer
Refractive index difference, the probability that further smaller light is totally reflected in the interface of different materials.
Specifically, may be used by SiON and SiO2The buffer layer 230 for the multilayered structure that material layer is collectively formed.Wherein
The refractive index of SiON is about 1.7, SiO2Refractive index be about 1.5, that is to say, that the buffer layer 230 includes SiON materials
First buffer layer and SiO2The second buffer layer of material.
But whether the present invention must be that multilayered structure is not construed as limiting to the buffer layer 230, in other of the present invention
In embodiment, the buffer layer 230 can also form single layer structure, for example, being SiON or SiO2The buffer layer of material, this is same
The purpose of the present invention can be reached.
In addition it should be noted that the LED chip structure of the present invention can be, but not limited to obtain using above-mentioned production method
It arrives.
Although present disclosure is as above, present invention is not limited to this.Any those skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (18)
1. a kind of production method of LED chip structure, which is characterized in that including：
Substrate is provided, the substrate is including a front and relative to the positive back side；
N type semiconductor layer, active layer and p type semiconductor layer are sequentially formed in the front of the substrate；
Form the N electrode being electrically connected with the n type semiconductor layer；
Form the P electrode being electrically connected with the p type semiconductor layer；
A buffer layer is formed at the back side of the substrate, and the refractive index of the buffer layer is less than the refractive index of the substrate；
After the step of forming p type semiconductor layer, form N electrode and the step of P electrode before, the production method further includes：
The opening of exposed portion n type semiconductor layer is formed in the p type semiconductor layer and the active layer；
The transparency conducting layer that work function is more than the p type semiconductor layer is formed on the p type semiconductor layer；
Formed P electrode the step of include：The P electricity that work function is more than the transparency conducting layer is formed on the transparency conducting layer
Pole；
Formed N electrode the step of include：The N electrode is formed on n type semiconductor layer in said opening.
2. production method as described in claim 1, which is characterized in that the step of providing substrate includes providing sapphire material
Substrate.
3. production method as described in claim 1, which is characterized in that after the step of forming N electrode and P electrode, formed slow
Before the step of rushing layer, the production method further includes：
The section substrate material for removing substrate back, the substrate is thinned.
4. production method as claimed in claim 3, which is characterized in that the step of organic semiconductor device includes, by the substrate thinning
To make the thickness of LED chip structure in the range of 100~250 microns.
5. production method as claimed in claim 3, which is characterized in that the step of organic semiconductor device includes using grinding or carving
The mode of erosion removes the section substrate material of substrate back.
6. production method as claimed in claim 3, which is characterized in that the step of organic semiconductor device further includes：In the thinned lining
After bottom, the back side of the substrate is processed by shot blasting.
7. production method as claimed in claim 6, which is characterized in that the step of being processed by shot blasting to substrate back include：
The back side of the substrate is polished by the way of chemically mechanical polishing.
8. production method as described in claim 1, which is characterized in that form buffer layer of the thickness range at 100~5000 angstroms.
9. production method as described in claim 1, which is characterized in that form the buffer layer of single layer or multilayered structure.
10. production method as claimed in claim 9, which is characterized in that form SiON or SiO2The buffering of the single layer structure of material
Layer, alternatively, being formed by SiON and SiO2The buffer layer for the multilayered structure that material collectively forms.
11. production method as claimed in claim 9, which is characterized in that the step of buffer layer for forming multilayered structure includes：
The first buffer layer that refractive index is less than the refractive index of substrate is formed at the back side of the substrate；
The second buffer layer that refractive index is less than the first buffer layer refractive index is formed in the first buffer layer.
12. production method as described in claim 1, which is characterized in that using plasma enhances the side of chemical vapor deposition
Formula forms the buffer layer.
13. a kind of LED chip structure, which is characterized in that including：
Substrate, the substrate include a front and opposite with the positive back side；
It is formed in the n type semiconductor layer of the substrate face；
The active layer being formed on the n type semiconductor layer；
The p type semiconductor layer being formed on the active layer；
The transparency conducting layer being formed on the p type semiconductor layer, wherein the work function of the transparency conducting layer is more than p-type half
The work function of conductor layer；
The P electrode being formed on the transparency conducting layer, wherein the work function of the P electrode is more than the transparency conducting layer
Work function；
The N electrode being electrically connected with the n type semiconductor layer and the P electrode being electrically connected with the p type semiconductor layer；
It is formed in the buffer layer of the substrate back, the refractive index of the buffer layer is less than the refractive index of the substrate.
14. LED chip structure as claimed in claim 13, which is characterized in that the substrate is Sapphire Substrate.
15. LED chip structure as claimed in claim 13, which is characterized in that the material of the buffer layer is SiON or SiO2,
Alternatively, the material of the buffer layer is by SiON and SiO2It collectively forms.
16. LED chip structure as claimed in claim 13, which is characterized in that the thickness of the substrate is at 100~250 microns
In the range of.
17. LED chip structure as claimed in claim 13, which is characterized in that the buffer layer is single layer structure or multilayer
Structure.
18. LED chip structure as claimed in claim 17, which is characterized in that the buffer layer includes being formed in the substrate
The back side, and refractive index is less than the first buffer layer of the refractive index of substrate, and be formed in the first buffer layer, refractive index
Less than the second buffer layer of first buffer layer.
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