CN108110116B - Light emitting diode chip and manufacturing method thereof - Google Patents
Light emitting diode chip and manufacturing method thereof Download PDFInfo
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- CN108110116B CN108110116B CN201710985581.2A CN201710985581A CN108110116B CN 108110116 B CN108110116 B CN 108110116B CN 201710985581 A CN201710985581 A CN 201710985581A CN 108110116 B CN108110116 B CN 108110116B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/385—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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Abstract
The invention discloses a light-emitting diode chip and a manufacturing method thereof, and belongs to the technical field of semiconductors. The light-emitting diode chip comprises an epitaxial wafer and an electrode, wherein the electrode comprises an adhesion layer, a reflecting layer, a first protective layer, a routing layer and a second protective layer, and the adhesion layer, the reflecting layer, the first protective layer and the routing layer are sequentially laminated on the epitaxial wafer; the second protective layer extends to the surface of the epitaxial wafer from the edge area of the upper surface of the light reflecting layer through the side surfaces of the light reflecting layer and the adhesive layer; the upper surface of reflector layer sets up the surface of first protective layer for the reflector layer, and the side of reflector layer is the surface except that the upper surface of reflector layer and the surface of reflector layer setting on the adhesion layer in the reflector layer, and the side of adhesion layer sets up the surface except that the surface of reflector layer and adhesion layer set up the surface on the epitaxial slice for the adhesion layer in the adhesion layer. The invention can isolate the reflecting layer and the adhesive layer from air, effectively avoid the corrosion of the adhesive layer and the reflecting layer and ensure the normal use of the chip.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a light-emitting diode chip and a manufacturing method thereof.
Background
A Light Emitting Diode (LED) is a semiconductor Diode that can convert electrical energy into Light energy, has the characteristics of small size, high brightness and low energy consumption, and is widely used in display screens and indicator lamps.
The chip is a core component of the LED, and the existing chip includes an epitaxial wafer, an electrode and a passivation layer, the electrode is disposed on the epitaxial wafer, and the passivation layer is disposed on the epitaxial wafer except for the region where the electrode is located, and on all regions of the edge region and the side surface of the upper surface of the electrode (the upper surface of the electrode is the surface of the electrode opposite to the surface of the electrode disposed on the epitaxial wafer, and the side surface of the electrode is the surface of the electrode except for the upper surface of the electrode and the surface of the electrode disposed on the epitaxial wafer), so as to prevent the epitaxial wafer and the electrode from being oxidized and corroded by air. The passivation layer is a silicon dioxide layer, the electrode comprises an adhesion layer, a reflection layer, a protection layer and a routing layer, and the adhesion layer, the reflection layer, the protection layer and the routing layer are sequentially stacked on the epitaxial wafer. Specifically, the adhesion layer is a Cr film for adhering the electrode to the epitaxial wafer; the reflecting layer is an Al film and is used for reflecting light rays emitted to the electrode, so that the light rays are prevented from being absorbed by the electrode, and the light emitting efficiency is improved; the protective layer is a Ni film and is used for protecting the adhesive layer and the reflective layer; the routing layer is an Au film or an Al film and is used for being combined with the bonding wire to realize routing.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
after forming the electrode on the epitaxial wafer, a passivation material is laid on the epitaxial wafer and the electrode, then the passivation material in the middle area of the upper surface of the electrode is removed by using a photolithography technique and an etching technique to form a passivation layer, and then Wire Bonding (english: Wire Bonding) is performed on the middle area of the upper surface of the electrode exposed after the passivation material is removed. Wire bonding, also known as pressure bonding, binding, bonding, wire bonding, refers to the use of metal wires (such as gold wires, aluminum wires, etc.) to complete the connection of interconnects within solid state circuits in microelectronic devices using thermal compression or ultrasonic energy. Because the passivation layer covers on the marginal zone of the upper surface of electrode, therefore hot pressing or the ultrasonic energy when routing can be acted on the passivation layer, and the silica layer that current passivation layer adopted is fragile, can split under the effect of hot pressing or ultrasonic energy to lead to appearing the crack on the passivation layer that covers on the marginal zone of the upper surface of electrode, the crack can extend to the side of electrode, and air or harmful solution can get into the interior corruption electrode of passivation layer through the crack: after the adhesion layer is corroded, the electrode falls off from the epitaxial wafer, and the chip cannot be used continuously; the light reflection layer can not reflect light after being corroded, and the light emitting efficiency of the chip is reduced.
Disclosure of Invention
In order to solve the problem that a passivation layer in the prior art cannot effectively protect an electrode and influence the use of a chip, the embodiment of the invention provides a light emitting diode chip and a manufacturing method thereof. The technical scheme is as follows:
on one hand, the embodiment of the invention provides a light-emitting diode chip, which comprises an epitaxial wafer and an electrode, wherein the electrode comprises an adhesion layer, a reflection layer, a first protection layer and a routing layer, and the adhesion layer, the reflection layer, the first protection layer and the routing layer are sequentially laminated on the epitaxial wafer; the electrode further comprises a second protective layer, wherein the second protective layer extends from the edge area of the upper surface of the light reflecting layer to the surface of the epitaxial wafer through the side surfaces of the light reflecting layer and the adhesive layer; the upper surface of reflector layer is the reflector layer sets up the surface of first protective layer, the side of reflector layer is in the reflector layer except the upper surface of reflector layer with the reflector layer sets up the surface on the adhesion layer except that, the side of adhesion layer is in the adhesion layer except that the adhesion layer sets up the surface of reflector layer with the adhesion layer sets up the surface on the epitaxial slice except that on the surface.
Optionally, the material of the second protective layer is silicon dioxide, silicon nitride or aluminum oxide.
Optionally, the thickness of the second protective layer is 50nm to 1500 nm.
Optionally, a distance between an edge of the second protective layer disposed on the upper surface of the light reflecting layer and the center of the upper surface of the light reflecting layer is 2 μm to 5 μm.
Optionally, the adhesion layer is a Cr film, a Ni film, or a Ti film; when the adhesion layer is a Cr film, the thickness of the adhesion layer is 1 nm-5 nm; when the adhesion layer is a Ni film or a Ti film, the thickness of the adhesion layer is 50 nm-150 nm.
Optionally, the thickness of the light reflecting layer is 50nm to 150 nm.
Optionally, the electrode further comprises a first isolation layer disposed between the light-reflecting layer and the first protective layer.
Optionally, the electrode further includes a second isolation layer disposed between the first protection layer and the wire bonding layer.
In another aspect, an embodiment of the present invention provides a method for manufacturing a light emitting diode chip, where the method includes:
providing an epitaxial wafer;
forming an electrode on the epitaxial wafer;
the electrode comprises an adhesion layer, a reflection layer, a first protection layer, a routing layer and a second protection layer, wherein the adhesion layer, the reflection layer, the first protection layer and the routing layer are sequentially laminated on the epitaxial wafer, and the second protection layer extends to the surface of the epitaxial wafer from the edge area of the upper surface of the reflection layer through the side surfaces of the reflection layer and the adhesion layer; the upper surface of reflector layer is the reflector layer sets up the surface of first protective layer, the side of reflector layer is in the reflector layer except the upper surface of reflector layer with the reflector layer sets up the surface on the adhesion layer except that, the side of adhesion layer is in the adhesion layer except that the adhesion layer sets up the surface of reflector layer with the adhesion layer sets up the surface on the epitaxial slice except that on the surface.
Optionally, the forming an electrode on the epitaxial wafer includes:
forming photoresist of a first pattern on the epitaxial wafer by adopting a photoetching technology;
sequentially paving materials of an adhesion layer and a reflective layer on the photoresist of the first pattern and the epitaxial wafer by adopting a magnetron sputtering technology;
removing the photoresist of the first pattern, wherein the material of the adhesive layer on the epitaxial wafer forms an adhesive layer, and the material of the reflective layer on the epitaxial wafer forms a reflective layer;
paving a material of a second protective layer on the light reflecting layer and the epitaxial wafer;
forming a photoresist of a second pattern on the material of the second protective layer by adopting a photoetching technology;
wet etching the material of the second protective layer, wherein the material of the second protective layer covered by the photoresist of the second pattern forms a second protective layer;
removing the photoresist of the second pattern;
forming photoresist of a third pattern on the epitaxial wafer by adopting a photoetching technology;
sequentially paving a material of a first protective layer and a material of a routing layer on the photoresist of the third pattern, the second protective layer and the reflective layer by adopting a magnetron sputtering technology;
and removing the photoresist of the third pattern, forming a first protective layer by using the materials of the second protective layer and the first protective layer on the reflecting layer, and forming a routing layer by using the materials of the second protective layer and the routing layer on the reflecting layer.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
through the marginal area who sets up the upper surface from the reflector layer, side through reflector layer and adhesion layer, extend to the second protective layer on the surface of epitaxial wafer, second protective layer and the first protective layer of setting on the reflector layer, and the epitaxial wafer that the adhesion layer set up is together, form a space with reflector layer and adhesion layer sealed inside, thereby it is isolated with reflector layer and adhesion layer and air, and then effectively avoid causing the electrode to drop from the epitaxial wafer after the adhesion layer is corroded, and the reflector layer can't carry out the reflection of light after being corroded, ensure the normal use of chip, the life of chip is prolonged. And the reflector layer extends to the epitaxial wafer from the marginal region of the upper surface of the reflector layer, and is not arranged on the surface of the routing layer, so that the reflector layer is not influenced by routing, and the protection of the adhesion layer and the reflector layer can be effectively realized.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a light emitting diode chip according to an embodiment of the present invention;
3 FIG. 3 2 3 is 3 a 3 schematic 3 view 3 of 3 the 3 direction 3 A 3- 3 A 3 in 3 FIG. 3 1 3 according 3 to 3 an 3 embodiment 3 of 3 the 3 present 3 invention 3; 3
FIG. 3 is a schematic diagram of a same-side electrode chip according to an embodiment of the present invention;
fig. 4 is a flowchart of a method for manufacturing a light emitting diode chip according to a second embodiment of the present invention;
fig. 5a to fig. 5d are schematic structural diagrams of a chip in a manufacturing process according to a second manufacturing method provided by the embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Example one
The embodiment of the invention provides a light emitting diode chip, and fig. 1 is a schematic structural diagram of the light emitting diode chip, referring to fig. 1, the light emitting diode chip includes an epitaxial wafer 10 and an electrode 20, the electrode 20 includes an adhesion layer 21, a reflection layer 22, a first protection layer 23 and a wire bonding layer 24, and the adhesion layer 21, the reflection layer 22, the first protection layer 23 and the wire bonding layer 24 are sequentially stacked on the epitaxial wafer 10.
In this embodiment, the electrode 20 further includes a second protective layer 25, and the second protective layer 25 extends from the edge region of the upper surface of the light-reflecting layer 22 to the surface of the epitaxial wafer 10 through the side surfaces of the light-reflecting layer 22 and the adhesive layer 21. The upper surface of the light-reflecting layer 22 is the surface of the light-reflecting layer 22 provided with the first protective layer 23, the side surface of the light-reflecting layer 22 is the surface of the light-reflecting layer 22 except the upper surface of the light-reflecting layer 22 and the surface of the light-reflecting layer 22 provided on the adhesive layer 21, and the side surface of the adhesive layer 21 is the surface of the adhesive layer 21 except the surface of the adhesive layer 21 provided with the light-reflecting layer 22 and the surface of the adhesive layer 21 provided on the epitaxial wafer 10.
According to the embodiment of the invention, the second protective layer which extends to the surface of the epitaxial wafer from the edge area of the upper surface of the reflective layer, passes through the side surfaces of the reflective layer and the adhesive layer, and forms a space for sealing the reflective layer and the adhesive layer together with the epitaxial wafer arranged on the second protective layer, the first protective layer arranged on the reflective layer and the adhesive layer, so that the reflective layer and the adhesive layer are isolated from air, further, the phenomenon that an electrode falls off from the epitaxial wafer after the adhesive layer is corroded and the reflective layer cannot reflect light after being corroded is effectively avoided, the normal use of a chip is ensured, and the service life of the chip is prolonged. And the reflector layer extends to the epitaxial wafer from the marginal region of the upper surface of the reflector layer, and is not arranged on the surface of the routing layer, so that the reflector layer is not influenced by routing, and the protection of the adhesion layer and the reflector layer can be effectively realized.
Alternatively, the material of the second protective layer 25 may be silicon dioxide, silicon nitride, or aluminum oxide. The silicon dioxide, the silicon nitride and the aluminum oxide can not react with air, the stability is good, and the air can be effectively isolated from the reflecting layer and the adhesion layer; among them, silicon dioxide is the most commonly used protective layer material, and the production cost is low.
Alternatively, the thickness of the second protective layer 25 may be 50nm to 1500 nm. If the thickness of the second protective layer 25 is less than 50nm, it may not function as an air-barrier due to its too thin thickness; if the thickness of the second protection layer 25 is greater than 1500nm, the deposition of subsequent materials may be affected due to too thick thickness; but also causes waste of materials and increases the growth cost.
Alternatively, referring to fig. 2, the distance d between the edge of the second protective layer 25 disposed on the upper surface of the light reflecting layer 22 and the edge of the upper surface of the light reflecting layer 22 may be 2 μm to 5 μm. If the distance d between the edge of the second protective layer 25 disposed on the upper surface of the light-reflecting layer 22 and the edge of the upper surface of the light-reflecting layer 22 is less than 2 μm, the edge of the light-reflecting layer may not be effectively protected and corroded by air, so that the light emitted to the electrode is absorbed, and the light-emitting efficiency of the chip is reduced; if the distance d between the edge of the second protective layer 25 disposed on the upper surface of the light-reflecting layer 22 and the edge of the upper surface of the light-reflecting layer 22 is greater than 5 μm, the area of the region where the first protective layer is disposed on the light-reflecting layer may be too small, which may affect the electrical conductivity of the chip and thus the light-emitting efficiency of the chip.
Specifically, the adhesion layer 21 may be a Cr film, a Ni film, or a Ti film. The Cr film, the Ni film and the Ti film have better adhesion, and can fix the electrode on the epitaxial wafer; among them, the Cr film is most excellent in adhesion, and is the most commonly used adhesion layer, and low in cost.
Alternatively, when the adhesion layer 21 is a Cr film, the thickness of the adhesion layer 21 may be 1nm to 5 nm. Because the adhesion of the Cr film is optimal, the electrode can be fixed on the epitaxial wafer only by the small thickness of the Cr film, and meanwhile, the Cr film is as thin as possible on the premise that the adhesion is enough, so that the second protective layer can fully cover the adhesion layer to form protection, and the adhesion layer is effectively prevented from contacting the outside.
Preferably, the thickness of the adhesion layer 21 may be 3 nm.
Alternatively, when the adhesion layer 21 is a Ni film or a Ti film, the thickness of the adhesion layer 21 may be 50nm to 150 nm. Because the adhesion of Ni membrane and Ti membrane does not have the Cr membrane, therefore the thickness of Ni membrane and Ti membrane can be greater than the Cr membrane, satisfies simultaneously that the adhesion is as thin as possible under the sufficient prerequisite of adhesion, is favorable to the second protective layer to fully cover the adhesion layer in order to form the protection, effectively avoids adhesion layer and external contact.
Preferably, the thickness of the adhesion layer 21 may be 100 nm.
Specifically, the light reflecting layer 22 may be an Al film. The reflectivity of Al is high, and most of the light can be reflected.
Alternatively, the light-reflecting layer 22 may have a thickness of 50nm to 150 nm. The light reflecting layer is as thin as possible on the premise of meeting the reflecting effect, the second protective layer is favorable for fully covering the light reflecting layer to form protection, and the light reflecting layer is effectively prevented from contacting with the outside.
Preferably, the light-reflecting layer 22 may have a thickness of 150 nm.
Alternatively, the thickness of the first protective layer 23 may be 50nm to 1500 nm. If the thickness of the first protective layer 23 is less than 50nm, it may not function as an air-barrier due to the too thin thickness; if the thickness of the first passivation layer 23 is greater than 1500nm, the material is wasted, and the growth cost is increased.
Specifically, the material of the first protective layer 23 may be nickel (Ni), platinum (Pt), titanium (Ti), gold (Au), or titanium tungsten alloy (TiW). The performance of nickel, platinum, titanium, gold or titanium-tungsten alloy is stable, the nickel, platinum, titanium, gold or titanium-tungsten alloy is not easy to react with air, the air can be effectively isolated, and the air can be effectively isolated from the reflecting layer and the adhesion layer; besides the function of isolating air, the nickel can balance stress matching among a plurality of metal films, ensure the overall quality of the electrode and improve the reliability of the electrode.
In one implementation manner of this embodiment, when the material of the first protective layer 23 is nickel, the electrode 20 may further include a first isolation layer 26, and the first isolation layer 26 is disposed between the light-reflecting layer 22 and the first protective layer 23. The first isolating layer is arranged between the Al film serving as the reflecting layer and the Ni film serving as the first protective layer, so that the agglomeration phenomenon of the Ni film can be inhibited, and the appearance abnormity caused by large electrode black spots generated by the agglomeration of the Ni film is avoided; and the Al film can be isolated, and island growth of the Al film in the agglomerated Ni metal particles can be prevented.
Specifically, the first isolation layer 26 may be a Ti film or a Cr film. Because the Ti film has more stable property than the Cr film and is not easy to react with air, the Al film as the reflecting layer can be effectively protected while the reflecting layer and the protective layer are effectively isolated.
Preferably, the thickness of the first isolation layer 26 may be 5nm to 500 nm. If the thickness of the first isolation layer 26 is less than 5nm, the reflective layer and the protective layer may not be effectively isolated due to too thin thickness; if the thickness of the first isolation layer 26 is greater than 500nm, material may be wasted, and the production cost may be increased.
More preferably, the thickness of the first isolation layer 26 may be 80 nm.
In another implementation manner of this embodiment, when the material of the first protection layer 23 is nickel, the electrode 20 may further include a second isolation layer 27, and the second isolation layer 27 is disposed between the first protection layer 23 and the wire bonding layer 24. The second isolating layer has the similar function as the first isolating layer, can inhibit the aggregation of the Ni film, and can isolate the Al film from the Ni film to prevent island growth of the Al film in the aggregated Ni metal particles.
Specifically, the second isolation layer 27 may be a Ti film or a Cr film. Because the Ti film has more stable property than the Cr film, the Ti film is not easy to react with air, and can effectively play the role of isolation.
Preferably, the thickness of the second isolation layer 27 may be 5nm to 500 nm. If the thickness of the second isolation layer 27 is less than 5nm, the reflective layer and the protective layer may not be effectively isolated due to too thin thickness; if the thickness of the second isolation layer 27 is greater than 500nm, material may be wasted, and the production cost may be increased.
More preferably, the thickness of the second isolation layer 27 may be 120 nm.
Specifically, the wire bonding layer 24 may be an Al film or an Au film. Au has stable property and is not easy to react with other substances, and the stability of the electrode is good by adopting the Au film as the routing layer at the topmost end of the electrode; the cost of Al is far lower than that of Au, and the production cost of the chip can be greatly reduced by replacing the Au film with the Al film as a routing layer; and the reflectivity of Al to light is higher, and the light-emitting efficiency of the chip can be improved by replacing the Au film with the Al film as a routing layer.
Alternatively, when the wire bonding layer 24 is an Au film, the thickness of the wire bonding layer 24 may be 0.5 μm to 5 μm. Because the property of Au is stable, the thickness range of the Au film is wide, and the requirement on realization is low.
Preferably, the thickness of the wire bonding layer 24 may be 2 μm.
Alternatively, when the wire bonding layer 24 is an Al film, the thickness of the wire bonding layer 24 may be 1 μm to 3 μm. Because Al is more active and is easy to react with oxygen in the air, Al consumption caused by reaction with the oxygen in the air is considered in the thickness of the Al film, and meanwhile, the Al is softer, when the thickness of the Al film is increased to 3 micrometers, the bottom of the Al film is greatly extruded and diffuses to the periphery, so that the appearance of a chip is poor, even the chip is subjected to electric leakage, and the thickness range of the Al film is narrow.
Preferably, the thickness of the wire bonding layer 24 may be 1.1 μm.
In a specific implementation, the second protection layer can be used to replace a passivation layer to protect the epitaxial wafer. That is, the second protective layer is also provided on the upper surface and the side surface of the epitaxial wafer. The upper surface of the epitaxial wafer is the surface of the epitaxial wafer provided with the adhesion layer, the second protection layer is specifically arranged on the other area except the area provided with the adhesion layer on the upper surface of the epitaxial wafer, and the side surface of the epitaxial wafer is the other surface except the upper surface and the surface opposite to the upper surface of the epitaxial wafer.
In practical application, the epitaxial wafer mainly comprises an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer, and electrons provided by the N-type semiconductor layer and holes provided by the P-type semiconductor layer are injected into the light emitting layer under the drive of current to carry out compound light emission. Therefore, both the N-type semiconductor layer and the P-type semiconductor layer are provided with electrodes, the electrode provided on the N-type semiconductor layer is referred to as an N-type electrode, and the electrode provided on the P-type semiconductor layer is referred to as a P-type electrode. The N-type electrode and the P-type electrode may have the same or different structures. The electrode in the present invention may be an N-type electrode or a P-type electrode.
Further, the N-type electrode and the P-type electrode may be disposed on two sides of the epitaxial wafer, respectively, and the chip formed at this time may be referred to as an opposite-side electrode chip; the N-type electrode and the P-type electrode can also be arranged on the same side of the epitaxial wafer, and the chip formed in the process can be called a same-side electrode chip. In addition, since holes provided in the P-type semiconductor layer are not easily moved, and the P-type electrode is generally disposed on a partial region of the P-type semiconductor layer, in order to spread the current injected from the P-type electrode over the entire region of the P-type semiconductor layer, a transparent conductive film is generally disposed on the P-type semiconductor layer to spread the current.
Taking the same-side electrode chip as an example, fig. 3 is a schematic structural diagram of the same-side electrode chip, referring to fig. 3, the chip includes an epitaxial wafer 10, an N-type electrode 20a, a P-type electrode 20b, and a transparent conductive film 30. The epitaxial wafer comprises a substrate 11, an N-type semiconductor layer 12, a light emitting layer 13 and a P-type semiconductor layer 14, wherein the N-type semiconductor layer 12, the light emitting layer 13 and the P-type semiconductor layer 14 are sequentially laminated on the substrate 11, a groove 40 extending to the N-type semiconductor layer 12 is formed in the P-type semiconductor layer 14, and an N-type electrode 20a is arranged on the N-type semiconductor layer 12 in the groove 40. A transparent conductive film 30 is disposed on the P-type semiconductor layer 14, and a P-type electrode 20b is disposed on the transparent conductive film 30. At least one of the N-type electrode 20a and the P-type electrode 20b has the same structure as the electrode 20, and a second protective layer of the electrode extends to other regions of the chip except for the N-type electrode 20a and the P-type electrode 20 b.
Specifically, the substrate 11 may be a sapphire substrate, the N-type semiconductor layer 12 may be an N-type gallium nitride layer, and the P-type semiconductor layer 14 may be a P-type gallium nitride layer; the light emitting layer 13 may include a plurality of quantum wells and a plurality of quantum barriers, the plurality of quantum wells and the plurality of quantum barriers are alternately stacked, the quantum wells are indium gallium nitride layers, and the quantum barriers are gallium nitride layers; the transparent conductive film 30 may be made of one of Indium Tin Oxide (ITO), aluminum-doped zinc oxide transparent conductive glass (AZO), Gallium-doped zinc oxide transparent conductive Glass (GZO), Indium Gallium Zinc Oxide (IGZO), and ZnO.
Further, there is a large lattice mismatch between the sapphire substrate and the gallium nitride material, and in order to alleviate the lattice mismatch, a buffer layer is generally provided between the substrate 11 and the N-type semiconductor layer 12. Specifically, the buffer layer may be an aluminum nitride layer or a gallium nitride layer.
Example two
The embodiment of the invention provides a manufacturing method of a light-emitting diode chip, which is suitable for manufacturing the light-emitting diode chip provided by the embodiment. Fig. 4 is a flow chart of a manufacturing method, referring to fig. 4, the manufacturing method includes:
step 201: an epitaxial wafer is provided.
Step 202: and forming an electrode on the epitaxial wafer.
In this embodiment, the electrode includes an adhesion layer, a reflective layer, a first protective layer, a routing layer and a second protective layer, the adhesion layer, the reflective layer, the first protective layer and the routing layer are sequentially stacked on the epitaxial wafer, and the second protective layer extends to the surface of the epitaxial wafer from the edge area of the upper surface of the reflective layer through the side surfaces of the reflective layer and the adhesion layer; the upper surface of reflector layer sets up the surface of first protective layer for the reflector layer, and the side of reflector layer is the surface except that the upper surface of reflector layer and the surface of reflector layer setting on the adhesion layer in the reflector layer, and the side of adhesion layer sets up the surface except that the surface of reflector layer and adhesion layer set up the surface on the epitaxial slice for the adhesion layer in the adhesion layer.
Specifically, this step 202 may include:
the method comprises the following steps that firstly, photoresist of a first pattern is formed on an epitaxial wafer by adopting a photoetching technology;
secondly, sequentially laying materials of an adhesion layer and a reflective layer on the photoresist and the epitaxial wafer of the first pattern by adopting a magnetron sputtering technology;
removing the photoresist of the first pattern, forming an adhesive layer by using the material of the adhesive layer on the epitaxial wafer, and forming a reflective layer by using the material of the reflective layer on the epitaxial wafer;
fourthly, paving materials of a second protective layer on the reflective layer and the epitaxial wafer;
fifthly, forming photoresist of a second pattern on the material of the second protective layer by adopting a photoetching technology;
sixthly, etching the material of the second protective layer by a wet method, wherein the material of the second protective layer covered by the photoresist of the second pattern forms the second protective layer;
seventhly, removing the photoresist of the second pattern;
eighthly, forming photoresist of a third pattern on the epitaxial wafer by adopting a photoetching technology;
a ninth step of sequentially laying a material of the first protective layer and a material of the routing layer on the photoresist, the second protective layer and the reflective layer of the third pattern by adopting a magnetron sputtering technology;
and tenth, removing the photoresist of the third pattern, forming a first protective layer by using the materials of the first protective layer on the second protective layer and the reflective layer, and forming a routing layer by using the materials of the routing layer on the second protective layer and the reflective layer.
The photoresist of the first pattern covers the area of the epitaxial wafer except the position of the adhesive layer, so that when the photoresist of the first pattern is removed subsequently, the material of the adhesive layer and the material of the light reflecting layer on the photoresist of the first pattern are removed simultaneously to form the adhesive layer and the light reflecting layer. The photoresist of the second pattern covers the area of the second protective layer on the material of the second protective layer so as to remove the material of the second protective layer which is not covered by the photoresist to form the second protective layer. The photoresist of the third pattern covers the epitaxial wafer, so that when the photoresist of the third pattern is removed in the subsequent process, the material of the first protective layer and the material of the routing layer on the photoresist of the third pattern are removed, and the first protective layer and the routing layer are formed.
In practical application, when forming a photoresist with a certain pattern, for example, a photoresist with a first pattern, a layer of photoresist is laid first, then the photoresist is exposed under the shielding of a mask, finally the exposed photoresist is soaked in a developing solution, and part of the photoresist is dissolved in the developing solution to leave the photoresist with the required pattern.
When a magnetron sputtering technology is adopted to lay certain electrode material, such as the material of the adhesion layer, the epitaxial wafer is firstly placed into a magnetron sputtering cavity, and the magnetron sputtering cavity is vacuumized; introducing nitrogen into the magnetron sputtering cavity; then, sputtering is carried out on the corresponding target material (for example, Cr target when the adhesion layer is formed) under the nitrogen atmosphere, and an electrode is formed.
Further, when there is no other process between the laying of at least two layers of electrode materials, such as the material of the adhesion layer and the material of the light reflecting layer, it is possible to sputter one target material to form one layer and then sputter the other target material to form the other layer.
Taking the example that the materials of the adhesion layer and the reflective layer are sequentially laid on the photoresist and the epitaxial wafer of the first pattern by adopting the magnetron sputtering technology in the second step, when the method is specifically implemented, the epitaxial wafer is firstly placed into a magnetron sputtering cavity, and the magnetron sputtering cavity is vacuumized; introducing nitrogen into the magnetron sputtering cavity; then, sputtering a Cr target in a nitrogen atmosphere to form an adhesion layer on the epitaxial wafer and the photoresist of the first pattern; next, an Al target was sputtered in a nitrogen atmosphere to form a light reflecting layer on the adhesive layer. And in the ninth step, the magnetron sputtering technology is adopted to sequentially lay the material of the first protective layer and the material of the routing layer on the photoresist, the second protective layer and the reflective layer of the third pattern, which is similar to the above process and is not described in detail herein. The material of the second protective layer may be laid down in a similar manner to the passivation layer, which is prior art and will not be described in detail here.
In addition, in the present embodiment, the epitaxial wafer includes a substrate, an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer.
Specifically, the step 201 may include:
an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer are sequentially grown on a substrate by using a Metal Organic Chemical Vapor Deposition (MOCVD) technology.
Fig. 5a is a schematic structural diagram of the chip after step 201 is performed. Wherein 11 is a substrate, 12 is an N-type semiconductor layer, 13 is a light emitting layer, and 14 is a P-type semiconductor layer. As shown in fig. 5a, an N-type semiconductor layer 12, a light-emitting layer 13, and a P-type semiconductor layer 14 are sequentially stacked on a substrate 11.
Also taking the same-side electrode chip as an example, after step 201, a groove may be formed, and the specific forming process may include:
step one, forming photoresist of a fourth pattern on the P-type semiconductor layer by adopting a photoetching technology;
secondly, under the protection of the photoresist of the fourth pattern, performing dry etching on the P-type semiconductor layer and the light-emitting layer to form a groove extending from the P-type semiconductor layer to the N-type semiconductor layer;
and thirdly, removing the photoresist of the fourth pattern.
And the photoresist of the fourth pattern covers the region except the position of the groove on the P-type semiconductor layer, so that the P-type semiconductor layer and the light emitting layer which are not covered by the photoresist are etched by a dry method to form the groove.
Fig. 5b is a schematic structural diagram of the middle chip after the formation of the groove, wherein 40 is the groove. As shown in fig. 5b, the recess 40 extends from the P-type semiconductor layer 14 to the N-type semiconductor layer 12.
Further, the chip may further include a transparent conductive film, and the specific forming process may include:
firstly, paving a transparent conductive material on a P-type semiconductor layer and an N-type semiconductor layer in a groove;
secondly, forming photoresist of a fifth pattern on the paved transparent conductive material by adopting a photoetching technology;
thirdly, under the protection of the photoresist of the fifth graph, carrying out wet etching on the laid transparent conductive material to form a transparent conductive film;
and fourthly, removing the photoresist of the fifth pattern.
And the photoresist of the fifth graph covers the position of the transparent conductive film on the P-type semiconductor layer so as to remove the transparent conductive material in other areas and form the transparent conductive film with the required shape.
FIG. 5c is a schematic diagram of the chip structure after the transparent conductive film is formed. Among them, 30 is a transparent conductive film. As shown in fig. 5c, a transparent conductive film 30 is disposed on the P-type semiconductor layer 14.
After the transparent conductive film is formed, step 202 is performed to form electrodes. Fig. 5d is a schematic diagram of the chip after step 202 is performed. Wherein 20a is an N-type electrode and 20b is a P-type electrode. As shown in fig. 5d, the N-type electrode 20a is disposed on the N-type semiconductor layer 12, the P-type electrode 20b is disposed on the P-type semiconductor layer 14, and the second protective layer of the electrodes extends to other regions of the chip except for the N-type electrode 20a and the P-type electrode 20 b.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (7)
1. A light-emitting diode chip comprises an epitaxial wafer and an electrode, and is characterized in that the electrode comprises an adhesion layer, a reflecting layer, a first protective layer, a routing layer, a second protective layer, a first isolation layer and a second isolation layer, wherein the adhesion layer, the reflecting layer, the first protective layer and the routing layer are sequentially laminated on the epitaxial wafer; the upper surface of the reflecting layer is the surface of the reflecting layer provided with the first protective layer, the side surface of the reflecting layer is the surface of the reflecting layer except the upper surface of the reflecting layer and the surface of the reflecting layer arranged on the adhesive layer, the side surface of the adhesive layer is the surface of the adhesive layer except the surface of the adhesive layer provided with the reflecting layer and the surface of the adhesive layer arranged on the epitaxial wafer,
the material of the first protective layer is nickel, the reflective layer and the routing layer are Al films, the first isolation layer is arranged between the reflective layer and the first protective layer, the first isolation layer is a Ti film or a Cr film, the second isolation layer is arranged between the first protective layer and the routing layer, the second isolation layer is a Ti film or a Cr film, the second protective layer extends to the surface of the epitaxial wafer from the edge area of the upper surface of the first protective layer through the side surfaces of the first protective layer, the first isolation layer, the reflective layer and the adhesion layer,
the distance between the outer edge of the second protective layer above the side surface of the light reflecting layer and the outer edge of the side surface of the light reflecting layer is 2 to 5 μm.
2. The light emitting diode chip of claim 1, wherein the material of the second protective layer is silicon dioxide, silicon nitride or aluminum oxide.
3. The light-emitting diode chip as claimed in claim 1 or 2, wherein the thickness of the second protective layer is 50nm to 1500 nm.
4. The light-emitting diode chip as claimed in claim 1 or 2, wherein the adhesion layer is a Cr film, a Ni film or a Ti film; when the adhesion layer is a Cr film, the thickness of the adhesion layer is 1 nm-5 nm; when the adhesion layer is a Ni film or a Ti film, the thickness of the adhesion layer is 50 nm-150 nm.
5. The light-emitting diode chip as claimed in claim 1 or 2, wherein the thickness of the light-reflecting layer is 50nm to 150 nm.
6. A manufacturing method of a light emitting diode chip is characterized by comprising the following steps:
providing an epitaxial wafer;
forming an electrode on the epitaxial wafer;
the electrode is composed of an adhesion layer, a reflection layer, a first protection layer, a routing layer, a second protection layer, a first isolation layer and a second isolation layer, wherein the adhesion layer, the reflection layer, the first protection layer and the routing layer are sequentially laminated on the epitaxial wafer, and the second protection layer extends to the surface of the epitaxial wafer from the edge area of the upper surface of the first protection layer through the side surfaces of the first protection layer, the first isolation layer, the reflection layer and the adhesion layer; the upper surface of the reflecting layer is the surface of the reflecting layer provided with the first protective layer, the side surface of the reflecting layer is the surface of the reflecting layer except the upper surface of the reflecting layer and the surface of the reflecting layer arranged on the adhesive layer, the side surface of the adhesive layer is the surface of the adhesive layer except the surface of the adhesive layer provided with the reflecting layer and the surface of the adhesive layer arranged on the epitaxial wafer,
the first protective layer is made of nickel, the reflective layer and the routing layer are made of Al films, the first isolation layer is arranged between the reflective layer and the first protective layer, the first isolation layer is a Ti film or a Cr film, the second isolation layer is arranged between the first protective layer and the routing layer, the second isolation layer is a Ti film or a Cr film,
the distance between the outer edge of the second protective layer disposed on the side surface of the light reflecting layer and the outer edge of the side surface of the light reflecting layer is 2 to 5 μm.
7. The method of claim 6, wherein said forming an electrode on said epitaxial wafer comprises:
forming photoresist of a first pattern on the epitaxial wafer by adopting a photoetching technology;
sequentially paving materials of an adhesion layer and a reflective layer on the photoresist of the first pattern and the epitaxial wafer by adopting a magnetron sputtering technology;
removing the photoresist of the first pattern, wherein the material of the adhesive layer on the epitaxial wafer forms an adhesive layer, and the material of the reflective layer on the epitaxial wafer forms a reflective layer;
paving a material of a second protective layer on the light reflecting layer and the epitaxial wafer;
forming a photoresist of a second pattern on the material of the second protective layer by adopting a photoetching technology;
wet etching the material of the second protective layer, wherein the material of the second protective layer covered by the photoresist of the second pattern forms a second protective layer;
removing the photoresist of the second pattern;
forming photoresist of a third pattern on the epitaxial wafer by adopting a photoetching technology;
sequentially paving a material of a first protective layer and a material of a routing layer on the photoresist of the third pattern, the second protective layer and the reflective layer by adopting a magnetron sputtering technology;
and removing the photoresist of the third pattern, forming a first protective layer by using the materials of the second protective layer and the first protective layer on the reflecting layer, and forming a routing layer by using the materials of the second protective layer and the routing layer on the reflecting layer.
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