CN104037277A - LED flip chip manufacturing method and LED flip chip - Google Patents

LED flip chip manufacturing method and LED flip chip Download PDF

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Publication number
CN104037277A
CN104037277A CN201410300102.5A CN201410300102A CN104037277A CN 104037277 A CN104037277 A CN 104037277A CN 201410300102 A CN201410300102 A CN 201410300102A CN 104037277 A CN104037277 A CN 104037277A
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layer
metal
dbr
forming
type semiconductor
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Inventor
姚禹
郑远志
陈向东
康建
梁旭东
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EPITOP OPTOELECTRONIC Co Ltd
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EPITOP OPTOELECTRONIC Co Ltd
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Priority to CN201410300102.5A priority Critical patent/CN104037277A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

The invention provides an LED flip chip manufacturing method and an LED flip chip. The method includes the steps of sequentially growing a buffer layer, an intrinsic semiconductor layer, an N type semiconductor layer, a light-emitting layer and a P type semiconductor layer on a substrate so as to form an epitaxial layer, removing part of the P type semiconductor layer and part of the light-emitting layer to expose part of the N type semiconductor layer, sequentially forming a transparent conducting layer and a DBR layer on the surface of the P type semiconductor layer, forming a metal reflection layer on the surface of the DBR layer, forming through holes in the same positions of the DBR layer and the metal reflection layer to expose part of the N type semiconductor layer and part of the transparent conducting layer, and forming metal conducting layers on the through holes of the DBR layer and the through holes of the metal reflection layer. By means of the method, the problems that when the LED flip chip is manufactured based on the existing technology, due to the limitation of the performance of metal materials, the requirement for the reflection rate and the requirement for electrical conductivity can not be taken into consideration at the same time when the metal reflection layer is manufactured, and the reflection efficiency is lowered are solved.

Description

Preparation method of flip LED chip and flip LED chip
Technical Field
The invention relates to a chip manufacturing technology, in particular to a flip LED chip and a preparation method thereof.
Background
With the development of Light Emitting Diode (LED) technology, LED chips have been widely used in lighting, indication, display and backlight sources, and because the flip-chip LED chip can avoid the shielding of Light by metal electrodes, the area of a Light Emitting region is increased by using a substrate as a Light transmitting surface, and the advantages of Light transmittance and sheet resistance balance are taken into consideration, the flip-chip LED chip has gradually replaced the conventional front-mounted LED chip.
The existing flip-chip LED chip usually forms a reflective layer on an epitaxial surface, and can reflect light of the epitaxial layer to a substrate and emit the light, and the material of the reflective layer may be a metal with high reflectivity, such as silver (Ag), aluminum (Al), etc., or a non-metallic reflective layer formed by a Distributed Bragg Reflector (DBR), or a combination of DBR and a metallic material; the combination form of the DBR and the metal material is taken as an example for explanation, and the insulation performance of the DBR and the conductive performance of the metal can be fully utilized for chip design; in general, the metal reflective layer can form ohmic contact with the transparent conductive layer and the epitaxial layer, respectively, and thus, there is a great limitation in the selection of metal materials, and particularly, the metal reflective layer not only needs to have high reflectivity, but also needs to form good ohmic contact, i.e., high conductivity, for example, the reflective layer is usually formed by using metals such as chromium (Cr), titanium (Ti) or nickel (Ni), and aluminum (Al) or silver (Ag), wherein Cr, Ti or Ni is used for electrical contact and adhesion, and Al or Ag is used for reflecting light, but the addition of Cr, Ti or Ni greatly reduces the reflective effect of the metal reflective layer.
Due to the performance limitation of metal materials, the flip-chip LED chip prepared in the prior art cannot meet the requirements of reflectivity and conductivity when preparing a metal reflective layer, and usually needs to sacrifice part of reflectivity to reduce the reflection efficiency.
Disclosure of Invention
The invention provides a preparation method of a flip LED chip and the flip LED chip, which aim to solve the problem that the flip LED chip prepared in the prior art cannot meet the requirements of reflectivity and conductivity when a metal reflecting layer is prepared due to the performance limitation of a metal material, so that the reflecting efficiency is reduced.
The invention provides a preparation method of a flip LED chip, which comprises the following steps:
sequentially growing a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer on a substrate to form an epitaxial layer;
removing part of the P-type semiconductor layer and part of the light emitting layer to expose part of the N-type semiconductor layer;
sequentially forming a transparent conductive layer and a Distributed Bragg Reflector (DBR) layer on the surface of the P-type semiconductor layer, wherein the transparent conductive layer covers the P-type semiconductor layer, and the DBR layer covers the transparent conductive layer, the N-type semiconductor layer, the light-emitting layer and the P-type semiconductor layer;
forming a metal reflecting layer on the surface of the DBR layer, and forming a through hole at the same position of the DBR layer and the metal reflecting layer to expose part of the N-type semiconductor layer and part of the transparent conducting layer;
and forming a metal conductive layer on the through holes of the DBR layer and the metal reflecting layer.
The method as described above, wherein the forming a metal reflective layer on the surface of the DBR layer and forming a via hole at the same position of the DBR layer and the metal reflective layer, comprises:
forming the metal reflective layer directly on the surface of the DBR layer;
through holes are simultaneously formed through the metal reflective layer and through the DBR layer on the DBR layer and the metal reflective layer.
The method as described above, wherein the forming a metal reflective layer on the surface of the DBR layer and forming a via hole at the same position of the DBR layer and the metal reflective layer, comprises:
forming a via hole on the DBR layer;
and forming a metal reflecting layer on the surface of the DBR layer, and forming a through hole on the metal reflecting layer at the position of the through hole of the DBR layer, wherein the coverage range of the metal reflecting layer does not exceed the coverage range of the DBR layer.
The method as described above, wherein the forming a via hole on the metal reflective layer at the via hole position of the DBR layer, includes:
forming through holes on the metal reflective layer, wherein the through holes comprise through holes which are in the same positions as the through holes of the DBR layer and are used for forming the metal conductive layer, and isolation holes which are used for isolating the metal reflective layer into a first metal reflective layer and a second metal reflective layer which are independent of each other;
the through hole on the first metal reflecting layer is positioned on the N-type semiconductor layer and exposes part of the N-type semiconductor layer, and the through hole on the second metal reflecting layer is positioned on the transparent conducting layer and exposes part of the transparent conducting layer.
The method as defined above, wherein the metallic reflective layer is formed of a single material; or,
the metal reflecting layer is formed by stacking a reflecting layer, a transition layer and a barrier layer which are sequentially formed by multiple materials.
The method as shown above, wherein the forming a metal conductive layer on the DBR layer and the via hole of the metal reflective layer includes:
and forming a metal conductive layer filling the through hole of the DBR layer and the through hole of the metal reflection layer on the through holes of the DBR layer and the metal reflection layer, wherein the metal conductive layer forms mutually independent regions at the positions of the through holes.
The method as above, wherein the metal conductive layer comprises a first metal conductive layer and a second metal conductive layer, the first metal conductive layer is on the first metal reflective layer, and the second metal conductive layer is on the second metal reflective layer; forming a metal conductive layer on the via holes of the DBR layer and the metal reflective layer, including:
removing part of the metal reflecting layer to enable the through holes in the first metal reflecting layer to be communicated with the through holes in the second metal reflecting layer respectively;
and forming through holes respectively connecting the first metal conductive layer and the second metal conductive layer on the DBR layer and the metal reflecting layer, wherein the first metal conductive layer and the second metal conductive layer are independent.
The method as described above, further comprising: forming an insulating layer on the metal reflecting layer and the metal conducting layer, and forming a through hole exposing part of the metal conducting layer on the insulating layer;
and forming a metal electrode layer on the through hole of the insulating layer.
The method as shown above, wherein the number of the through holes on the insulating layer is at least two, one through hole is located on the first metal conductive layer, and the other through hole is located on the second metal conductive layer and is respectively disposed at two ends of the flip LED chip;
the metal electrode layer comprises a first metal electrode layer covering the first metal conducting layer and a second metal electrode layer covering the second metal conducting layer.
The invention further provides a flip LED chip, and the flip LED chip is prepared by the preparation method of the flip LED chip.
In the method for manufacturing the flip LED chip and the flip LED chip provided in this embodiment, an epitaxial layer composed of a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer is formed on a substrate, after a portion of the P-type semiconductor layer and a portion of the light emitting layer are removed and a portion of the N-type semiconductor layer is exposed, a transparent conductive layer, a DBR layer, and a metal reflective layer are sequentially formed on a surface of the P-type semiconductor layer, and a through hole is formed at the same position of the DBR layer and the metal reflective layer to expose a portion of the N-type semiconductor layer and a portion of the transparent conductive layer, thereby forming a metal conductive layer on the through hole, and the flip LED chip manufactured by forming a metal reflective layer for reflecting light and a metal conductive layer for ohmic contact, respectively, solves the performance limitation of the, the problem of reflection efficiency reduction caused by the fact that the requirements of reflectivity and conductivity cannot be met when the metal reflecting layer is prepared is solved, and the luminous efficiency of the flip LED chip is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a flowchart of an embodiment of a method for manufacturing a flip LED chip according to the present invention;
fig. 2 is a schematic diagram of a chip structure of a process of a method for manufacturing a flip LED chip according to the embodiment shown in fig. 1;
fig. 3 is a schematic diagram of a chip structure of a process of a method for manufacturing a flip LED chip according to the embodiment shown in fig. 1;
fig. 4 is a schematic diagram of a chip structure of a process of a method for manufacturing a flip LED chip according to the embodiment shown in fig. 1;
fig. 5 is a schematic diagram of a chip structure of a process of a method for manufacturing a flip LED chip according to the embodiment shown in fig. 1;
fig. 6 is a schematic diagram of a chip structure of a process of a method for manufacturing a flip LED chip according to the embodiment shown in fig. 1;
FIG. 7 is a top view of a metal conductive layer of a flip LED chip provided in the embodiment of FIG. 1;
FIG. 8 is a flow chart of another embodiment of a method for fabricating a flip-chip LED chip according to the present invention;
FIG. 9 is a top view of a metal conductive layer of a flip LED chip provided in the embodiment of FIG. 8;
fig. 10 is a schematic diagram of a chip structure of a process of the method for manufacturing the flip LED chip according to the embodiment shown in fig. 8.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a flowchart of an embodiment of a method for manufacturing a flip-chip LED chip according to the present invention. As shown in fig. 1, the method of this embodiment may include:
and S110, growing a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer on the substrate in sequence to form an epitaxial layer.
In the process of chip preparation, a semiconductor wafer is usually used as a substrate material, and in this embodiment, when a flip-chip LED chip is prepared, a commonly used sapphire is taken as the substrate material at present as an example for explanation, as shown in fig. 2, which is a schematic chip structure diagram of a process of the preparation method of the flip-chip LED chip provided in the embodiment shown in fig. 1, a buffer layer 110, an intrinsic semiconductor layer (not shown in the figure), an N-type semiconductor layer 120, a light emitting layer (not shown in the figure) and a P-type semiconductor layer 130 are sequentially grown on the substrate 100; in the flip LED chip prepared in the present embodiment, the N-type semiconductor layer 120 may be, for example, an N-type gallium nitride layer, and the P-type semiconductor layer 130 may be, for example, a P-type gallium nitride layer.
It should be noted that, in the embodiments of the present invention, the intrinsic semiconductor layer and the light emitting layer are both conventional process layers in the process of manufacturing a flip-chip LED chip, and therefore, are not shown in the schematic diagram of the chip structure of the process provided in each of the following embodiments of the present invention.
And S120, removing part of the P-type semiconductor layer and part of the light emitting layer to expose part of the N-type semiconductor layer.
In the present embodiment, a photoresist mask pattern is manufactured through a photolithography process, and then an Inductively Coupled Plasma (ICP) etching apparatus is used to selectively etch the P-type semiconductor layer 130 and the light emitting layer in a process window pattern preset on the mask pattern to expose a portion of the N-type semiconductor layer 120, i.e., the N-type semiconductor layer 120 at a process window pattern position preset on the mask pattern, as shown in fig. 3, which is a schematic chip structure diagram of a process procedure of the method for manufacturing a flip-chip LED chip provided in the embodiment shown in fig. 1.
And S130, sequentially forming a transparent conductive layer and a DBR layer on the surface of the P-type semiconductor layer, wherein the transparent conductive layer covers the P-type semiconductor layer, and the DBR layer covers the transparent conductive layer, the N-type semiconductor layer, the light emitting layer and the P-type semiconductor layer.
In this embodiment, the transparent conductive layer 140 may be formed by evaporation or sputtering on the structure shown in fig. 3, and the material of the transparent conductive layer 140 may be, for example, nano Indium Tin Oxides (ITO) or Indium oxide (Indium oxide) (Indium Tin oxide, or Indium Tin oxide (Indium Tin oxide, Indium Tin oxideInO), tin oxide (SnO), arsenic trioxide (As)2O3For short: ATO), zinc oxide (ZnO), gallium phosphide (GaP) or a combination thereof, and a photoresist mask pattern is manufactured through a photoetching process, a preset process window pattern is further formed through an etching process, the transparent conducting layer 140 covers the upper part of the P-type semiconductor layer 130, namely, the etched process window is the exposed area of the N-type semiconductor layer 120; similarly, the DBR reflective layer 150 is grown by evaporation or sputtering, and the material of the DBR reflective layer 150 is typically an oxide, such as silicon oxide (SiO)2) Or titanium oxide (Ti)3O5) (ii) a Specifically, the DBR layer 150 covers the transparent conductive layer 140, the N-type semiconductor layer 120, the light emitting layer and the P-type semiconductor layer 130, and since the P-type semiconductor layer 130, a portion of the light emitting layer and a portion of the N-type semiconductor layer 120 are removed in the above process, the DBR reflective layer 150 can completely cover the sidewalls formed by the N-type semiconductor layer 120 and the light emitting layer P-type semiconductor layer 130; fig. 4 is a schematic diagram of a chip structure of a process of the method for manufacturing a flip LED chip according to the embodiment shown in fig. 1.
It should be noted that, in this embodiment, the process window patterns preset on the mask patterns in different process steps are usually different, and are determined according to the structure of the flip-chip LED chip to be manufactured, and the mask patterns are prepared in advance before the process production.
S140, a metal reflective layer is formed on the surface of the DBR layer, and a via hole is formed at the same position of the DBR layer and the metal reflective layer to expose a portion of the N-type semiconductor layer and a portion of the transparent conductive layer.
In this embodiment, similarly, a photoresist mask pattern is fabricated through a photolithography process, and then a process window pattern preset on the mask pattern is removed through plasma etching, chemical etching or stripping, so as to expose a portion of the transparent conductive layer 140 and a portion of the N-type semiconductor layer 120; it should be noted that the exposed transparent conductive layer 140 is located above the P-type semiconductor layer 130 and is used for forming an ohmic contact layer in a P-type region, and the exposed N-type semiconductor layer 120 is used for forming an ohmic contact layer in an N-type region, as shown in fig. 5, a schematic chip structure diagram of a process of the method for manufacturing a flip-chip LED chip according to the embodiment shown in fig. 1 is shown.
In the flip LED chip prepared by the method of this embodiment, the metal reflective layer 160 formed on the DBR layer 150 is used to reflect the light of the epitaxial layer back and emit the light through the sapphire substrate, and the material of the metal reflective layer 160 directly affects the light emitting efficiency of the flip LED chip; for example, the metal reflective layer 160 can be made of a single material; the reflective layer can be formed by stacking a reflective layer, a transition layer and a barrier layer, which are sequentially formed by a plurality of materials, in a specific implementation, the reflective layer can be formed by metal with higher reflectivity, such as Al or Ag, when the thickness of the reflective layer is greater than or equal to 1000A, the reflective layer can have better reflection effect, the transition layer can be formed by metal materials such as Cr, rhodium (Rh), Ti and the like, and is responsible for the effect of enhancing the adhesion between the reflective layer and the barrier layer, because the transition layer is positioned on the reflective layer and does not obstruct the reflection effect of the reflective layer on light, because the metal such as Al, Ag and the like forming the reflective layer has active chemical properties, the migration of the material is easy to occur under the effect of temperature and current, therefore, the barrier layer can be formed by metal or nonmetal oxide with inactive chemical properties and thermal properties, and the barrier layer can be protected from being corroded or oxidized easily in subsequent processing, and can hinder the emergence of electromigration, effectively avoid the electric leakage of chip.
And S150, forming a metal conductive layer on the through holes of the DBR layer and the metal reflecting layer.
Taking the metal reflective layer formed by combining the currently commonly used DBR and metal material as an example, the process is specifically as follows: the metal layer formed on the DBR layer not only needs to reflect light of the epitaxial layer, but also needs to form ohmic contact, so that the selection of the metal material is greatly limited; in particular, the metal reflective layer is required to have not only high reflectivity but also good ohmic contact, i.e., higher conductivity, for example, in the wavelength range of 470-520 nm, the optimal reflectivities of Ag film and Al film are close to 95% and 84%, respectively, however, Ag and Al have low conductivity and are not easy to form excellent ohmic contact, and when the prior art provides a solution to this problem, by using a metal, such as Cr, Ti or Ni, which can form a good ohmic contact, as an underlayer metal, further, the reflective metal is plated on the underlayer metal, and for example, Cr, Ti or Ni is used as the underlayer metal, Al or Ag is used as the reflective layer metal, although the metal reflecting layer formed by the scheme can comprehensively consider the requirements on two performance indexes of reflectivity and conductivity, however, the addition of Cr, Ti or Ni still greatly reduces the reflection effect of the metal reflective layer.
In this embodiment, the metal conductive layer 170 and the metal reflective layer 160 are separately prepared by forming the metal conductive layer 170 on the via holes of the DBR layer 150 and the metal reflective layer 160, and therefore, the materials for forming the metal reflective layer 160 and the metal conductive layer 170 can be respectively materials meeting the requirements of the performance of the corresponding layer; for example, Ag or Al with a high reflectivity may be used to prepare the reflective layer in the metal reflective layer 160, and after a single reflective layer metal is applied, Cr or Ti may be further plated to form a transition layer, so as to ensure the adhesion and chemical stability of the metal reflective layer 160, and Au is further plated to form a shielding layer, and the metal reflective layer 160 is formed by the reflective layer, the transition layer, and the shielding layer at the same time; in another implementation of this embodiment, after applying a single reflective layer metal, an oxide or silicide, such as SiO, may be added2、TiO2、SiONx、SiNxOr a combination thereof, the metallic reflective layer 160 in this embodiment may include only a reflective layer and a shield layer since the shield layer is formed of an oxide or a silicide; the metal conductive layer 170 is made of a metal material with excellent conductivity, and in this embodiment, the metal reflective layer 160 and the metal conductive layer 170 are respectively made of a metal material, and the selection of the metal material can respectively meet the requirements of reflectivity and conductivity.
Further, in the method provided in this embodiment, S160 may include: forming a metal conductive layer 170 filling the via hole of the DBR layer 150 and the via hole of the metal reflective layer 160 on the via holes of the DBR layer 150 and the metal reflective layer 160; alternatively, the metal conductive layer 170 forms mutually independent regions at the positions of the through holes; since the vias formed on the DBR layer 150 and the metal reflective layer 160 are overlapped, specifically, the metal conductive layer 170 filling the via exposing a portion of the N-type semiconductor layer 120 is used to form an ohmic contact for an N-type region, and the metal conductive layer 170 filling the via exposing a portion of the transparent conductive layer 140 is used to form an ohmic contact for a P-type region, the metal conductive layer 170 in this embodiment may be metal filling layers with mutually independent via positions on the DBR layer 150 and the metal reflective layer 160, as shown in fig. 6, a chip configuration diagram of a process of a method for manufacturing a flip-chip LED chip provided in the embodiment shown in fig. 1, as shown in fig. 7, a top view of the metal conductive layer of a flip-chip LED chip provided in the embodiment shown in fig. 1, and the metal reflective layer 160 under the metal conductive layer 170 only shown in fig. 7, generally, the metal reflective layer 160 may be divided into mutually independent vias above the N-type semiconductor layer 120 and above the transparent conductive layer 140 The region, the N-type semiconductor layer 120 and the metal reflective layer 160 above the transparent conductive layer 140 are separated by the isolation hole 163.
In the method for manufacturing a flip-chip LED chip according to this embodiment, an epitaxial layer including a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a light emitting layer, and a P-type semiconductor layer is formed on a substrate, a portion of the P-type semiconductor layer and a portion of the light emitting layer are removed, and a portion of the N-type semiconductor layer is exposed, then a transparent conductive layer, a DBR layer, and a metal reflective layer are sequentially formed on a surface of the P-type semiconductor layer, and a through hole is formed at the same position of the DBR layer and the metal reflective layer to expose a portion of the N-type semiconductor layer and a portion of the transparent conductive layer, and further a metal conductive layer is formed on the through hole. The luminous efficiency of the flip LED chip is improved.
Optionally, in an implementation manner of this embodiment, S140 may include: forming a metal reflective layer 160 directly on the surface of the DBR layer 150; and simultaneously forming via holes through the metallic reflective layer 160 and through the DBR layer 150 on the DBR layer 150 and the metallic reflective layer 160. In this embodiment, the through holes for filling the metal conductive layer 170 are formed by one-time photolithography and etching, which can save the manufacturing process of the flip LED chip and reduce the manufacturing cost.
Fig. 8 is a flowchart of another embodiment of a method for manufacturing a flip-chip LED chip according to the present invention. In another possible implementation manner of the foregoing embodiment, S140 may include: s141, forming a via hole on the DBR layer; and S142, forming a metal reflecting layer on the surface of the DBR layer, and forming a through hole on the metal reflecting layer at the through hole position of the DBR layer, wherein the coverage range of the metal reflecting layer does not exceed the coverage range of the DBR layer. In this embodiment, the through holes on the DBR layer 150 and the through holes on the metal reflective layer 160 are formed by two photolithography and etching processes, which increases the number of process steps compared to the above embodiment, but the diameter of the through holes on the metal reflective layer 160 can be designed to be greater than or equal to the diameter of the through holes on the DBR layer 150 when the through holes are formed by using mask patterns manufactured by different photolithography steps, so as to ensure that the coverage area of the metal reflective layer 160 does not exceed the coverage area of the DBR layer 150, which is beneficial to preventing the leakage of the flip-chip LED chip and improving the use efficiency of the chip.
Further, in this embodiment, a specific manner of forming the via hole on the metal reflective layer 160 at the via hole position of the DBR layer 150 in S142 may include: forming a via hole on the metal reflective layer 160, the via hole including a via hole for forming the metal conductive layer 170 at the same position as the via hole of the DBR layer 150, and an isolation hole 163 for isolating the metal reflective layer 160 into the first metal reflective layer 161 and the second metal reflective layer 162 independent of each other; the through hole on the first metal reflective layer 161 is located on the N-type semiconductor layer 120 and exposes a portion of the N-type semiconductor layer 120, and the through hole on the second metal reflective layer 162 is located on the transparent conductive layer 140 and exposes a portion of the transparent conductive layer 140. Fig. 9 is a top view of a metal conductive layer of a flip-chip LED chip according to the embodiment shown in fig. 8.
Similarly, in the flip-chip LED chip prepared by the method of the present embodiment, the metal conductive layer 170 may also include a first metal conductive layer 171 and a second metal conductive layer 172, specifically, the first metal conductive layer 171 is located on the first metal reflective layer 161, and the second metal conductive layer 171 is located on the second metal reflective layer 172. In a specific implementation, a specific manner of forming the metal conductive layer 170 may be: removing part of the metal reflective layer 160 so that the through holes on the first metal reflective layer 161 and the through holes on the second metal reflective layer 162 are respectively communicated; a first metal conductive layer 171 and a second metal conductive layer 172 are formed on the via holes of the DBR layer 150 and the metal reflective layer 160, respectively, wherein the first metal conductive layer 171 and the second metal conductive layer 172 are independent of each other.
In this embodiment, the first metal conductive layer 171 covers the through hole formed by the DBR layer 150 and the first metal reflective layer 161, and forms an ohmic contact with the first semiconductor layer 120; the second metal conductive layer 172 covers the through hole formed by the DBR layer 150 and the second metal reflective layer 162, and forms an ohmic contact with the transparent conductive layer 140; since the metal conductive layer 170 is located on the metal reflective layer 160, and its design structure does not affect the reflective effect of the metal reflective layer 170, in this embodiment, the first metal conductive layer 171 and the second metal conductive layer 172 are designed to be respectively continuous layout structures, which is beneficial to uniformly conducting current in the metal conductive layer 170, and the material of the metal conductive layer 170 may be a commonly used electrode material, such as a combination of metals like Cr, platinum (Pt), Au, Ti, and Al.
It should be noted that, as for the structure of the metal conductive layer 170 designed to be independent from each other at the position of the via hole, or the structure of the first metal conductive layer 171 and the second metal conductive layer 172 designed to be respectively laid out in series, the selection conditions may be generally: if the barrier layer of the metal reflective layer 160 is made of a metal material, the metal conductive layer 170 may be disposed as mutually independent regions at the positions of the through holes due to its good conductive performance; if the barrier layer is made of an insulating oxide material, the first metal conductive layer 171 and the second metal conductive layer 172 may be respectively and continuously disposed to achieve a better conductive effect.
Further, the method provided by this embodiment further includes: s160, forming an insulating layer 180 on the metal reflective layer 160 and the metal conductive layer 170, and forming a via hole exposing a portion of the metal conductive layer 170 on the insulating layer 180; s170, a metal electrode layer 190 is formed on the via hole of the insulating layer 180. Specifically, the number of the through holes on the insulating layer 180 is at least two, wherein one through hole is located on the first metal conductive layer 171, and the other through hole is located on the second metal conductive layer 172; the metal electrode layer 190 comprises a first metal electrode layer 191 covering the first metal conductive layer 171 and a second metal electrode layer 192 covering the second metal conductive layer 172, the first metal electrode layer 191 is an N-pole pin of the flip LED chip, and the second metal electrode layer 192 is a P-pole pin of the flip LED chip; preferably, two through holes on the insulating layer 180 may be respectively disposed at both ends of the flip LED chip, i.e., the first metal electrode layer 191 and the second metal electrode layer 192 are respectively disposed at both ends of the flip LED chip; fig. 10 is a schematic diagram of a chip structure of a process of the method for manufacturing a flip LED chip according to the embodiment shown in fig. 8. In a specific implementation of this embodiment, the insulating layer 180 may be formed by conventional vapor deposition or evaporation, and wet etching or plasma etching is performed on the insulating layer 180 to expose a portion of the first metal conductive layer 171 and a portion of the first metal conductive layer 172; the material of the insulating layer 180 may be, for example, SiO2、SiN、Al2O3One or a combination thereof, and the thickness of the material can be generally 4000-10000A; the metal electrode layer 190 may also be formed by conventional evaporation, and the material may be, for example, one or a combination of Cr, Al, Ti, Ni, Au, etc., but is not limited to the combination of these metals.
In the method for manufacturing the flip LED chip provided in each of the above embodiments, after the metal electrode layer is formed, the manufactured wafer may be ground and cut according to a conventional process method to obtain the flip LED chip.
According to the preparation method of the flip LED chip provided by the embodiment of the invention, the basic unit structures such as the transparent conducting layer, the DBR layer and the metal reflecting layer with better performance are adopted, and the metal conducting layers which are respectively connected and arranged in the N-type region and the P-type region are adopted to optimize current distribution, so that the current expansion distribution is more reasonable, the problem that the reflectivity is reduced due to the fact that other metals are additionally plated at the bottom when the metal reflecting layer serves as the conducting layer in the prior art is solved, the product brightness of the flip LED chip is improved to the maximum degree, meanwhile, the metal reflecting layer does not participate in current expansion, the occurrence of metal electromigration is avoided, and the product reliability is improved.
Fig. 10 is a schematic structural diagram of an embodiment of a flip LED chip according to the present invention. The flip LED chip provided in this embodiment is manufactured by the method described in any embodiment of the present invention, and it should be noted that the flip LED chip provided in this embodiment is manufactured by a flip mounting method after being packaged, specifically, the metal electrode layer 190, i.e., the light emitting portion of the flip LED chip, is connected to the support, the substrate 100 is upward, i.e., above the illumination lamp, and the electrode emits light and then penetrates through the substrate, so the flip LED chip is usually manufactured by using a sapphire substrate with high light transmittance.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (10)

1. A preparation method of a flip LED chip is characterized by comprising the following steps:
sequentially growing a buffer layer, an intrinsic semiconductor layer, an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer on a substrate to form an epitaxial layer;
removing part of the P-type semiconductor layer and part of the light emitting layer to expose part of the N-type semiconductor layer;
sequentially forming a transparent conductive layer and a Distributed Bragg Reflector (DBR) layer on the surface of the P-type semiconductor layer, wherein the transparent conductive layer covers the P-type semiconductor layer, and the DBR layer covers the transparent conductive layer, the N-type semiconductor layer, the light-emitting layer and the P-type semiconductor layer;
forming a metal reflecting layer on the surface of the DBR layer, and forming a through hole at the same position of the DBR layer and the metal reflecting layer to expose part of the N-type semiconductor layer and part of the transparent conducting layer;
and forming a metal conductive layer on the through holes of the DBR layer and the metal reflecting layer.
2. The method of claim 1, wherein forming a metal reflective layer on the surface of the DBR layer and forming a via hole at the same position of the DBR layer and the metal reflective layer comprises:
forming the metal reflective layer directly on the surface of the DBR layer;
through holes are simultaneously formed through the metal reflective layer and through the DBR layer on the DBR layer and the metal reflective layer.
3. The method of claim 1, wherein forming a metal reflective layer on the surface of the DBR layer and forming a via hole at the same position of the DBR layer and the metal reflective layer comprises:
forming a via hole on the DBR layer;
and forming a metal reflecting layer on the surface of the DBR layer, and forming a through hole on the metal reflecting layer at the position of the through hole of the DBR layer, wherein the coverage range of the metal reflecting layer does not exceed the coverage range of the DBR layer.
4. The method of claim 3, wherein forming the via on the metal reflective layer at the via location of the DBR layer comprises:
forming through holes on the metal reflective layer, wherein the through holes comprise through holes which are in the same positions as the through holes of the DBR layer and are used for forming the metal conductive layer, and isolation holes which are used for isolating the metal reflective layer into a first metal reflective layer and a second metal reflective layer which are independent of each other;
the through hole on the first metal reflecting layer is positioned on the N-type semiconductor layer and exposes part of the N-type semiconductor layer, and the through hole on the second metal reflecting layer is positioned on the transparent conducting layer and exposes part of the transparent conducting layer.
5. The method of claim 1, wherein the metallic reflective layer is formed of a single material; or,
the metal reflecting layer is formed by stacking a reflecting layer, a transition layer and a barrier layer which are sequentially formed by multiple materials.
6. The method of claim 1, wherein said forming a metal conductive layer over the vias of the DBR layer and the metal reflective layer comprises:
and forming a metal conductive layer filling the through hole of the DBR layer and the through hole of the metal reflection layer on the through holes of the DBR layer and the metal reflection layer, wherein the metal conductive layer forms mutually independent regions at the positions of the through holes.
7. The method of claim 4, wherein the metal conductive layer comprises a first metal conductive layer and a second metal conductive layer, the first metal conductive layer being on a first metal reflective layer, the second metal conductive layer being on a second metal reflective layer; forming a metal conductive layer on the via holes of the DBR layer and the metal reflective layer, including:
removing part of the metal reflecting layer to enable the through holes in the first metal reflecting layer to be communicated with the through holes in the second metal reflecting layer respectively;
and forming through holes respectively connecting the first metal conductive layer and the second metal conductive layer on the DBR layer and the metal reflecting layer, wherein the first metal conductive layer and the second metal conductive layer are independent.
8. The method of any one of claims 1 to 7, further comprising:
forming an insulating layer on the metal reflecting layer and the metal conducting layer, and forming a through hole exposing part of the metal conducting layer on the insulating layer;
and forming a metal electrode layer on the through hole of the insulating layer.
9. The method of claim 8, wherein the number of the through holes on the insulating layer is at least two, wherein one through hole is located on the first metal conductive layer, and the other through hole is located on the second metal conductive layer and is respectively disposed at two ends of the flip-chip LED chip;
the metal electrode layer comprises a first metal electrode layer covering the first metal conducting layer and a second metal electrode layer covering the second metal conducting layer.
10. A flip LED chip, characterized in that the flip LED chip is manufactured by the method of any one of claims 1 to 9.
CN201410300102.5A 2014-06-26 2014-06-26 LED flip chip manufacturing method and LED flip chip Pending CN104037277A (en)

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