CN106158842A - 正装芯片级白光led灯丝光源及其封装方法 - Google Patents
正装芯片级白光led灯丝光源及其封装方法 Download PDFInfo
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Abstract
本发明公开了一种正装芯片级白光LED灯丝光源及其封装方法,灯丝光源包括透明基板、多个外延芯片及荧光粉膜,所述透明基板上设置有线路焊盘,在该透明基板对应外延芯片大小的线路焊盘上设置有多个导电层,所述多个外延芯片覆晶在相应对位的该透明基板的多个导电层上,且每个正装芯片上均贴覆压合有所述荧光粉膜。本发明利用特别设计的加大电极及把另一有电极高度差的一端电极进行电极化镀金,让外延芯片电极具有较大的面积及同一高度,增加制程简易化,且直接贴覆压合荧光粉膜,形成可直接发白光的白光芯片,可解决荧光粉胶应用过程中的沉淀问题,增加灯丝产品的利用率。
Description
技术领域
本发明涉及LED照明的技术领域,特别是指一种正装芯片级白光LED灯丝光源及其封装方法。
背景技术
传统照明灯具的灯丝一般由钨丝等可直接发光的金属丝构成,这类灯丝普遍存在着寿命短、功耗大等缺陷,且一般仅能发出黄色光,显色性较差。由于LED具有节能、高寿命、高光效、环保、固态封装等特点,LED照明市场将逐渐取代传统的照明灯具而进入各种应用领域。
因此,市面上出现了一系列类似钨丝设计的LED 光源灯丝,用来组装成LED 球泡灯和蜡烛灯后,效果非常不错。但现有灯丝光源需要进行固晶,焊线,封胶的过程。其中的焊线部分由于需打上金线进行导通,造成芯片出通的遮挡,亮度会降低。另外后制程的封胶,需要先进行荧光胶的预置备,用点胶方式进行涂布时间较长,胶中的荧光粉将会沉淀,造成封装好后的灯丝色温变动过大,可用的成品率过低 。
有鉴于此,本设计人针对上述LED灯丝光源结构设计上未臻完善所导致的诸多缺失及不便,而深入构思,且积极研究改良试做而开发设计出本发明。
发明内容
本发明的目的在于解决现有技术中荧光粉沉淀导致封装好后的灯丝色温变动过大,可用的成品率低,以及由于金线遮挡,导致芯片亮度降低等问题,而提供一种正装芯片级白光LED灯丝光源及其封装方法。
为了达成上述目的,本发明的解决方案是:
一种正装芯片级白光LED灯丝光源,其包括透明基板、多个外延芯片及荧光粉膜,所述透明基板上设置有线路焊盘,各外延芯片包括衬底、N电子层、P电子层、及保护层;N电子层设于衬底的一面上,该N电子层具有高端及低端,所述P电子层设于该N电子层的高端上,该P电子层上设有P电极,N电子层的低端上设有N电极,该P电极的顶端与N电极的顶端平齐,所述保护层包覆在P电极及N电极的外侧,所述P电极及所述N电极的面积分别占该外延芯片面积的1/8-1/3,在该透明基板对应外延芯片大小的线路焊盘上设置有多个与该外延芯片的P电极及N电极对应的导电层,所述各外延芯片的P电极及N电极覆晶在透明基板的导电层上,所述荧光粉膜贴覆压合在各外延芯片的衬底另一面及该外延芯片的四个侧面上。
所述导电层为金、银、锡、镍及对应的合金中的任意一种。
所述各外延芯片位于透明基板的线路焊盘的不同位置,外延芯片大则与相邻外延芯片的相对位置间距大,芯片小则与相邻外延芯片的相对位置间距小,间距比例为外延芯片大小的1至5倍。
所述各外延芯片的P电极与N电极呈对角线对称或呈水平边对称。
所述各外延芯片的P电极及N电极的面积相等。
所述外延芯片的P电极及N电极的面积为一大一小。
一种正装芯片级白光LED灯丝光源的封装方法,其包括以下步骤:
步骤1:于透明基板对应外延芯片大小的线路焊盘上,进行银胶或锡膏的涂覆;
步骤2:利用固晶机将贴有荧光粉膜的直接发白光外延芯片的P电极及N电极覆晶在相应对位的透明基板的银胶或锡膏上;
步骤3:进行预成型支架的贴合 ;
步骤4:进行回焊或烤箱烘烤;
步骤5:将烘烤完成的带外延芯片的透明基板切割成灯丝光源需要的长度。
进一步,步骤1中,所述银胶或锡膏的涂覆采用印刷或者涂布的方式。
进一步,步骤1中,各外延芯片位于透明基板的线路焊盘的不同位置,外延芯片大则与相邻外延芯片的相对位置间距大,芯片小则与相邻外延芯片的相对位置间距小,间距比例为外延芯片大小的1至5倍。
进一步,步骤5中,所述带有外延芯片的透明基板的切割是利用激光或钻石刀切割机。
一种如权利要求1所述的正装芯片级白光LED灯丝光源的封装方法,其包括以下步骤:
步骤1:于透明基板对应外延芯片大小的线路焊盘上,进行银胶或锡膏的涂覆,涂覆面积为外延芯片面积的1/8-1/3;
步骤2:利用固晶机将外延芯片的P电极及N电极覆晶在相应对位的透明基板的银胶或锡膏上,各外延芯片的P电极及N电极的电极面积为该外延芯片面积的1/8-1/3;
步骤3:进行预成型支架的贴合 ;
步骤4:进行回焊或烤箱烘烤;
步骤5:利用预制荧光粉膜贴覆在透明基板及外延芯片上;
步骤6:利用红外线或真空烤箱进行烘烤;
步骤7:将烘烤完成的带外延芯片的透明基板切割成灯丝光源需要的长度。
采用上述结构后,本发明正装芯片级白光LED灯丝光源及其封装方法是利用预先制备好电极特别设计的加大电极的正装外延芯片,及把外延芯片另一有电极高度差的一端电极进行电极化镀金制程,让各外延芯片具有较大的面积及同一高度,如此可增加制程简易化,且增大电极面积可使导热更好,并可提高生产良率,将预先制作好的薄层荧光粉膜,直接贴覆压合在外延芯片上,形成可直接可发白光的芯片级芯片,具有良好稳定色温的荧光粉膜,可解决荧光粉胶应用过程中的沉淀问题。同时 ,本发明不需要金线的焊接,利用直接印刷或涂布锡膏或银胶进行导通,缩短制程时间,减低焊接的虚焊断路产生的不良率,直接荧光粉膜贴覆压合,减低因为荧光粉沉淀的光学特性变动不良,增加灯丝产品的可用率。
与现有LED灯丝光源相较,本发明与现有结构功能不同: 本发明为不需进行金线焊接,该灯丝光源的各外延芯片为五面发光,外延芯片有效发光面完全覆盖,发光范围更大,且荧光粉膜直接贴覆不需进行配胶,点胶,发光均匀,不易漏蓝光,避免荧光粉沉淀。本发明与现有结构结构不同 : 直接进行支架贴合,无须后续独立的支架贴合或像目前的灯丝支架基板先切割成小片再贴合在支架上的不连续性。本发明工艺简单,可以免贴片,可以有效的降低成本。
附图说明
图1为本发明正装芯片级白光LED灯丝光源的侧视图。
图2为本发明外延芯片的正视图。
图3为本发明外延芯片的侧视图。
图4为本发明外延芯片贴覆荧光粉膜形成白光芯片的侧视图。
图5为本发明外延芯片贴覆荧光粉膜形成白光芯片的正视图。
图6为本发明透明基板未切割状态的俯视图。
图7为本发明正装芯片级白光LED灯丝光源未切割状态的局部俯视图。
图8为本发明正装芯片级白光LED灯丝光源的封装流程的侧视图。
图9为本发明正装芯片级白光LED灯丝光源的封装流程的俯视图。
图10为本发明封装流程的另一实施方式流程图。
具体实施方式
为了进一步解释本发明的技术方案,下面通过具体实施例来对本发明进行详细阐述。
如图1至图7所示,本发明揭示了一种正装芯片级白光LED灯丝光源,其包括透明基板10、多个外延芯片20及荧光粉膜30,所述透明基板10上设置有线路焊盘11,各外延芯片20包括衬底21、N电子层22、P电子层23、及保护层24;N电子层22设于衬底21的一面上,该N电子层22具有高端及低端,所述P电子层23设于该N电子层22的高端上,该P电子层23上设有P电极231,N电子层22的低端上设有N电极221,该P电极231的顶端与N电极221的顶端平齐,所述保护层24包覆在P电极231及N电极221的外侧,所述P电极231及所述N电极221的面积分别占该外延芯片20面积的1/8-1/3,在该透明基板10对应外延芯片20大小的线路焊盘上设置有多个与该外延芯片20的P电极231及N电极221对应的导电层40,所述导电层可为锡膏或者银胶,所述各外延芯片20的P电极231及N电极221覆晶在透明基板10的导电层40上,所述荧光粉膜30贴覆压合在各外延芯片20的衬底21另一面及该外延芯片20的四个侧面上。
所述各外延芯片20位于透明基板10的线路焊盘11的不同位置,外延芯片20大则与相邻外延芯片20的相对位置间距大,外延芯片20小则与相邻外延芯片20的相对位置间距小,间距比例为外延芯片20大小的1至5倍。
所述各外延芯片20的P电极231与N电极221呈对角线对称或呈水平边对称。
所述各外延芯片20的P电极231及N电极221的面积可以为相等,也可为一大一小。
如图1至图7,并配合图8及图9所示,本发明还揭示了一种正装芯片级白光LED灯丝光源的封装方法,其包括以下步骤:
步骤1:于透明基板10对应外延芯片大小的线路焊盘11上,进行银胶或锡膏40的涂覆;
步骤2:利用固晶机将贴有荧光粉膜30的直接发白光外延芯片20的P电极231及N电极221覆晶在相应对位的透明基板10的银胶或锡膏40上;
步骤3:进行预成型支架的贴合(图中未示意);
步骤4:进行回焊或烤箱烘烤(图中未示意);
步骤5:将烘烤完成的带外延芯片的透明基板切割成灯丝光源需要的长度。
进一步,步骤1中,所述银胶或锡膏40的涂覆采用印刷或者涂布的方式。
进一步,步骤1中,各外延芯片20位于透明基板10的线路焊盘11的不同位置,外延芯片20大则与相邻外延芯片20的相对位置间距大,外延芯片小则与相邻外延芯片20的相对位置间距小,间距比例为外延芯片20大小的1至5倍。
进一步,步骤5中,所述带有外延芯片的透明基板的切割是利用激光或钻石刀切割机。
本实施例中,该正装芯片级白光LED灯丝光源的封装方法是将各正装的外延芯片20预先制作完后贴覆荧光粉膜30,使每颗外延芯片20形成直接可发白光的白光芯片,再将各白光芯片直接覆晶在透明基板10上,形成白光LED灯丝光源。
如图1至图7,并配合图10所示,本发明正装芯片级白光LED灯丝光源的封装方法还可采用如下的方案:
一种正装芯片级白光LED灯丝光源的封装方法,其包括以下步骤:
步骤1:于透明基板10对应外延芯片20大小的线路焊盘11上,进行银胶或锡膏40的涂覆,涂覆面积为外延芯片20面积的1/8-1/3;
步骤2:利用固晶机将外延芯片20的P电极231及N电极221覆晶在相应对位的透明基板10的银胶或锡膏40上,各外延芯片的P电极及N电极的电极面积为该外延芯片20面积的1/8-1/3;
步骤3:进行预成型支架的贴合(图中未示意);
步骤4:进行回焊或烤箱烘烤(图中未示意);
步骤5:利用预制的荧光粉膜30贴覆在透明基板10及外延芯片20上;
步骤6:利用红外线或真空烤箱进行烘烤;
步骤7:将烘烤完成的带外延芯片20的透明基板10切割成灯丝光源需要的长度。
本实施例中,该正装芯片级白光LED灯丝光源是将正装的多个外延芯片20直接覆晶在透明基板10形成LED灯丝光源,再贴覆荧光粉膜30使该LED灯丝光源形成可发白光的白光LED灯丝光源。
本发明正装芯片级白光LED灯丝光源及其封装方法是利用预先制备好电极特别设计的加大电极的正装外延芯片20,及把外延芯片20另一有电极高度差的一端电极进行电极化镀金制程,让各外延芯片20具有较大的面积及同一高度,如此可增加制程简易化,且增大电极面积可使导热更好,并可提高生产良率,将预先制作好的薄层荧光粉膜30,直接贴覆压合在外延芯片上,形成可直接可发白光的芯片级芯片,具有良好稳定色温的荧光粉膜,可解决荧光粉胶应用过程中的沉淀问题。同时 ,本发明不需要金线的焊接,利用直接印刷或涂布锡膏或银胶进行导通,缩短制程时间,减低焊接的虚焊断路产生的不良率,直接荧光粉膜贴覆压合,减低因为荧光粉沉淀的光学特性变动不良,增加灯丝产品的可用率。
上述实施例和图式并非限定本发明的产品形态和式样,任何所属技术领域的普通技术人员对其所做的适当变化或修饰,皆应视为不脱离本发明的专利范畴。
Claims (10)
1.一种正装芯片级白光LED灯丝光源,其特征在于,包括:透明基板、多个外延芯片及荧光粉膜,所述透明基板上设置有线路焊盘,各外延芯片包括衬底、N电子层、P电子层、及保护层;N电子层设于衬底的一面上,该N电子层具有高端及低端,所述P电子层设于该N电子层的高端上,该P电子层上设有P电极,N电子层的低端上设有N电极,该P电极的顶端与N电极的顶端平齐,所述保护层包覆在P电极及N电极的外侧,所述P电极及所述N电极的面积分别占该外延芯片面积的1/8-1/3,在该透明基板对应外延芯片大小的线路焊盘上设置有多个与该外延芯片的P电极及N电极对应的导电层,所述各外延芯片的P电极及N电极覆晶在透明基板的导电层上,所述荧光粉膜贴覆压合在各外延芯片的衬底另一面及该外延芯片的四个侧面上。
2.如权利要求1所述的正装芯片级白光LED灯丝光源,其特征在于:所述导电层为金、银、锡、镍及对应的合金中的任意一种。
3.如权利要求1所述的正装芯片级白光LED灯丝光源,其特征在于:所述各外延芯片位于透明基板的线路焊盘的不同位置,外延芯片大则与相邻外延芯片的相对位置间距大,芯片小则与相邻外延芯片的相对位置间距小,间距比例为外延芯片大小的1至5倍。
4.如权利要求1所述的正装芯片级白光LED灯丝光源,其特征在于:所述各外延芯片的P电极与N电极呈对角线对称或呈水平边对称。
5.如权利要求1所述的正装芯片级白光LED灯丝光源,其特征在于:所述各外延芯片的P电极及N电极的面积相等。
6.如权利要求1所述的正装芯片级白光LED灯丝光源,其特征在于:所述外延芯片的P电极及N电极的面积为一大一小。
7.一种如权利要求1所述的正装芯片级白光LED灯丝光源的封装方法,其包括以下步骤:
步骤1:于透明基板对应外延芯片大小的线路焊盘上,进行银胶或锡膏的涂覆,涂覆面积为外延芯片面积的1/8-1/3;
步骤2:利用固晶机将贴有荧光粉膜的直接发白光外延芯片的P电极及N电极覆晶在相应对位的透明基板的银胶或锡膏上,各外延芯片的P电极及N电极的电极面积为该外延芯片面积的1/8-1/3;;
步骤3:进行预成型支架的贴合 ;
步骤4:进行回焊或烤箱烘烤;
步骤5:将烘烤完成的带外延芯片的透明基板切割成灯丝光源需要的长度。
8.如权利要求7所述的正装芯片级白光LED灯丝光源的封装方法,其特征在于:步骤1中,所述银胶或锡膏的涂覆采用印刷或者涂布的方式。
9.如权利要求7所述的正装芯片级白光LED灯丝光源的封装方法,其特征在于:步骤1中,各外延芯片位于透明基板的线路焊盘的不同位置,外延芯片大则与相邻外延芯片的相对位置间距大,芯片小则与相邻外延芯片的相对位置间距小,间距比例为外延芯片大小的1至5倍。
10.一种如权利要求1所述的正装芯片级白光LED灯丝光源的封装方法,其包括以下步骤:
步骤1:于透明基板对应外延芯片大小的线路焊盘上,进行银胶或锡膏的涂覆,涂覆面积为外延芯片面积的1/8-1/3;
步骤2:利用固晶机将外延芯片的P电极及N电极覆晶在相应对位的透明基板的银胶或锡膏上,各外延芯片的P电极及N电极的电极面积为该外延芯片面积的1/8-1/3;
步骤3:进行预成型支架的贴合 ;
步骤4:进行回焊或烤箱烘烤;
步骤5:利用预制荧光粉膜贴覆在透明基板及外延芯片上;
步骤6:利用红外线或真空烤箱进行烘烤;
步骤7:将烘烤完成的带外延芯片的透明基板切割成灯丝光源需要的长度。
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