CN106129057B - 双向功率开关 - Google Patents

双向功率开关 Download PDF

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CN106129057B
CN106129057B CN201510857698.3A CN201510857698A CN106129057B CN 106129057 B CN106129057 B CN 106129057B CN 201510857698 A CN201510857698 A CN 201510857698A CN 106129057 B CN106129057 B CN 106129057B
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CN106129057A (zh
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Y·阿格
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Italian Semiconductor (tour) Co
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Italian Semiconductor (tour) Co
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Abstract

一种双向功率开关包括三个部件。每个部件包括具有交替的传导类型的三个半导体区域的堆叠，并且在三个半导体区域中的第一个半导体区域具有与第一半导体区域的类型相反的类型。第一部件和第二部件的第一半导体区域具有相同的传导类型并且第一部件和第三部件的第一半导体区域具有相反的传导类型。第一部件的第一半导体区域被连接到第二部件和第三部件的控制区域。第二部件和第三部件的第一半导体区域被连接到第一开关端子，第一部件、第二部件和第三部件的第三半导体区域被连接到第二开关端子，并且第一部件的控制区域被连接到第三开关端子。

Description

双向功率开关
优先权要求
本申请要求在2015年5月5日递交的专利号为15/54010的法国专利申请的优先权，其整体通过引用的方式以法律允许的最大程度并入于此。
技术领域
本公开内容涉及双向功率开关。
背景技术
已经提供了许多类型的双向功率开关。这样的开关例如在与负载的串联连接中使用，该负载将在提供交流电流(AC)电源电压(例如，主电源电压)的端子之间被供电以控制向负载供应的功率。
在已知的双向功率开关当中，可以提到三端双向可控硅(triac)，其是很常用的并且具有相对廉价的优点。然而三端双向可控硅受限于其控制端子仅使得能够控制其从关断状态到导通阶段的开关，从导通状态到关断阶段的开关在流过三端双向可控硅的电流下降到阈值之下时自然地发生。
已经提供了基于MOS或者双极性晶体管的各种解决方案以形成可控制以被导通和关断的双向功率开关。然而这样的开关是相对昂贵的。另外，这样的开关的控制可能要求相对复杂的电路。
还已经在近期由申请人提供的在Rizk等人的文章“A vertical bidirectionalbipolar power switch(BipAC)for AC mains applications,16th European Conferenceon Power Electronics and Applications(EPE'14-ECCE Europe)，2014”(其通过引用并入)中的可控制以被导通和关断的双向功率开关。将关于图1在后文更详细地描述这样的开关的结构和操作。
存在可控制以被导通和关断的双向功率开关的需要，这一开关克服了现有开关的所有或者部分缺点。
发明内容
为了实现这一目标，实施例提供了一种双向功率开关，包括第一、第二和第三部件，每个部件包括：具有交替的传导类型的第一、第二和第三半导体区域的堆叠，以及具有与第一半导体区域的类型相反的类型的、被布置在第一区域中的半导体控制区域，其中：第一部件和第二部件的第一区域具有相同的传导类型并且第一部件和第三部件的第一区域具有相反的传导类型；第一部件的第一区域被连接到第二部件和第三部件的控制区域；第二部件和第三部件的第一区域被连接到开关的第一导电端子；第一部件、第二部件和第三部件的第三区域被连接到开关的第二导电端子；并且第一部件的控制区域被连接到开关的控制端子。
根据实施例，所述第一部件的第一半导体区域、第二半导体区域和第三半导体区域分别是P型、N型和P型的。
根据实施例，所述第一部件的半导体表面比所述第二部件和所述第三部件的半导体表面小。
根据实施例，所述第一部件、所述第二部件和所述第三部件分别被形成在三个不同的半导体芯片中。
根据实施例，所述三个芯片被组装在同一保护封装中。
根据实施例，所述三个芯片被组装在三个不同的保护封装中。
根据实施例，一方面所述第一部件和所述第二部件，并且在另一方面所述第三部件，被分别形成在被组装在同一保护封装中的两个不同的半导体芯片中。
根据实施例，所述保护封装包括被分别连接到所述开关的所述第一传导端子和所述第二传导端子以及所述控制端子的三个外部连接端子。
根据实施例，所述第一部件和所述第二部件的第二半导体区域具有在从7x1013到4x1014原子/cm3的范围中的掺杂水平以及在从150到250μm的范围中的厚度，并且所述第三部件的第二半导体区域具有在从7x1013到4x1014原子/cm3的范围中的掺杂水平并且具有在从150到250μm的范围中的厚度。
附图说明
将在下面对具体实施例的非限制性描述中结合附图详细论述前述和其他的特征和优点，其中：
图1是示意性地图示双向功率开关的截面图。
图2是双向功率开关的实施例的简化视图；并且
图3是图2的双向功率开关的备选实施例的简化顶视图。
具体实施方式
在不同的附图中已经用相同的附图标记来表示相同的元件，并且各附图也不是按比例的。在下面的描述中，在限定诸如“前”、“后”、“顶部”、“底部”、“左”、“右”等的绝对位置的术语时，或者在限定诸如“水平”、“垂直”等的方向的术语时，其参照附图的定位，应当理解，在实际中所描述的部件可以被不同地定向。除非另外指定，表述“约”、“近似”或“在……的数量级”时，其意思是在20％以内，优选地到10％以内。
在本公开内容中，双向功率开关的意思是对于电流和电压双向的开关，其在关断状态中能够承受相对高的电压，例如大于100V并且在600V或更大数量级的电压。这里更具体地考虑了通过参考到其主要端子或者功率导电端子中的仅一个端子的单个栅极端子可以被控制为关断和导通双向功率开关。
图1是示意性地图示在上文提到的Rizk等人的文章中描述的类型的双向功率开关100的示例的截面图。
开关100是包括交替传导类型的三个半导体区域或层102、104和106的垂直堆叠的单片式部件。在此示例中，下方区域106是P型的，从区域106的上表面延伸到区域102的下表面的中间区域104是N型的，并且上方区域102是P型的。中间区域104相对于上方和下方区域102和106是相对高掺杂的。在所示示例中，中间区域104比上方和下方区域102和106厚。作为示例，开关100从轻掺杂的N型半导体衬底(例如，硅衬底)形成，上方和下方区域102和106通过相应地从衬底的上表面和从下表面的P型掺杂剂元素的注入或扩散来形成。
开关100在上方区域102在上部还包括通过区域102与中间区域104绝缘的控制区域108，该控制区域108具有与区域102相反的传导类型(即，所示示例中的N型)，并且具有比中间区域104高的掺杂水平。控制区域108从区域102的上表面垂直地延伸，并且向下延伸到小于区域102的深度的一定深度。在顶视图中，控制区域108仅占据区域102、104和106的堆叠的表面的一部分。作为示例，控制区域108(在顶视图中)占据小于一半并优选地小于四分之一的区域102、104和106的堆叠的表面。在所示示例中，控制区域108沿着区域102、104和106的堆叠的一边来定位。区域108(在顶视图中)可以由多个区域形成，诸如其基极和发射极区域总体上交错的双极性功率晶体管。开关100包括(在未由层108占据的区域102的部分的层面处)与区域102的上表面接触的第一主电极或功率传导电极a1。开关100还包括与区域106的下表面接触的第二主电极或功率传导电极a2。开关100还包括与控制区域108的上表面接触的控制电极g。
图1的开关100的导通(闭合)通过在其参考端子a1的控制端子g上施加负电流来获得，这导致在区域102和108之间形成的PN结的正向偏置。然后将控制区域108的电子注入到区域102中。这些电子中的一部分到达区域104，从而形成基极电流，该基极电流导致由区域102、104和106形成的垂直NPN双极性晶体管的导通。更具体地，如果在开关的主端子a1和a2之间的电压是正的(Va2–Va1>0，Va2和Va1相应地表示端子a1的电势和端子a2的电势)，则将空穴从区域106注入到区域104中，这些空穴中的一部分在区域104中重新结合，其余由区域102收集。如果在开关的主端子a1和a2之间的电压是负的(Va2–Va1<0)，则将空穴从区域102注入到104中。这些空穴中的一部分在区域104中重新结合，其余由区域106收集。
流过由区域102、104和106形成的PNP晶体管的电流是根据施加到控制端子g的控制电流的。
开关100的导通通过中断施加到端子g的控制电流来获得，例如通过将端子g设置为与端子a1相同的电势或者通过断开电流回路。
如上面提到的Rizk等人的文章中指示的，图1的结构的增益——即在导通状态中在开关的主电极a1与a2之间流过的电流与施加在开关的控制电极g上的控制电流之比——由于基极区域104的厚度小而都是较高的。然而，基极区域104的厚度越小，开关的击穿电压就越低。对于基极区域104的给定厚度，通过增加开关的有源部分(即，PNP堆叠未被控制区域108占据的部分)的表面积来增加增益。然而这导致了开关成本的显著增加。另外，这样的增益增加在构建上由区域104中的电荷载子运送因子限制，针对600V击穿电压该因子已经被估计为约0.85，其对应于针对在高注入模式中的通常载子寿命的5.6的数量级的理论最大电流增益。
作为示例，在关于图1所描述的类型的结构、具有承受600V电压的大小(具体地，层102、104和106的掺杂水平和厚度)并且具有数量级为6mm2的半导体表面积的情况下并且针对40mA的控制电流ig，已经针对在导电端子a1和a2之间的电压va2a1(＝Va2-Va1)在1V的数量级下测得约等于4.5的增益，并且已经针对电压Va2a1在-1V的数量级下测得约等于2.8的增益。
可能理想的是改善开关的增益、击穿电压和半导体表面积之间的权衡。尤其应当注意高增益使得能够限制要被施加到开关的控制端子以将其导通的电流的强度。
图2是双向功率开关200的实施例的简化视图。
图2的开关200包括关于图1描述的类型的三个部件1001、1002和1003。在所示示例中，部件1001和1002与图1的部件100是相同传导类型，即它们的区域102、104和106和108分别是P型、N型、P型和N型的。部件1003是相反传导类型的，即其区域102、104和106和108分别是N型、P型、N型和P型的。部件1001的主电极a1例如通过导电轨或导线连接到部件1002的控制电极g并且连接到部件1003的控制电极g。部件1001的控制电极g连接到开关200的控制端子或电极G。部件1002的主电极a1和部件1003的主电极a1连接到开关200的第一端子或主电极A1。部件1001的主电极a2、部件1002的主电极a2和部件1003的主电极a2连接到开关200的第二端子或主电极A2。
图2的开关200可以通过用图2的端子A1、A2和G来替代图1的端子a1、a2和g来与图1的开关100相同或相似地来被控制。
具体而言，图2的开关200的导通(闭合)可以通过在它的参考其端子A1的控制端子G上施加负电流来获得，这导致在部件1001的102与108之间形成的PN结的正向偏置。
如果在开关的主导电端子A1与A2之间的电压VA2A1是正的，则在部件1002的区域102与108之间形成的PN结被正向偏置，并且经由这一结而在部件1001的端子a1与a2之间传递电压VA2A1(到PN结的电压降之内)。在施加到其端子g的负控制电流的影响下，部件1001开始与已经关于图1描述的同样或相似地进行传导。然后电流在开关200的电极A1与A2之间流动，此电流流过在部件1002的区域102与108之间形成的PN结，并且流过由部件1001的区域102、104和106形成的垂直PNP晶体管。此电流为部件1002形成确保其导通的控制电流。
如果在开关的主导电端子A1与A2之间的电压VA2A1是负的，则在部件1003的区域108与102之间形成的PN结被正向偏置，并且经由这一结而在部件1001的端子a1与a2之间传递电压VA2A1(到PN结的电压降之内)。在施加到其端子g的负控制电流的影响下，部件1001开始与已经关于图1描述的同样或相似地进行传导。然后电流在开关200的电极A2与A1之间流动，此电流流过由部件1001的区域102、104和106形成的垂直PNP晶体管，并且流过在部件1003的区域108与102之间形成的PN结。此电流为部件1003形成确保其导通的控制电流。
因而，在图2的开关200中，在电压VA2A1为正时，电流主要流过部件1002，并且在电压VA2A1为负时，电流主要流过部件1003。部件1001使得能够放大部件1002和1003的控制电流。因而，图2的开关200的增益针对正电压VA2A1基本上等于部件1001的增益乘以部件1002的增益，并且针对负电压VA2A1基本上等于部件1001的增益乘以部件1003的增益。
应当注意到在实践中，部件1001可以具有比部件1002和1003更小的表面积。然而所描述的实施例并不限于这一具体情况。更一般而言，无论部件1001、1002和1003的尺寸如何，在导通状态中在开关200的端子A1与A2之间流动的电流根据半波的方向、通过取决于部件的尺寸的比例而自然地在部件1001与1002之间分布或者在部件1001与1003之间分布
关于图2描述的实施例的优点在于，对于给定击穿电压(特别地，由部件1001、1002和1003的区域104的厚度限定)，使得能够以整体半导体表面积的合理增加为代价，来相对于关于图1描述的类型的开关来显著地增加增益，并且特别地将增益增加到超越由区域104中的运送因子强加的理论限制。
作为示例，利用关于图2描述的类型的结构，大小为承受600V电压并且具有在188mm2的数量级的半导体表面积的情况下，并且对于在40mA的数量级的控制电流IG，已经针对在1V的数量级的导电端子A1与A2之间的电压VA2A1而测得约等于12的增益，并且针对在-1V的数量级的电压VA2A1而测得约等于11的增益。
图2的开关200的部件1001、1002和1003例如是组装在同一保护封装中的三个分立的半导体部件，该保护封装仅包括三个外部接触端子——端子A1、A2和G。然而所描述的实施例并不限于这一具体情况。
图3是示意性地图示图2的开关200的备选实施例的截面图，其中具有相同的传导类型的部件1001和1002被集成在同一半导体芯片中，部件1003是形成在单独的半导体芯片中的分立部件。包括部件1001和1002的芯片和包括部件1003的芯片可以被组装在同一保护封装中，该保护封装中仅包括三个外部接触端子——端子A1、A2和G。
在图3的示例中，P型掺杂的垂直绝缘壁301将部件1001与部件1002分离。绝缘壁301例如连接到部件1001和1002的下方P型区域106。作为示例，绝缘壁301的掺杂水平与部件1001和1002的下方P型区域106的掺杂水平相同。部件1001和1002的上部P型区域102通过N型衬底104的部分而与壁301侧向绝缘。
作为示例，在图2和3的实施例中，部件1001和1002的N型区域104可以具有在从7x1013到4x1014原子/cm3的范围中的掺杂水平，部件1003的P型区域104可以具有在从7x1013到4x1014原子/cm3的范围中的掺杂水平，部件1001和1002的P型区域102可以具有在从1x1016到1x1018原子/cm3的范围中的掺杂水平，部件1003的N型区域102可以具有在从1x1016到1x1018原子/cm3中的掺杂水平,部件1001和1002的P型区域106可以具有在从1x1016到1x1018原子/cm3的范围中的掺杂水平，部件1003的N型区域106可以具有在从1x1016到1x1018原子/cm3中的掺杂水平，部件1001和1002的N型区域108可以具有在从1x1019到1x1020原子/cm3的范围中的掺杂水平，并且部件1003的P型区域108可以具有在从1x1019到1x1020原子/cm3中的掺杂水平。另外，部件1001和1002的N型区域104可以具有在从150到250μm的范围中的厚度，并且部件1003的P型区域104可以具有在从150到250μm的范围中的厚度。
已经描述的具体实施例。各种变换、修改和改进对于本领域技术人员将是显而易见的。特别地，想要的实施例并不限于本说明书中提到的数值的示例。
另外，与上文已经描述的操作相似的操作可以通过使三个部件1001、1002和1003的区域102、104、106和108的传导类型相反来获得。
这样的变换、修改和改进旨在于为本公开内容的一部分，并且旨在于在本发明的精神和范围以内。因此，上面的描述仅作为示例并且不旨在于为限制性的。本发明仅在下面的权利要求及其等同方案中所限定的而被限制。

Claims (18)

1.一种双向功率开关，包括：第一部件、第二部件和第三部件，其中每个部件包括：
第一半导体区域、第二半导体区域和第三半导体区域的堆叠，所述第一半导体区域到所述第三半导体区域具有交替的传导类型；并且
具有与所述第一半导体区域的传导类型相反的传导类型并且被布置在所述第一半导体区域中的半导体控制区域，
其中：
所述第一部件和所述第二部件的第一半导体区域具有相同的传导类型并且所述第一部件和所述第三部件的第一半导体区域具有相反的传导类型；
所述第一部件的第一半导体区域被连接到所述第二部件和所述第三部件的半导体控制区域；
所述第二部件和所述第三部件的第一半导体区域被连接到所述开关的第一导电端子；
所述第一部件、所述第二部件和所述第三部件的第三半导体区域被连接到所述开关的第二导电端子；并且
所述第一部件的半导体控制区域被连接到所述开关的控制端子。
2.根据权利要求1所述的开关，其中所述第一部件的第一半导体区域、第二半导体区域和第三半导体区域分别是P型、N型和P型的。
3.根据权利要求1所述的开关，其中所述第一部件的半导体表面比所述第二部件和所述第三部件中的每个部件的半导体表面小。
4.根据权利要求1所述的开关，其中所述第一部件、所述第二部件和所述第三部件分别被形成在三个不同的半导体芯片中。
5.根据权利要求4所述的开关，其中所述三个芯片被组装在同一保护封装中。
6.根据权利要求5所述的开关，其中所述保护封装包括被分别连接到所述开关的所述第一导电端子和所述第二导电端子以及所述控制端子的三个外部连接端子。
7.根据权利要求4所述的开关，其中所述三个芯片被组装在三个不同的保护封装中。
8.根据权利要求1所述的开关，其中所述第一部件和所述第二部件被形成在第一半导体芯片上，并且其中所述第三部件被形成在第二半导体芯片中，并且其中所述第一半导体芯片和所述第二半导体芯片被组装在同一保护封装中。
9.根据权利要求8所述的开关，其中所述保护封装包括被分别连接到所述开关的所述第一导电端子和所述第二导电端子以及所述控制端子的三个外部连接端子。
10.根据权利要求1所述的开关，其中所述第一部件和所述第二部件的第二半导体区域具有在从7x1013到4x1014原子/cm3的范围中的掺杂水平以及在从150到250μm的范围中的厚度，并且其中所述第三部件的第二半导体区域具有在从7x1013到4x1014原子/cm3的范围中的掺杂水平并且具有在从150到250μm的范围中的厚度。
11.一种功率开关，包括：
三个半导体区域的第一堆叠，所述三个半导体区域具有交替的传导类型并且包括第一半导体控制区域，所述第一半导体控制区域被布置在所述三个半导体区域中的第一个半导体区域中并且具有与所述三个半导体区域中的所述第一个半导体区域的传导类型相反的传导类型，
三个半导体区域的第二堆叠，所述三个半导体区域具有交替的传导类型并且包括第二半导体控制区域，所述第二半导体控制区域被布置在所述三个半导体区域中的第一个半导体区域中并且具有与所述三个半导体区域中的所述第一个半导体区域的传导类型相反的传导类型，
其中：
所述功率开关的栅极端子被连接到所述第一半导体控制区域；
在所述第一堆叠中的所述三个半导体区域中的所述第一个半导体区域被连接到所述第二半导体控制区域；
所述功率开关的第一导电端子被连接到在所述第二堆叠中的所述三个半导体区域中的所述第一个半导体区域；并且
所述功率开关的第二导电端子被连接到在所述第一堆叠和所述第二堆叠两者中的所述三个半导体区域中的第三个半导体区域。
12.根据权利要求11所述的功率开关，其中所述第一堆叠和所述第二堆叠被形成在被组装在同一保护封装中的分开的裸片上。
13.根据权利要求11所述的功率开关，其中所述第一堆叠和所述第二堆叠被形成在被组装在保护封装中的共同的裸片上。
14.根据权利要求11所述的功率开关，其中在所述第一堆叠和所述第二堆叠中的所述交替的传导类型是相同的。
15.根据权利要求11所述的功率开关，其中在所述第一堆叠和所述第二堆叠中的所述交替的传导类型是相反的。
16.根据权利要求11所述的功率开关，还包括：
三个半导体区域的第三堆叠，所述三个半导体区域具有交替的传导类型并且包括第三半导体控制区域，所述第三半导体控制区域被布置在所述三个半导体区域中的第一个半导体区域中并且具有与所述三个半导体区域中的所述第一个半导体区域的传导类型相反的传导类型，
其中：
在所述第一堆叠中的所述三个半导体区域中的所述第一个半导体区域被连接到所述第三半导体控制区域；
所述功率开关的所述第一导电端子还被连接到在所述第三堆叠中的所述三个半导体区域中的所述第一个半导体区域；并且
所述功率开关的所述第二导电端子还被连接到在所述第三堆叠中的所述三个半导体区域中的第三个半导体区域。
17.根据权利要求16所述的功率开关，其中在所述第一堆叠和所述第二堆叠中的所述交替的传导类型是相同的并且在所述第三堆叠中的所述交替的传导类型与在所述第一堆叠和所述第二堆叠中的所述交替的传导类型是相反的。
18.根据权利要求17所述的功率开关，其中所述第一堆叠和所述第二堆叠被形成在共同的裸片上，所述第三堆叠被形成在另一裸片上，并且所述共同的裸片和所述另一裸片被组装在保护封装中。
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FR3036001A1 (fr) 2016-11-11
CN110970420A (zh) 2020-04-07
EP3091572A1 (fr) 2016-11-09
US20160329417A1 (en) 2016-11-10
CN106129057A (zh) 2016-11-16
EP3091572B1 (fr) 2019-10-30
US9997623B2 (en) 2018-06-12
CN205428926U (zh) 2016-08-03

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