The test structure of display panels and manufacture method
Technical field
The present invention relates to technical field of liquid crystal display, in particular to test structure and the system of a kind of display panels
Make method.
Background technology
LCD (Liquid Crystal Display, liquid crystal display), due to advantages such as its lightening and low-power consumption, is mesh
Main flow display device in front market, and in process of producing product, in order to improve product yield, it is necessary to LCD
Plate arranges Array test (array test) circuit and Cell test (becoming box test or liquid crystal panel test) circuit, to divide in battle array
Row substrate carries out Array test, carries out Cell test after becoming box (Cell) processing procedure after completing.
In current structure design, as it is shown in figure 1, Cell test circuit 11 is positioned at each display panels 10 times
Portion, Array test circuit 12 is positioned at the top of each display panels 10, and wherein Array test circuit 12 completes Array
All successive process after test all will not be used.As can be seen here, Cell test circuit 11 and Array tests circuit 12
Arranging and need display panels 10 to reserve two routing region 13 at an upper portion thereof and at a lower portion thereof, this is obviously unfavorable for LCD
The narrow frame design of plate 10.
Summary of the invention
In view of this, the embodiment of the present invention provides test structure and the manufacture method of a kind of display panels, it is possible to have
It is beneficial to the narrow frame design of display panels.
The test structure of a kind of display panels that the embodiment of the present invention provides, including being positioned at display panels bottom
Routing region Cell test circuit, before the multiple display panels being arranged in array not being cut, Cell
Test circuit carries out Array test, many to being arranged in array for the display panels being pointed to below routing region
After individual display panels cuts, Cell test circuit is for carrying out the display panels including routing region
Cell tests.
Wherein, in the multiple display panels being arranged in array, it is positioned at the top of the display panels of the first row
Being provided with connected test circuit, test circuit is for carrying out Array test to the display panels of the first row.
Wherein, test circuit is identical with the structure of Cell test circuit.
Wherein, also include that in the routing region of each display panels video data chip, video data chip are used for
Display signal is provided for Cell test circuit when being pointed to the display panels below routing region and carrying out Array test.
Wherein, also include in the routing region of each display panels driving IC, drive IC to be used for as LCD
Plate provides the driving signal needed for Module test, and video data chip is positioned at the lower section driving IC, and video data chip, drives
Dynamic IC and Cell test circuit is integrated in the FPC of routing region.
The manufacture method of a kind of display panels that the embodiment of the present invention provides, including: formation is arranged in array many
The display panels in individual district to be cut, each display panels includes the Cell test electricity being positioned at the routing region of its underpart
Road;Before the multiple display panels being arranged in array not being cut, Cell test circuit is utilized to be pointed to cabling
Display panels below region carries out Array test;The multiple display panels being arranged in array are being cut
Afterwards, utilize Cell test circuit that the display panels including routing region is carried out Cell test.
Wherein, in the multiple display panels being arranged in array, it is positioned at the top of the display panels of the first row
Being provided with connected test circuit, described manufacture method also includes: utilize the test circuit LCD to the first row
Plate carries out Array test.
Wherein, test circuit is identical with the structure of Cell test circuit.
Wherein, also include video data chip in the routing region of each display panels, be pointed to routing region
When the display panels of lower section carries out Array test, video data chip is utilized to provide display signal for Cell test circuit.
Wherein, also including in the routing region of each display panels driving IC, video data chip is positioned at driving IC
Lower section, and video data chip, drive IC and Cell test circuit be integrated in the FPC of routing region, described manufacture method
Farther include: utilize and drive IC to provide the driving signal needed for Module test for display panels.
Beneficial effect: the embodiment of the present invention designs for two adjacent display panels, the liquid crystal above utilization
Show that the Cell test circuit of panel carries out Array test to the display panels of lower section, can be considered two neighbouring liquid
LCD panel shares Cell and tests circuit, and display panels tests the routing region of circuit without reserved receiving Array, from
And the narrow frame design of display panels can be conducive to.
Accompanying drawing explanation
Fig. 1 is the structure top view of uncut display panels one embodiment of prior art;
Fig. 2 is the structure top view of the uncut display panels of one embodiment of the invention;
Fig. 3 is the structure top view after the cutting of display panels shown in Fig. 2;
Fig. 4 is the schematic flow sheet of manufacture method one embodiment of the display panels of the present invention.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the skill to each exemplary embodiment provided by the present invention
Art scheme is clearly and completely described.In the case of not conflicting, the feature in each embodiment following and embodiment can
To be mutually combined.
Refer to Fig. 2, for the structure top view of the uncut display panels of one embodiment of the invention.Uncut
Multiple display panels 20 are arranged in array, and the bottom of each display panels 20 is provided with routing region 21.This enforcement
The test structure of the display panels 20 of example includes that the Cell being positioned at routing region 21 tests circuit 22.
In the multiple display panels 20 being arranged in array, the top of the display panels 20 being positioned at the first row sets
Being equipped with connected test circuit 23, test circuit 23 is for carrying out Array test to the display panels 20 of the first row.
Preferably, this test circuit 23 is identical with the structure of described Cell test circuit 22, i.e. the present embodiment is equivalent in the first row
The top of display panels 20 is also provided with testing circuit 22 for the Cell of Array test.
Before not cutting the multiple display panels 20 being arranged in array, Cell test circuit 22 is for right
It is positioned at the display panels 20 below routing region 21 and carries out Array test.To the multiple liquid crystal displays being arranged in array
After panel 20 cuts, Cell test circuit 22 is for carrying out Cell to the display panels 20 including routing region 21
Test.
When carrying out Array test, the Cell test circuit 22 of the present embodiment is equivalent to prior art shown in Fig. 1
Array tests circuit 12.It follows that the embodiment of the present invention can be considered that neighbouring two display panels 20 share
Cell tests circuit 22, and this Cell test circuit 22, both for the display panels 20 of top is carried out Cell test, is used again
In the display panels 20 of lower section is carried out Array test, it is compared to prior art, each liquid crystal display of the present embodiment
Panel 20 is without the routing region 13 of reserved receiving such as Array shown in Fig. 1 test circuit 12 such that it is able to be conducive to liquid crystal
Show the narrow frame design of panel 20.Wherein, after dicing, the test electricity of the top of the display panels 20 of the first row it is positioned at
Road 23 is the most cut.
Please continue to refer to Fig. 2, being compared to prior art, the Cell test circuit 22 of the present embodiment not only includes for connecing
Receive the testing cushion 221 of Cell test signal, also include the cabling of the display panels 20 for connecting test pad 221 and lower section
222.When the display panels 20 of lower section being carried out Array test, can be that it provides by testing cushion 221 and cabling 222
Drive the scanning signal of scan line and the data signal (also known as display signal or Video signal) of driving data line.
Further, video data chip 24 is also included in the routing region 21 of each display panels 20, this display
Data chip 24 is equivalent to the data driver for providing data signal for data wire of display panels 20.This display number
May be used for being that Cell surveys when the display panels 20 being pointed to below routing region 21 carries out Array test according to chip 24
Examination circuit 22 provides display signal, and provides the scanning signal needed for Array test by testing cushion 221.
Described video data chip 24 can be integrated in routing region 21.Cabling in view of each display panels 20
Region 21 also includes driving IC 25, drives IC 25 for providing Module test (module test) required for display panels
Driving signal, video data chip 24 can be arranged at drive IC 25 lower section, i.e. video data chip 24, drive IC
25 and Cell test circuit 22 are integrated in FPC (Flexible Printed Circuit, the flexible print circuit of routing region 21
Plate) in.After dicing, as it is shown on figure 3, video data chip 24 is stayed in the display panels 20 of top, due to it
The cabling 222 being connected with the display panels 20 of lower section is cut off, thus without the impact display panels 20 to top
Carry out Cell test.
The manufacture method of the display panels of an embodiment as shown in Figure 4 that the present invention also provides for.As shown in Figure 4, institute
State manufacture method and can include step S41~S43.
S41: forming the display panels in the district multiple to be cut being arranged in array, each display panels includes position
Circuit is tested in the Cell of the routing region of its underpart.
S42: before not cutting the multiple display panels being arranged in array, utilizes Cell to test circuit pair
It is positioned at the display panels below routing region and carries out Array test.
S43: after cutting the multiple display panels being arranged in array, utilizes Cell test circuit to bag
The display panels including routing region carries out Cell test.
Wherein, in the multiple display panels being arranged in array, it is positioned at the top of the display panels of the first row
It is provided with connected test circuit.Preferably, this test circuit is identical with the structure of Cell test circuit.Carrying out step
During S42, the present embodiment utilizes the display panels of the test circuit the first row to being arranged in array to carry out Array test.
Further, also include video data chip in the routing region of each display panels, this video data core
Sheet is equivalent to the data driver for providing data signal for data wire of display panels.This video data chip is permissible
For providing display letter when being pointed to the display panels below routing region and carrying out Array test for Cell test circuit
Number.
Described video data chip can be integrated in routing region.In view of each display panels routing region also
Including driving IC, the present embodiment also utilizes after step S43 and drives IC for providing Module test for display panels
Required driving signal, this video data chip can be arranged at the lower section driving IC, i.e. video data chip, drive IC and
Cell test circuit is integrated in the FPC of routing region.After dicing, video data chip is stayed the liquid crystal display in top
In panel, owing to its cabling being connected with the display panels of lower section is cut off, thus without the impact liquid crystal to top
Show that panel carries out Cell test.
The concrete principle of described manufacture method and process see described in earlier figures 2~Fig. 3 embodiment.Therefore this manufacturer
Method also has identical beneficial effect.
Again illustrate, the foregoing is only embodiments of the invention, not thereby limit the scope of the claims of the present invention, every
Utilizing equivalent structure or equivalence flow process conversion that description of the invention and accompanying drawing content made, between the most each embodiment, technology is special
That levies be combined with each other, or is directly or indirectly used in other relevant technical fields, and the patent being the most in like manner included in the present invention is protected
In the range of protecting.