CN106062966A - Semiconductor device and semiconductor device manufacturing method - Google Patents

Semiconductor device and semiconductor device manufacturing method Download PDF

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Publication number
CN106062966A
CN106062966A CN201580011623.1A CN201580011623A CN106062966A CN 106062966 A CN106062966 A CN 106062966A CN 201580011623 A CN201580011623 A CN 201580011623A CN 106062966 A CN106062966 A CN 106062966A
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layer
oxygen
room
drift layer
semiconductor substrate
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CN106062966B (en
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松井俊之
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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    • H01L29/401
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/221Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities of killers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2252Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • H01L21/2253Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/2636Bombardment with radiation with high-energy radiation for heating, e.g. electron beam heating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/761PN junctions
    • H01L29/0623
    • H01L29/063
    • H01L29/32
    • H01L29/404
    • H01L29/66136
    • H01L29/8611
    • H01L29/0619
    • H01L29/1602
    • H01L29/1608
    • H01L29/2003

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Abstract

A semiconductor device is configured by having: a p-type region (4), which is selectively formed along one main surface of an n-type drift layer (1), and which has a lower resistance than the drift layer (1); and, in a drift layer (1) having a thickness t from a pn junction (6) surface, i.e., a boundary of the p-type region (4), a vacancy-oxygen complex defect region (11) that is provided at a depth expressed by formula 0<R<=t-W, where R represents a drift layer (1) depth in the thickness direction from the rear surface of a semiconductor substrate, said drift layer being provided with the vacancy-oxygen complex defect region (11), [rho] represents specific resistance of the drift layer (1), and the width W of a depletion layer (15) is expressed by formula W=0.54* extraction of root of ([rho]*V), said depletion layer extending into the drift layer (1) from the pn junction (6) at a reverse bias voltage V of the pn junction (6). Consequently, both switching loss reduction and soft recovery characteristics can be achieved by means of a low-cost and simple process.

Description

Semiconductor device and the manufacture method of semiconductor device
Technical field
The present invention relates in the middle diode of electric power used and partly leading of built-in power diode such as power-converting devices Body device and the manufacture method of semiconductor device.
Background technology
Backflow diode is the semiconductor device used in the power-converting device etc. of high voltage-big electric current.In backflow two poles Electrical characteristic required when pipe switchs is the reduction of switching loss and soft recovery characteristics.Soft recovery characteristics is to suppress The electromagnetic noise that produced by power electronic equipment and the most in recent years as the environmental problem urgent desired spy of countermeasure Property.
Fig. 5 is the main portion sectional view of the semiconductor substrate representing the Rotating fields of existing diode and life control region. As it is shown in figure 5, the vertical-type power diode 100 being used as backflow diode possesses is arranged at high-resistance n-type drift layer 101 The anode 102 of upper surface and the negative electrode 103 of the lower surface being arranged at n-type drift layer 101.
Anode 102 carries out Europe with the p-type anode layer 104 of the central part of the upper surface side being selectively formed at n-type drift layer 101 Nurse contacts.The negative electrode 103 N-shaped cathode layer 105 with whole of the lower face side being formed at n-type drift layer 101 carries out ohm and connects Touch.The anode layer 104 of anode 102 contact is the region relevant to principal current, is referred to as active portion 109.
In n-type drift layer 101, it is positioned at upper surface side identical with anode 102, anode layer 104 and surround anode layer 104 Periphery, is configured with edge termination portion 110.This edge termination portion 110 possesses protection ring 107 and field plate (omitting diagram).Protection ring 107 have when applying the backward voltage using anode as negative pole, relax the height produced on the surface of the periphery substrate of pn-junction 106 The function of electric field.Field plate such as has the function preventing causing electrostatic potential to change because of the impact of external charge.
Edge termination portion 110, in addition to protection ring 107, field plate, also has dielectric film 108.Dielectric film 108 protects the limit of pn-junction Silicon (Si) substrate surface of the high electric field of edge terminal end surface and its outer circumferential side.In edge termination portion 110, by the longevity of shadow representation Life control area 111 is arranged near the anode layer 104 of high-resistance n-type drift layer 101.
Fig. 6 is the chopper circuit figure of common IGBT and diode.Linking diode and IGBT, the Guan Bi electricity of intercondenser There is stray inductance Lstray in road, but in figure 6, for convenience, Lstray shown in the part on circuit.Fig. 7 is table Show the time dependent Reverse recovery voltage and current waveform of voltage x current when common diode switchs.At Fig. 7 In, it is shown that Reverse recovery voltage current waveform, this Reverse recovery voltage current waveform represents makes work in the circuit shown in Fig. 6 (μ s) in time change of diode Reverse recovery voltage and electric current when turning off.
As it is shown in fig. 7, anode current Iak is from forward current If, reduce with slip di/dt, commutate as rightabout, and reversely Electric current increases.Anode current Iak, after reaching Reverse recovery peak current Irp, reduces with current reduction rate dIr/dt, converges to Current value 0.In the figure 7, in order to easily observe, Anode-cathode voltage Vak with negative electrode relative to the side that anode is positive Vka To illustrating.
Anode-cathode voltage Vak, from forward voltage VF (not shown), turns accordingly with the minimizing with anode current Iak For rightabout voltage, Anode-cathode voltage Vak is negative (Vka is just).Thereafter, reach the most extensive at anode current Iak During multiple peak current Irp, between K-A, voltage Vka becomes the value identical with power source voltage Vcc.Thereafter, ratio Vcc Gaoyang is produced The voltage of the amount of the current reduction rate dIr/dt of electrode current Iak with stray inductance Lstray long-pending (Lstray × dIr/dt).This Becoming surge voltage, when the absolute value of dIr/dt becomes maximum, Vka also becomes the maximum Vs of surge voltage.Thereafter, convergence To Vcc.
In diode 100, as shown in the reverse recovery current voltage oscillogram of Fig. 7, when diode switchs, from stream When the state of logical forward current (anode current) is switched to rightabout voltage blocked state, switch terminates period, electric current stream Round about.Even if this is because being accumulated in the carrier in diode 100 by the conductivity modulation of carrier at electricity The applying direction of pressure is rightabout, also serves as remaining carrier and remaining, in conjunction with and disappear or when being discharged to the outside, become Reverse current.
This reverse current is referred to as the restoring current (reverse recovery current) of diode.Electric current at forward current reduces speed (dIr/dt), when becoming the most drastically, peak I rp of this reverse recovery current becomes the biggest.If the peak value of reverse recovery current Irp becomes big, then switching loss also becomes big.During this reverse recovery current increases, through small delays, depletion layer is from pn Knot 106 starts to extend, and backward voltage (prevention voltage) increases.Thereafter, the backward voltage having obtained increasing converges to immediately from outward The back bias values that portion applies.On the other hand, the residual excess electron in n-type drift layer 101 via cathode layer 105 from the moon Pole 103 is excluded, and residual holes is excluded from anode 102 via anode layer 104.Now, the carrier mobility in hole is than electricity Son is little, it can be considered that minimizing speed dIr/dt of reverse recovery current is determined by the eliminating speed of residual holes.
When diode is switched to reverse BV state from forward current state, its current reduction rate is the biggest, and diode is anti- More increase to voltage build-up rate, result in above-mentioned electromagnetic noise.Its reason is because to maintain current reduction rate, needs The backward voltage making diode rises more quickly and gets rid of rapidly residual holes.
In the Reverse recovery voltage and current waveform shown in Fig. 7, for the time shaft (μ s) of transverse axis, 2 can be roughly divided into Region.1 be from forward current be zero time, the a-quadrant to peak I rp reaching reverse recovery current.Forward electricity Stream, from steady-state current, reduces with the current reduction rate di/dt determined by the driving frequency of IGBT etc..
At this moment, residue in the hole of n-type drift layer 101 electric current when anode 102 is excluded and become so-called Reverse recovery electricity Stream.This reverse recovery current increases together with the increase of reverse bias voltage and reaches peak I rp of reverse recovery current.Another 1 Individual region is from the beginning of peak I rp of reverse recovery current, to by residual holes from anode 102 with reduce speed (dIr/dt) Get rid of and in conjunction with, thus reverse current becomes the B region till zero.
Reduce and the soft recovery characteristics of backflow switching loss required by diode are in the relation of balance each other, therefore, generally It is difficult to take into account both.Such as, the reduction of switching loss is to reduce reversely by reducing injection rate from the hole of anode layer 104 Peak I rp of restoring current, and increase current reduction rate dIr/dt and shorten reverse recovery time (trr) and obtain.But It is, on the contrary, soft recovery characteristics is to extend Reverse recovery by the reverse recovery current slip dIr/dt in reduction B region Time (trr) and obtain.So, contrary with the countermeasure of soft recovery characteristics, therefore due to reducing of switching loss It is difficult to take into account both.
As the method for switching loss during reduction Reverse recovery, the most also have and make n in the pressure scope not sacrificing equipment The method that type high resistance drift layer is thinning and reduces residual carrier (hole).But, now, due to negative electrode during Reverse recovery Side savings carrier also reduces, and the disappearance of the residual carrier of cathode side accelerates (minimizing speed dIr/dt of reverse recovery current Greatly), so, as result, surge voltage change produces greatly and easily vibration.In other words, if the minimizing of reverse recovery current is fast Degree dIr/dt is big, the most easily shows hard recovery characteristics, if minimizing speed dIr/dt of reverse recovery current is too small, is then lost Become big.Therefore, generally, it is extremely difficult for reducing switching loss while maintaining soft recovery characteristics.
Thus, in order to take into account reduction and the soft recovery characteristics (low noise) of switching loss, not only need to reduce the sky from anode layer Cave injection rate, reduces peak I rp of reverse recovery current, in addition it is also necessary to suitably control the life-span of institute's injected holes (lifetime)。
In the past, in order to effectively carry out remaining the control of carrier (hole), for example, as it is known that there is the thickness at Si semiconductor substrate Direction, in the method in the short region of desired depth bounds initiation life.In this life control method, there is utilization crystallization Defect is as the method for the recombination center of carrier, and described crystal defect is by the shape to quasiconductor useful to irradiation of rays or injection Become.In this crystal defect, major part can be recovered by the heat treatment of 200 DEG C~400 DEG C, but relates to the complex defect of oxygen Residual.In the past, had been developed for making the life-span be controlled in the way of becoming desired value by controlling this complex defect Method.
It addition, conventionally, there is known make the method that the heavy metals such as platinum spread at semiconductor heat.The method is, in semiconductor substrate Forming crystal defect, this crystal defect forms impurity energy level (Impurity level) in Si band gap, therefore uses it for the longevity The method that life controls.But, use the life control method of heavy metal to have the crystal defect of Si/ interfacial oxide film and/or height to mix Crystal defect in miscellaneous region produces the trend of segregation.Therefore, it is possible in the short district of these place forming minority carrier lifetimes Territory, but be difficult at any place forming.
Kind for the ray of the control in life-span has helium irradiation, proton irradiation, electron beam irradiation etc..Wherein, helium irradiation, proton The flight distance in quasiconductor irradiated is short, controls the longevity it is possible to be formed locally at predetermined depth bounds in the way of shortening The region of life.On the other hand, high-octane irradiation unit is extremely expensive, it addition, for utilizing the thickness of metal shutter to carry out The situation of the severity control of flight distance, from the standpoint of the precision of severity control, practicality is the highest.
It addition, the cost of electron beam irradiation, productivity are excellent, but owing to the flight distance in quasiconductor is long, so semiconductor substrate Life-span of whole thickness direction become identical, it is difficult to carry out the formation in the life-span region of local.But, in semiconductor substrate After being formed locally high concentration oxygen region in advance, the semiconductor regions beyond high concentration oxygen region irradiates and is formed without the life-span Control the electron beam of the degree of effective crystal defect.Thus, even if carrying out electron beam irradiation, it is also possible to a certain degree carrying out The life control (for example, referring to following patent documentation 1) of local.
It addition, the document relevant with soft recoveryization has following record such to reducing of switching loss.Specifically, with Past, such as have by arranging carrier capture layer near the zone line of high resistance area, thus when reducing Reverse recovery Loss, the record (patent documentation 2) of the extension of suppression depletion layer.It addition, specifically, in the past, such as, have by importing oxygen, and Irradiate proton from anode-side surface and import crystal defect, make crystal defect recover and improve net dopant concentration, thus obtain low Loss, the record (for example, referring to following patent documentation 3) of soft recovery characteristics.Additionally, specifically, in the past, such as have by making Platinum is diffused into high resistance n-layer, and irradiates helium ion and form low life-span region, thus realizes record (such as, the ginseng of soft recoveryization According to following patent documentation 4).
Prior art literature
Patent documentation
Patent documentation 1: Japanese Unexamined Patent Publication 2007-266103 publication
Patent documentation 2: Japanese Unexamined Patent Publication 2010-92991 publication
Patent documentation 3: Japan's table 2007-55352 publication again
Patent documentation 4: International Publication the 99/09600th pamphlet
Summary of the invention
Technical problem
But, in the above-mentioned prior art described in patent documentation 1 record: with only carry out whole thickness direction formed knot The situation of the electron beam irradiation of brilliant defect is compared, in the case of the impact causing operating resistance (forward voltage depreciation Vf) is little The main thought of switching loss can be reduced.I.e., it is considered to reduce by only shortening the life-span of the carrier close with anode-side Peak I rp of reverse recovery current, and the residual carrier beyond it is kept constant, thus what operating resistance was caused by reduction Affect and drop low-loss technology.
Fig. 8 is the Reverse recovery representing the diode that semiconductor substrate has been carried out identical life control by electron beam irradiation The figure of characteristic.In fig. 8, on the basis of Fig. 7, also additionally show electricity between anode current (Ia) × anode-cathode with dotted line The time dependent waveform of pressure (Vak).In fig. 8, the time with transverse axis of the waveform being illustrated by the broken lines is integrated and obtains The amount of area represent electrical energy, i.e. switching loss.
According to Fig. 8, in the switching loss brought by reverse recovery current, 2 peaks be can be observed.1st peak is by the most extensive The peak of the needle pattern voltage that the time width that causes of peak I rp of telegram in reply stream is narrow, it is reverse that the 2nd peak is comparable to after Irp The peak that the time width in tail (dIr/dt) portion of electric current is wide.If compared by time integral, the peak that time width is wide is entered The area that row time integral obtains is more than 2 times that the peak that time width is narrow carries out the area that time integral obtains.
That is, for the reduction of switching loss, with compared with the reduction of Irp, the effect increasing (quickening) dIr/dt is bigger.Change Yan Zhi, as described in above-mentioned patent documentation 1, only reduces peak I rp of reverse recovery current, has the reduction of switching loss The problem that limit is limited.
The present invention is to solve above-mentioned problem of the prior art, it is therefore intended that provide the one can be inexpensively and with simple technique Obtain and take into account the reduction of switching loss and the semiconductor device of soft recovery characteristics and the manufacture method of semiconductor device.
Technical scheme
In order to solve above-mentioned problem, it is achieved purpose, the semiconductor device of the present invention possesses: the semiconductor substrate of the first conductivity type; The drift layer of the first conductivity type, it forms the first interarea side of above-mentioned semiconductor substrate;Second conductivity type anode layer, it is along upper State drift layer to be formed selectively, and the above-mentioned drift layer of resistance ratio is low;The cathode layer of the first conductivity type, it is formed at above-mentioned partly leads The surface layer of the second interarea side of structure base board, and contact with above-mentioned drift layer;And room-oxygen complex defect region, it is by sky Position is formed with the complex defect of oxygen.It addition, the semiconductor device of the present invention is characterised by, above-mentioned room-oxygen complex defect district Territory from the boundary face between above-mentioned cathode layer and above-mentioned drift layer towards direction deep of the first interarea of above-mentioned semiconductor substrate Degree is R, and the resistivity of above-mentioned semiconductor substrate is designated as ρ, by the pn-junction from above-mentioned anode layer and above-mentioned drift layer to above-mentioned the moon The thickness of pole layer is designated as t, what the reverse bias voltage V putting on above-mentioned pn-junction represented expand to above-mentioned drift from above-mentioned pn-junction The width W of the depletion layer in Ceng is Thus above-mentioned room-oxygen complex defect region is arranged at by 0 The degree of depth that < R≤t-W represents.
It addition, the semiconductor device of the present invention is characterised by, in above-mentioned invention, above-mentioned room-oxygen complex defect region Formed by the complex defect of VV defect Yu VO defect.
It addition, the semiconductor device of the present invention is characterised by, in above-mentioned invention, above-mentioned room-oxygen complex defect region Possess and make heavy metal be diffused into above-mentioned room-oxygen complex defect region and compound lacking of being formed as that recombination center works Fall into.
It addition, the semiconductor device of the present invention is characterised by, in above-mentioned invention, above-mentioned heavy metal is diffused as platinum diffusion.
It addition, the semiconductor device of the present invention is characterised by, in above-mentioned invention, at above-mentioned first conductive-type semiconductor base It is diode that one interarea of plate optionally has the equipment of the second low conductive area of the above-mentioned semiconductor substrate of resistance ratio Or include the semiconductor device of diode.
It addition, the manufacture method of the semiconductor device of the present invention is to possess the semiconductor substrate of the first conductivity type;First conductivity type Drift layer, it is formed at the first interarea side of above-mentioned semiconductor substrate;Second conductivity type anode layer, it is along above-mentioned drift layer It is formed selectively, and the above-mentioned drift layer of resistance ratio is low;The cathode layer of the first conductivity type, it is formed at above-mentioned semiconductor substrate The surface layer of the second interarea side, and contact with above-mentioned drift layer;And room-oxygen complex defect region, it is by room and oxygen The manufacture method of the semiconductor device that complex defect is formed.Above-mentioned room-oxygen complex defect region from above-mentioned cathode layer with above-mentioned The degree of depth in the direction that the boundary face between drift layer plays the first interarea towards above-mentioned semiconductor substrate is R, by above-mentioned quasiconductor The resistivity of substrate is designated as ρ, will be designated as t from the thickness of the pn-junction of above-mentioned anode layer and above-mentioned drift layer to above-mentioned cathode layer, by The width expanding to depletion layer in above-mentioned drift layer from above-mentioned pn-junction putting on that the reverse bias voltage V of above-mentioned pn-junction represents W isThus above-mentioned room-oxygen complex defect region be arranged at by 0 < R≤t-W represent deep Degree.The manufacture method of the semiconductor device of the present invention is characterised by, by the ion implanting of oxygen in predetermined position locally After ground is formed containing the high concentration oxygen region of the oxygen of high concentration, service life reduction is made to form above-mentioned sky by electron beam irradiation Position-oxygen complex defect region.
It addition, the manufacture method of the semiconductor device of the present invention is to possess the semiconductor substrate of the first conductivity type;First conductivity type Drift layer, its formed above-mentioned semiconductor substrate the first interarea side;Second conductivity type anode layer, it selects along above-mentioned drift layer Formed to selecting property, and the above-mentioned drift layer of resistance ratio is low;The cathode layer of the first conductivity type, it is formed at the of above-mentioned semiconductor substrate The surface layer of two interarea sides, and contact with above-mentioned drift layer;And room-oxygen complex defect region, it is answered by room and oxygen Close the manufacture method of the semiconductor device that defect is formed.Above-mentioned room-oxygen complex defect region is from above-mentioned cathode layer and above-mentioned drift The degree of depth in the direction that the boundary face of shifting layer plays the first interarea towards above-mentioned semiconductor substrate is R, by above-mentioned semiconductor substrate Resistivity is designated as ρ, will be designated as t, by being applied with from the thickness of the pn-junction of above-mentioned anode layer and above-mentioned drift layer to above-mentioned cathode layer That states that the reverse bias voltage V of pn-junction represents expands to the width W of the depletion layer in above-mentioned drift layer from above-mentioned pn-junction and isThus above-mentioned room-oxygen complex defect region is arranged at the degree of depth represented by 0 < R≤t-W.This The manufacture method of the semiconductor device of invention is characterised by, is being formed locally in predetermined position by the ion implanting of oxygen After the high concentration oxygen region of the oxygen comprising high concentration, by carry out heavy metal diffusion make service life reduction formed above-mentioned room- Oxygen complex defect region.
Invention effect
Semiconductor device according to the present invention and the manufacture method of semiconductor device, play and can inexpensively and obtain with simple technique That must take into account switching loss reduces the effect with soft recovery characteristics.
Accompanying drawing explanation
Fig. 1 is the main portion sectional view of the diode of embodiments of the present invention 1.
Fig. 2 is the Rotating fields in the active portion of the diode representing embodiments of the present invention 1 and the explanatory diagram of characteristic distribution.
Fig. 3 is the explanation of the reverse recovery characteristic of the diode representing the manufacture method manufacture by embodiments of the present invention 1 Figure.
Fig. 4 is the sectional view of the manufacturing process of the diode representing embodiments of the present invention 1.
Fig. 5 is the main portion sectional view of the semiconductor substrate representing the Rotating fields of existing diode and life control region.
Fig. 6 is the chopper circuit figure of common IGBT and diode.
Fig. 7 is the time dependent Reverse recovery voltage current waveform of the voltage x current during switch representing common diode Figure.
Fig. 8 is the Reverse recovery representing the diode that semiconductor substrate has been carried out identical life control by electron beam irradiation The figure of characteristic.
Fig. 9 is the explanatory diagram of the reverse recovery characteristic representing comparative example diode.
Symbol description
1:n type drift layer
2: anode
3: negative electrode
4:p type anode layer
5:n type cathode layer
6:pn ties
6a: edge termination
7: protection ring
8: oxide-film
9: active portion
10: edge termination portion
11: room-oxygen complex defect region
12: electron beam irradiation
15: depletion layer
20: diode
30: field plate
50: semiconductor substrate
50a: front
50b: the back side
52: grinding face
53: ion implanting
54: high concentration oxygen region
55: formation region, room
56: oxygen passes through region
Detailed description of the invention
Hereinafter, semiconductor device and the preferred of the manufacture method of semiconductor device that present invention will be described in detail with reference to the accompanying are implemented Mode.In following embodiment (specification and drawings), in the layer being front embroidered with n or p and region, respectively represent electronics or Room is majority carrier.It addition, be marked on n or p+represent impurity concentration of a relatively high, be marked on n or p-represent impurity Concentration is of a relatively high or relatively low.
Should illustrate, in the explanation and accompanying drawing of following embodiment, the symbol identical to same structure tag, and omit The explanation repeated.It addition, in order to easily observe or understand, in embodiment, the accompanying drawing of explanation is not with correct size, size Than describing.Additionally, without departing from the purport of the present invention, the present invention is just not limited to the record of embodiment explained below.
(embodiment 1)
First, the composition of the diode of the semiconductor device as embodiments of the present invention 1 is illustrated.Fig. 1 is this The main portion sectional view of the diode of bright embodiment 1.In FIG, the diode 20 of embodiments of the present invention 1 is vertical Straight type power diode, has pin structure.In fig. 1 it is illustrated that the diode 20 that the most pressure grade is 1200V.
As shown in the main portion sectional view of Fig. 1, diode 20 possesses high-resistance n-type drift layer 1.In embodiment 1, profit The drift layer of first conductivity type of the present invention can be formed by n-type drift layer 1.N-type drift layer 1 is by semiconductor substrate (reference Symbol 50 in Fig. 4) formed.Semiconductor substrate can use silicon (Si).In diode 20, it is possible to use carborundum (SiC), Gallium nitride (GaN), gallium oxide (Ga2O3), diamond (C) etc. replace silicon as semiconductor substrate.
Diode 20 possesses the anode 2 of the upper surface (the first interarea, front) being arranged at n-type drift layer 1.Anode 2 and selectivity Be formed at n-type drift layer 1 the p-type anode layer 4 of central part of upper surface side carry out Ohmic contact.In embodiment 1, profit The second conductivity type anode layer of the present invention can be formed with p-type anode layer 4.Boundary between p-type anode layer 4 and n-type drift layer 1 Face is formed with pn-junction 6.
It addition, diode 20 possesses the negative electrode 3 of the lower surface (the second interarea, the back side) being arranged at n-type drift layer 1.Negative electrode 3 and shape The N-shaped cathode layer 5 becoming whole of lower face side carries out Ohmic contact.N-shaped cathode layer 5 is formed at the following table of n-type drift layer 1 The surface layer of side, face, contacts with n-type drift layer 1.In embodiment 1, utilize N-shaped cathode layer 5 can form the of the present invention The cathode layer of one conductivity type.
It is positioned at the upper surface side of n-type drift layer 1 and is surrounding the periphery of anode layer 4, be configured with edge termination portion 10.Edge termination Portion 10 is the region with dielectric film 8, and described dielectric film 8 is for the surface of the edge termination 6a to pn-junction 6 and its outer circumferential side The surface of the semiconductor substrate (n-type drift layer 1) of high electric field carries out insulation protection.Edge termination portion 10 has ring-type as p The protection ring 7 of type layer, has when applying backward voltage, and mitigation is at the high electricity of the outer surface generation of the substrate surrounding pn-junction 6 The function of field.Protection ring 7 can have field plate 30.Field plate 30 is the film of electric conductivity, is made up of the metal film such as polysilicon or aluminum.
In the lower face side of n-type drift layer 1, be formed room that the life-span of minority carrier compared with periphery obtained reducing- Oxygen complex defect region 11.Room-oxygen complex defect region 11 in semiconductor substrate (n-type drift layer 1), be formed at relative to Boundary face between N-shaped cathode layer 5 and n-type drift layer 1 is positioned at the upper surface side distance of semiconductor substrate (n-type drift layer 1) should The degree of depth of boundary face is the position of R.
Room-oxygen complex defect region 11 as described later, is the region forming aerobic with the complex defect in room, and described oxygen is logical Crossing ion implanting and import to the specific degree of depth of n-type drift layer 1 partly, described room is to be led by electron beam irradiation Enter to whole n-type drift layer 1.Import to the oxygen of n-type drift layer 1 and room by being heat-treated to as compound defect, become Room-oxygen defect (Vacancy-Oxygen defect, VO defect, be below designated as VO), or bivacancy defect The complex of (divacancy, VV defect is below designated as VV).VO, VV are respectively provided with the function of the recombination center of carrier, There is the effect in the life-span reducing carrier.Diode 20 has as above-mentioned existing vertical-type power diode 100 Composition, for its preparation method, it is possible to use manufacture method as in the past.
(Rotating fields in room-oxygen complex defect region 11 and characteristic distribution)
It follows that Rotating fields and characteristic distribution to room specific to diode 20-oxygen complex defect region 11 illustrate. Fig. 2 is the Rotating fields in the active portion 9 of the diode 20 representing embodiments of the present invention 1 and the explanatory diagram of characteristic distribution.? In (a) of Fig. 2, it is shown that the main portion sectional view of the Rotating fields in the active portion 9 of diode 20.
In (a) of Fig. 2, symbol d represents from room-degree of depth started at of the pn-junction 6 in oxygen complex defect region 11.It addition, at Fig. 2 (a) in, symbol 15 represents the depletion layer expanding in n-type drift layer 1.It addition, in (a) of Fig. 2, symbol W represents and passes through N-shaped drift is expanded to when applying the voltage of power source voltage Vcc to diode 20 and make that between K-A, voltage Vka becomes Vcc The thickness of the depth direction of the depletion layer 15 in shifting layer 1.It addition, in (a) of Fig. 2, symbol t represents the degree of depth of n-type drift layer 1 The thickness in direction.The thickness t of the depth direction of n-type drift layer 1 is to the distance of N-shaped cathode layer 5 from pn-junction 6.Cloudy towards N-shaped On the direction of pole layer 5 on the direction towards N-shaped cathode layer 5, the distance from pn-junction 6 to room-oxygen complex defect region 11 is big Thickness W in depletion layer 15.
In (b) of Fig. 2, it is shown that as shown in the cross section of (a) of Fig. 2, the life-span when diode 20 is blocked in predetermined position divides Cloth.In (b) of Fig. 2, the value in the life-span of transverse axis is logarithmic coordinates, and the point intersected with the depth direction X of the longitudinal axis is not life value It it is the point of zero.
Particularly, if the life-span of diode when life control is not carried out is designated as τ0, then τ0Value be 10 μ s~100 μ s Degree.τ0Value can be such as 20 μ s.On the other hand, if imported to whole semiconductor substrate by electron beam irradiation etc. Point defect based on room, then the life-span becomes relative to τ0Obtain value τ reduced1.In order to obtain the predetermined of diode Characteristic, this τ1By the irradiation dose of such as electron beam, for carrying out the annealing temperature etc. of crystallinity recovery, suitably controlled System is in 0.01 μ s~the degree of 5 μ s.
Preferably in 1, owing to forming room-oxygen complex defect region 11 in the predetermined degree of depth further, so room- The life-span of the forming position in oxygen complex defect region 11 is locally decreased to τ2Value.τ2Value be 0.001 μ s~the journey of 0.1 μ s Degree.Should illustrate, in high concentration doped with the p-type anode layer 4 of adulterant with N-shaped cathode layer 5, the life-span is relative to τ0Fall Low.
In (c) of Fig. 2, it is shown that as shown in the cross section of (a) of Fig. 2, defect when blocking diode 20 in predetermined position is dense Degree distribution.In (c) of Fig. 2, the concentration of transverse axis is logarithmic coordinates, and the point intersected with the depth direction X of the longitudinal axis is not that concentration is The point of zero.As shown in (c) of Fig. 2, in diode 20, import to the oxygen (O) of semiconductor substrate in advance by method described later The fixed degree of depth locally increases.
On the other hand, in diode 20, the room imported by electron beam irradiation the VV defect distribution produced is at quasiconductor The entire depth direction of substrate.By heat treatment etc., form the VO defect produced with oxygen by room, become the dense of local VO defect The distribution that degree increases.It addition, VV defect is in the position having imported oxygen, (degree of depth d) concentration also increases.So, room-oxygen is compound lacks Fall into the complex defect region that region 11 is VV defect and VO defect.
Should illustrate, the concentration relationship of VV, VO, O in room-oxygen complex defect region 11 is not limited to shown in (c) of Fig. 2 Relation.The relative concentration relationship of VV, VO, O in room-oxygen complex defect region 11 changes because of formation condition.Such as, VV Defect can be the concentration higher than VO defect.Furthermore it is possible to be that VO defect becomes alms giver, the doping content local of n-type drift layer 1 Ground increases.Now, the position causing local doping concentrations to increase because of the alms giver of VO defect can be as N-shaped field stop layer.This n Type field stop layer has the effect of the extension of suppression depletion layer.
The room of the present invention-oxygen complex defect region 11 has feature further in its forming position.If the n by diode 20 The resistivity of type semiconductor substrate is designated as ρ, and the reverse bias voltage of pn-junction 6 is designated as V, will from by with n-type semiconductor substrate The thickness that the pn-junction 6 of n-type drift layer 1 constituted in the substrate of equal state is started at is designated as t, will from room-oxygen complex defect district When the degree of depth that the pn-junction 6 in territory 11 is started at is designated as d, it is R=from length R in N-shaped cathode layer 5 to room-oxygen complex defect region 11 t-d。
When byRepresent the width W expanding to depletion layer 15 in n-type drift layer 1 from pn-junction 6 Time, the relation of W, d, t is represented by W≤d < t.Length R from N-shaped cathode layer 5 to room-oxygen complex defect region 11 is by 0 < R ≤ t-W represents.By arranging room-oxygen complex defect district centered by the position of this degree of depth R started at from N-shaped cathode layer 5 Territory 11 such that it is able to formed and fully reduce switching loss, and obtain the diode 20 of soft recovery characteristics.
Should illustrate, room-oxygen complex defect region 11 is typically as in figure 2 it is shown, have at the depth direction of semiconductor substrate There is the region of width D.This width D as described later, can be the dispersion of distribution of oxygen concentration in room-oxygen complex defect region 11, If oxygen concentration is Gauss distribution etc., it is also possible to be full width half maximum (Full Width Half Maximum, FWHM).
If as the existing life control described in patent documentation 1, only by the fall of peak I rp of reverse recovery current The low reduction realizing switching loss, although be capable of soft recoveryization, but be difficult to obtain the reduction of sufficient switching loss.This Therefore invention has carried out further improvement, it is contemplated that while reducing peak I rp of reverse recovery current, in addition it is also necessary to suitably Control the life-span (life-span) of institute's injected holes.
The most illustrated in fig. 8, carry out if the waveform of forward current Ia × backward voltage Vak is carried out time integral Relatively, the area of the time integral at the peak that time width is wide is more than 2 times of area of time integral at the narrow peak of time width. That is, the reduction of switching loss is not only relevant to the reduction of Irp, if somewhat increased in the B region shown in Fig. 7 that (quickening) is above-mentioned Reverse current reduce speed dIr/dt, then can reduce switching loss further.
Thus, the reverse current in above-mentioned in order to increase (quickening) the B region shown in Fig. 7 reduces speed dIr/dt, it is possible to reduce The residual holes in B region during switch.On the other hand, if excessively reducing the residual holes in B region, then operating resistance (forward Voltage Vf) may become big.Therefore, in diode 20, it is positioned at exhausting of maximum only to shorten under the rated voltage of diode In the life-span of the residual holes in the outside of slice width degree, the mode reducing residual holes is adjusted.Thus, diode 20 plays fully Reducing switching loss, and obtain soft recovery characteristics, forward voltage (Vf) is not easy to the effect increased.
(manufacture method of diode 20)
It follows that the manufacture method of the semiconductor device as the present invention, the manufacture method of the diode 20 of embodiment 1 is entered Row explanation.Fig. 4 is the sectional view of the manufacturing process of the diode 20 representing embodiments of the present invention 1.In embodiment 1, The rated voltage of diode 20 is set to 1200V, but is not limited to this rated voltage.Hereinafter, illustrate to manufacture according to the order of operation Method.
First, as shown in (a) of Fig. 4, the semiconductor substrate 50 of prepared silicon.Semiconductor substrate 50 such as uses thickness to be 130 μ M, resistivity are the Si semiconductor substrate of the N-shaped utilizing FZ (Floating Zone: floating region) method to manufacture of 55 Ω cm.Quasiconductor Substrate 50 forms n-type drift layer 1.Semiconductor substrate 50 is not limited to utilize FZ method manufacture, it is also possible to utilize CZ (Czochralski: Lifting) method, MCZ (lifting of magnetic field application type) method manufacture.In embodiment 1, utilize semiconductor substrate 50, it is possible to form this The semiconductor substrate of the first bright conductivity type.
For the semiconductor substrate of the bore of more than 8 inches, MCZ method can easily and concentration distribution precision manufactures well, because of This is favourable.Particularly, by CZ method, MCZ method manufacture semiconductor substrate compared with the semiconductor substrate manufactured by FZ method, contain Oxygen is more.The average oxygen concentration of the semiconductor substrate manufactured by FZ method is 1 × 1015/cm3Hereinafter, CZ method, MCZ method are passed through The average oxygen concentration of the semiconductor substrate manufactured is 1 × 1016/cm3Above.Particularly, semiconductor-based manufactured by MCZ method In plate, average oxygen concentration is 1 × 1017/cm3Above.Therefore, easily formed in the diode 20 of embodiments of the present invention 1 Room-oxygen complex defect region 11.
It follows that as shown in (b) of Fig. 4, form p-type anode layer and edge termination portion 10 at the front 50a of semiconductor substrate 50. The oxide-film 8 of the function with dielectric film is formed on the surface in edge termination portion 10 by thermal oxide or method of piling.Additionally, formed The anode 2 contacted with p-type anode layer 4, surface passivated membrane etc., complete surface texture.
Then, as shown in (c) of Fig. 4, the lower thickness of semiconductor substrate 50 is made.For semiconductor substrate 50, from semiconductor-based The back side 50b of plate 50 rises, and by methods such as grinding, back etched or these combinations that grinding back surface is carried out, makes thinner. Thus, the semiconductor substrate 50 back side 50b before thinning, in (c) of Fig. 4, the direction shown in arrow 51 is thinned to The grinding face represented by symbol 52.
It follows that as shown in (d) of Fig. 4, form high concentration oxygen region 54.High concentration oxygen region 54 is such as by from semiconductor-based 52, the grinding face of plate 50, as shown in symbol 53, carries out the ion implanting of oxygen to the inside of semiconductor substrate 50 and imports, thus Formed.
Then, as shown in (e) of Fig. 4, formation region, room 55 is formed at whole semiconductor substrate 50.Formation region 55, room example As formed by carrying out electron beam irradiation 12 from the front of semiconductor substrate 50.Electron beam irradiation 12 can also be from partly leading The back side of structure base board 50 is carried out.
It follows that as shown in (f) of Fig. 4, form room-oxygen complex defect region 11.Room-oxygen complex defect region 11 is such as Formed by semiconductor substrate 50 being carried out heat treatment (annealing) at the predetermined temperature of the scope of 300~400 DEG C.Now, Fig. 4 The oxygen shown in (f) by region 56 and oxygen not over n-type drift layer 1 compared with, oxygen concentration may be bigger, drifts about with N-shaped Layer 1 is compared, and VO defect may somewhat uprise.
In the operation shown in (f) of Fig. 4, also form the N-shaped cathode layer 5 that concentration is higher than n-type drift layer 1.Concentration is drifted about than N-shaped Layer 1 high N-shaped cathode layer 5 such as 52 imports the n-type dopant such as phosphorus by ion implanting to grinding face, utilizes laser annealing etc. to enter Row is electro-active and is formed.
Finally, as shown in (g) of Fig. 4, in grinding face, 52 form negative electrode 3.Negative electrode 3 contacts with the N-shaped cathode layer 5 with grinding face 52 Mode formed.
The diode 20 of rated insulation voltage 1200V such as uses in the power-converting device of supply voltage 600V.Therefore, if set Electricalresistivityρ=55 Ω cm, V=600V, then expand to the width W of depletion layer 15 in n-type drift layer 1 bottom p-type anode layer 4 Based on formulaAnd becomeIf will be from The thickness of the n-type drift layer 1 that the face of pn-junction 6 is started at is designated as t, and the degree of depth in room-oxygen complex defect region 11 is designated as d, is then formed Have vacant position-degree of depth in oxygen complex defect region 11 represents by W≤d < t.
If being applied to the diode 20 of embodiments of the present invention 1, then it is provided with the deep of room-oxygen complex defect region 11 It is the scope within more than 98 μm and 130 μm that degree is started at for bottom p-type anode layer 4 (pn-junction 6).At the diode shown in Fig. 2 In 20, it is the degree of depth of 110 μm starting at from the bottom (pn-junction 6) of p-type anode layer 4, by the ion implanting shape of the oxygen of width 5 μm Become to have 4 × 1017cm3The room-oxygen complex defect region 11 of oxygen concentration.
From grinding face, the injection degree of depth of 52 is 20 μm (130 μm~110 μm) to oxygen, therefore carries out the acceleration energy during ion implanting of oxygen Amount is about 30MeV.Such acceleration energy can be obtained by linear accelerator, cyclotron etc..Now, depth direction The FWHM of (injection direction) is 0.7 μm.But, owing to heat treatment makes oxygen somewhat spread, so the dispersion of distribution of oxygen is about 1.0 μ m.Therefore, the width D in room-oxygen complex defect region 11 is about 1.0 μm~2.0 μm.
Should illustrate, by the ion implanting of oxygen, thus oxygen pass through from the back side of semiconductor substrate N-shaped cathode layer 5, N-shaped drift Move layer 1 and room-oxygen complex defect region 11 and lattice defect is imported damage, it is taken as that room-oxygen complex defect region 11 Width D can further expand, about 2.0 μm~10 μm.
It addition, the dosage of the oxygen of ion implanting can be such as 1 × 1011/cm2~1 × 1014/cm2.Now, it is positioned at from N-shaped the moon The maximum oxygen concentration in the room of degree of depth R that pole layer 5 is started at-oxygen complex defect region 11 can be 1 × 1016/cm2~1 × 1019/ cm2.It addition, the concentration of VO defect can be the degree identical with oxygen concentration, or because be combined with room, so comparing oxygen concentration Low, can be such as 1 × 1014/cm2~1 × 1017/cm2.Additionally, the concentration of the VV defect in room-oxygen complex defect region 11 Can be such as 1 × 1014/cm2~1 × 1017/cm2.It addition, the concentration of the VV defect in room-oxygen complex defect region 11 is permissible Lower than the concentration of VO defect, it is also possible to higher than the concentration of VO defect.
In the operation shown in Fig. 4, eliminate explanation, but in diode 20, the protection ring 7 of p-type formed by the following method: Using not shown oxide-film as mask, under conditions of accelerating potential 50kV, carry out dosage 1.3 × 1013cm-2The ion of boron Inject and drive diffusion.It addition, in diode 20, form p anode layer 4 by the following method: made by not shown oxide-film For mask, under conditions of accelerating potential is 50kV, carry out dosage 1 × 1013cm-2Boron ion implanting and drive diffusion.This p The degree of depth of anode layer 4 and p protection ring 7 is about 3 μm, 4 μm respectively.
It addition, the border between p-type anode layer 4 and n-type drift layer 1 is formed with pn-junction 6.With Si semiconductor substrate surface phase The outside of the edge termination 6a of the pn-junction handed over, in the way of surrounding p-type anode layer 4, arranges multiple p-type at predetermined spaced intervals Protection ring 7.Between the edge termination 6a and protection ring 7 of pn-junction, and the surface that protection ring is each other is coated with oxidation Film 8.
Thereafter, in order to adjust the life-span, implement electron beam irradiation 12 and heat treatment.Electron beam irradiation amount is 4.2MeV at accelerating potential Time be 60kGy, carry out the heat treatment 1 hour for relaxing crystal defect at 360 DEG C.Should illustrate, the acceleration of electron beam irradiation Voltage can be the degree of 1MeV~8MeV, and electron beam irradiation amount can be the degree of 20kGy~600kGy.N-shaped cathode layer 5 leads to Cross following method to be formed: with 1 × 1015cm2Dosage carry out the ion implanting of phosphorus from the back side, make it be diffused into 0.5 μm afterwards The degree of depth.
Use Al-Si film, form anode 2 by vacuum evaporation, with Ti, Ni and Au, form negative electrode 3 by vacuum evaporation.Though not scheming Show, but be preferably provided with the field plate 30 that the peristome via oxide-film 8 contacts with each surface of protection ring 7, described field plate 30 and sun Pole film concurrently forms.Region beyond room-oxygen complex defect region 11 and layer, electrode film etc. can by above-mentioned explanation with Other outer known technology is suitably formed.
Fig. 3 is saying of the reverse recovery characteristic of the diode 20 representing the manufacture method manufacture by embodiments of the present invention 1 Bright figure.Fig. 9 is the explanatory diagram of the reverse recovery characteristic representing comparative example diode.For comparative example diode, in order to two poles Pipe 20 compares, and forms high concentration oxygen region in the position of lower section 5 μm of p-type anode layer 4, by electron beam irradiation 12, makees Formed for room-oxygen complex defect region.
Other manufacturing condition of comparison diode is identical with diode 20.As shown in Figure 3 and Figure 9, the opening of comparative example diode Closing loss is 42mJ, and on the other hand, the switching loss of diode 20 is 26mJ.In diode 20 and comparative example diode, The surge voltage of needle pattern is the most suppressed, and is obtained in that soft recovery characteristics, but in diode 20, with the diode of comparative example Compare, it is known that switching loss reduces further.Additionally, in diode 20, also confirm do not have forward drop (Vf) this not The generation of good situation.
(embodiment 2)
It follows that the diode of embodiments of the present invention 2 is illustrated.The diode of embodiments of the present invention 2 in order to With the thermal diffusion of platinum replace utilizing electron beam irradiation formed the room in the diode 20 described in above-mentioned embodiment 1- The mode in oxygen complex defect region 11 manufactures.Can be identical with above-mentioned embodiment 1 before the thermal diffusion operation of platinum.
When carrying out the manufacture of diode of embodiment 2, it was coated with before the back side of semiconductor substrate 50 forms N-shaped cathode layer 5 Cloth contains the paste of the platinum of 1 weight %, carries out the heat treatment of 3 hours at 1000 DEG C, thus by platinum thermal diffusion to quasiconductor Substrate 50.By this thermal diffusion, thus the platinum from about back side diffusion 25 μm of semiconductor substrate 50, owing to starting at from the back side The high concentration oxygen region that position about 20 μm is formed forms crystal defect, it is possible to form room-oxygen complex defect region 11。
Damaged by the switch of the diode 20 possessing room-oxygen complex defect region 11 of the method manufacture shown in embodiment 2 Consumption is 28mJ, it is also possible to show soft recovery characteristics.It addition, confirm in two poles manufactured by the method shown in embodiment 2 , there is not forward drop (Vf) this unfavorable condition in Guan Zhong.
As mentioned above, according to the diode 20 described in embodiment 1, embodiment 2, it is possible to do not increasing operating resistance In the case of, inexpensively and with simple technique obtain having taken into account reducing and the diode 20 of soft recovery characteristics of switching loss.
Industrial applicability
As it has been described above, the manufacture method of the semiconductor device of the present invention and semiconductor device is at the electricity for power-converting device etc. In the diode of power and the manufacture method of the semiconductor device of built-in power diode and semiconductor device useful, especially It is to be suitable to the diode of electric power and the built-in power diode used in the power-converting device etc. of high voltage-big electric current Semiconductor device and the manufacture method of semiconductor device.

Claims (7)

1. a semiconductor device, it is characterised in that possess:
The semiconductor substrate of the first conductivity type;
The drift layer of the first conductivity type, it is formed at the first interarea side of described semiconductor substrate;
Second conductivity type anode layer, it is formed selectively along described drift layer, and described in resistance ratio, drift layer is low;
The cathode layer of the first conductivity type, it is formed at the surface layer of the second interarea side of described semiconductor substrate, and with described drift Shifting layer contacts;And
Room-oxygen complex defect region, it forms by the complex defect in room Yu oxygen,
Described room-oxygen complex defect region is partly led towards described from the boundary face between described cathode layer and described drift layer The degree of depth in the direction of the first interarea of structure base board is R,
The resistivity of described semiconductor substrate is designated as ρ, by the pn-junction from described anode layer and described drift layer to described negative electrode The thickness of layer is designated as t, expands to described drift layer with put on that the reverse bias voltage V of described pn-junction represents from described pn-junction The width W of interior depletion layer is, described room-oxygen complex defect region be arranged at by 0 < R≤ The degree of depth that t-W represents.
Semiconductor device the most according to claim 1, it is characterised in that described room-oxygen complex defect region is lacked by VV Fall into the complex defect with VO defect to be formed.
Semiconductor device the most according to claim 1, it is characterised in that described room-oxygen complex defect region possesses to be made Heavy metal is diffused into described room-oxygen complex defect region and is formed as the complex defect that recombination center works.
Semiconductor device the most according to claim 3, it is characterised in that described heavy metal is diffused as platinum diffusion.
5. according to the semiconductor device according to any one of Claims 1 to 4, it is characterised in that at described first conductivity type half One interarea of conductor substrate optionally has the equipment of the second low conductive area of semiconductor substrate described in resistance ratio Diode or include the semiconductor device of diode.
6. the manufacture method of a semiconductor device, it is characterised in that described semiconductor device possesses:
The semiconductor substrate of the first conductivity type;
The drift layer of the first conductivity type, it is formed at the first interarea side of described semiconductor substrate;
Second conductivity type anode layer, it is formed selectively along described drift layer, and described in resistance ratio, drift layer is low;
The cathode layer of the first conductivity type, it is formed at the surface layer of the second interarea side of described semiconductor substrate, and with described drift Shifting layer contacts;
Room-oxygen complex defect region, it forms by the complex defect in room Yu oxygen,
Described room-oxygen complex defect region from the boundary face between described cathode layer and described drift layer towards described quasiconductor The degree of depth in the direction of the first interarea of substrate is R,
The resistivity of described semiconductor substrate is designated as ρ, by the pn-junction of described anode layer and described drift layer to described cathode layer Thickness be designated as t, what the reverse bias voltage V putting on described pn-junction represented expand in described drift layer from described pn-junction The width W of depletion layer be, described room-oxygen complex defect region is arranged at by 0 < R≤t-W The degree of depth represented,
The manufacture method of described semiconductor device is formed locally in predetermined position in the ion implanting by oxygen containing high After the high concentration oxygen region of the oxygen of concentration, service life reduction is made to form described room-oxygen complex defect by electron beam irradiation Region.
7. the manufacture method of a semiconductor device, it is characterised in that described semiconductor device possesses:
The semiconductor substrate of the first conductivity type;
The drift layer of the first conductivity type, it is formed at the first interarea side of described semiconductor substrate;
Second conductivity type anode layer, it is formed selectively along described drift layer, and described in resistance ratio, drift layer is low;
The cathode layer of the first conductivity type, it is formed at the surface layer of the second interarea side of described semiconductor substrate, and with described drift Shifting layer contacts;And
Room-oxygen complex defect region, it forms by the complex defect in room Yu oxygen,
Described room-oxygen complex defect region from the boundary face between described cathode layer and described drift layer towards described quasiconductor The degree of depth in the direction of the first interarea of substrate is R,
The resistivity of described semiconductor substrate is designated as ρ, by the pn-junction from described anode layer and described drift layer to described negative electrode The thickness of layer is designated as t, what the reverse bias voltage V putting on described pn-junction represented expand to described drift layer from described pn-junction The width W of interior depletion layer isDescribed room-oxygen complex defect region be arranged to by 0 < R≤ The degree of depth that t-W represents,
The manufacture method of described semiconductor device is being formed locally containing highly concentrated in predetermined position by the ion implanting of oxygen After the high concentration oxygen region of the oxygen of degree, by carry out heavy metal diffusion make service life reduction be formed described room-oxygen is compound lacks Fall into region.
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CN114122111B (en) * 2022-01-26 2022-05-03 江苏游隼微电子有限公司 MOS grid-controlled thyristor with parasitic diode and preparation method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09121052A (en) * 1995-08-21 1997-05-06 Fuji Electric Co Ltd Semiconductor device and fabrication thereof
JP2007266103A (en) * 2006-03-27 2007-10-11 Sanken Electric Co Ltd Manufacturing method for semiconductor device and semiconductor device
CN102122945A (en) * 2009-11-04 2011-07-13 英飞凌科技股份有限公司 Semiconductor device and method for manufacturing a semiconductor device
CN103582936A (en) * 2011-06-09 2014-02-12 丰田自动车株式会社 Semiconductor device and method for producing semiconductor device
CN103890920A (en) * 2011-11-15 2014-06-25 富士电机株式会社 Semiconductor device and method for manufacturing semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6603189B2 (en) 1997-08-14 2003-08-05 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with deliberately damaged layer having a shorter carrier lifetime therein
JP5104314B2 (en) 2005-11-14 2012-12-19 富士電機株式会社 Semiconductor device and manufacturing method thereof
JP2010092991A (en) 2008-10-06 2010-04-22 Toyota Central R&D Labs Inc Diode

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09121052A (en) * 1995-08-21 1997-05-06 Fuji Electric Co Ltd Semiconductor device and fabrication thereof
JP2007266103A (en) * 2006-03-27 2007-10-11 Sanken Electric Co Ltd Manufacturing method for semiconductor device and semiconductor device
CN102122945A (en) * 2009-11-04 2011-07-13 英飞凌科技股份有限公司 Semiconductor device and method for manufacturing a semiconductor device
CN103582936A (en) * 2011-06-09 2014-02-12 丰田自动车株式会社 Semiconductor device and method for producing semiconductor device
CN103890920A (en) * 2011-11-15 2014-06-25 富士电机株式会社 Semiconductor device and method for manufacturing semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106449729A (en) * 2016-08-22 2017-02-22 湖南大学 Semiconductor structure and manufacturing method thereof
CN106449729B (en) * 2016-08-22 2019-04-30 湖南大学 A kind of semiconductor structure is with its production method
CN112652661A (en) * 2019-10-10 2021-04-13 珠海格力电器股份有限公司 Transistor and preparation method thereof
CN116153969A (en) * 2023-03-03 2023-05-23 深圳吉华微特电子有限公司 High-voltage fast recovery diode resistant to single particle burning and manufacturing method thereof

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