CN106025061A - Novel quantum Hall device and manufacturing method thereof - Google Patents
Novel quantum Hall device and manufacturing method thereof Download PDFInfo
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- CN106025061A CN106025061A CN201610552773.XA CN201610552773A CN106025061A CN 106025061 A CN106025061 A CN 106025061A CN 201610552773 A CN201610552773 A CN 201610552773A CN 106025061 A CN106025061 A CN 106025061A
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- 238000004519 manufacturing process Methods 0.000 title abstract description 4
- 239000010409 thin film Substances 0.000 claims abstract description 139
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 63
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 63
- 239000004065 semiconductor Substances 0.000 claims abstract description 50
- 238000000034 method Methods 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 239000002184 metal Substances 0.000 claims abstract description 31
- 239000000463 material Substances 0.000 claims abstract description 29
- 239000010408 film Substances 0.000 claims description 126
- 238000002360 preparation method Methods 0.000 claims description 44
- 238000012546 transfer Methods 0.000 claims description 13
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 11
- 229910052593 corundum Inorganic materials 0.000 claims description 11
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 11
- 229910020039 NbSe2 Inorganic materials 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 10
- 229910021521 yttrium barium copper oxide Inorganic materials 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 9
- 229910052961 molybdenite Inorganic materials 0.000 claims description 9
- 229910052982 molybdenum disulfide Inorganic materials 0.000 claims description 9
- -1 NbTi Inorganic materials 0.000 claims description 8
- 238000001556 precipitation Methods 0.000 claims description 7
- 229910052681 coesite Inorganic materials 0.000 claims description 6
- 229910052906 cristobalite Inorganic materials 0.000 claims description 6
- CWQXQMHSOZUFJS-UHFFFAOYSA-N molybdenum disulfide Chemical group S=[Mo]=S CWQXQMHSOZUFJS-UHFFFAOYSA-N 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- 229910052682 stishovite Inorganic materials 0.000 claims description 6
- 229910052905 tridymite Inorganic materials 0.000 claims description 6
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910005543 GaSe Inorganic materials 0.000 claims description 3
- 229910016001 MoSe Inorganic materials 0.000 claims description 3
- 229910016021 MoTe2 Inorganic materials 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 3
- 241000219289 Silene Species 0.000 claims description 3
- 229910008483 TiSe2 Inorganic materials 0.000 claims description 3
- 229910003090 WSe2 Inorganic materials 0.000 claims description 3
- UHYPYGJEEGLRJD-UHFFFAOYSA-N cadmium(2+);selenium(2-) Chemical compound [Se-2].[Cd+2] UHYPYGJEEGLRJD-UHFFFAOYSA-N 0.000 claims description 3
- 229910052918 calcium silicate Inorganic materials 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- RQQRAHKHDFPBMC-UHFFFAOYSA-L lead(ii) iodide Chemical compound I[Pb]I RQQRAHKHDFPBMC-UHFFFAOYSA-L 0.000 claims description 3
- SBIBMFFZSBJNJF-UHFFFAOYSA-N selenium;zinc Chemical compound [Se]=[Zn] SBIBMFFZSBJNJF-UHFFFAOYSA-N 0.000 claims description 3
- 230000005291 magnetic effect Effects 0.000 abstract description 28
- 238000004377 microelectronic Methods 0.000 abstract description 8
- 238000005516 engineering process Methods 0.000 abstract description 7
- 230000000737 periodic effect Effects 0.000 abstract description 3
- 238000012545 processing Methods 0.000 abstract description 3
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 230
- 238000005457 optimization Methods 0.000 description 10
- 230000000694 effects Effects 0.000 description 7
- 238000005530 etching Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- 239000002887 superconductor Substances 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 238000011982 device technology Methods 0.000 description 3
- 238000005289 physical deposition Methods 0.000 description 3
- 238000005234 chemical deposition Methods 0.000 description 2
- 239000011162 core material Substances 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 230000035515 penetration Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 239000002096 quantum dot Substances 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 230000005355 Hall effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005292 diamagnetic effect Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000010327 methods by industry Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000005476 size effect Effects 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N52/00—Hall-effect devices
- H10N52/101—Semiconductor Hall-effect devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N50/00—Galvanomagnetic devices
- H10N50/80—Constructional details
- H10N50/85—Magnetic active materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N52/00—Hall-effect devices
- H10N52/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N52/00—Hall-effect devices
- H10N52/80—Constructional details
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
- H10N60/85—Superconducting active materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
- H10N60/85—Superconducting active materials
- H10N60/855—Ceramic superconductors
- H10N60/857—Ceramic superconductors comprising copper oxide
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Abstract
The invention provides a novel quantum Hall device and a manufacturing method thereof. The method comprises steps: 1) a substrate is provided, and a first superconducting thin film layer is formed on the surface of the substrate; 2) the surface of the first superconducting thin film layer is coated with a first dielectric thin film layer; 3) a graphene layer or a semiconductor thin film layer with a preset pattern is formed on the surface of the first dielectric thin film layer; 4) a second dielectric thin films and a second superconducting thin film layer are formed on the surface of the structure formed in the third step from bottom to top; and 5) a metal electrode is formed on the surface of the substrate, and the metal electrode is contacted with the graphene layer or the semiconductor thin film layer. Based on a two-dimensional material and a microelectronic processing technology, two layers of superconducting thin films are adopted in the device, the shielding features of the superconducting material on a magnetic field are used, the size of the magnetic field applied to the device is controlled, and when the superconducting thin film is then, part of an external magnetic field is shielded, the remaining magnetic lines form a periodic magnetic field to act on the superconducting thin film, the superconducting thin film is made to work in an interval of a normal state conversion to a superconducting state, and a quantum device is formed, and while high speed and low power consumption of the quantum device are realized, the device manufacturing technical difficulty is reduced.
Description
Technical field
The invention belongs to microelectronic, relate to a kind of quantum device and preparation method thereof, particularly relate to a kind of novel
Quantum Hall device and preparation method thereof.
Background technology
Along with semiconductor chip is continuous towards the trend of high speed, hyperfrequency, high integration, low-power consumption and high characteristic temperature
Development.Requiring more and more higher to the integrated level of microelectronic component, semiconducter process size is more and more less, has approached mole
The limit of law.When device size reaches submicron rank, the quanta fluctuation behavior of electronics will show, and produces various
Quantum effect such as quantum size effect, quantum tunneling effect and quantum Interference etc..Quantum device is based on quantum effect
A kind of novel quantum device.Graphene and MoS2Deng quasiconductor owing to having a series of excellent physicochemical property, open two
The research of dimension material and the upsurge of micro-nano electronic device applications thereof.Especially their Hall effect obtains the card of theory and experiment
Real, therefore become the first-selected core material preparing novel quantum Hall device.And the preparation of the quantum device of nanoscale is from certain
Depend on the development of microelectronic process engineering in the degree of kind, especially photolithography patterning is required harshness.
In consideration of it, the present invention combines microelectronic processing technology based on two-dimensional material, develop a kind of novel quantum Hall device.
Use two-layer superconducting thin film in the devices, utilize the superconductor shielding character to magnetic field, can be with control action in the magnetic of device
Field size, when superconducting thin film is relatively thin, masked segment externally-applied magnetic field, it is thin that remaining magnetic line of force formation periodic magnetic field acts on superconduction
Film so that it is be operated in the interval that normal state changes to superconducting state, forms quantum device.Realizing quantum device high-speed low-power-consumption
The difficulty preparing device Technology is reduced under premise.
Summary of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of novel quantum Hall device and
Its preparation method, for solving to prepare the problem that quantum device technology difficulty is big in prior art.
For achieving the above object and other relevant purposes, the present invention provides the preparation of a kind of novel quantum Hall device
Method, described preparation method at least includes:
1) substrate is provided, forms the first superconducting thin film layer at described substrate surface；
2) the first Dielectric film layers is covered on described first superconducting thin film layer surface；
3) there is graphene layer or the semiconductor film layer of preset pattern in described first Dielectric film layers surface formation；
4) in described step 3) body structure surface that formed sequentially forms the second Dielectric film layers and the second superconduction from bottom to top
Thin layer；
5) forming metal electrode at described substrate surface, described metal electrode connects with graphene layer or semiconductor film layer
Touch.
As the scheme of a kind of optimization of the preparation method of the present invention novel quantum Hall device, described substrate is SiO2、
MgO or Al2O3。
As the scheme of a kind of optimization of the preparation method of the present invention novel quantum Hall device, described first superconducting thin film
Layer is dielectrically separated from graphene layer or semiconductor film layer by the first Dielectric film layers, and described second superconducting thin film layer passes through the
Two Dielectric film layers are dielectrically separated from graphene layer or semiconductor film layer.
As the scheme of a kind of optimization of the preparation method of the present invention novel quantum Hall device, described first superconducting thin film
Layer and the second superconducting thin film layer are by mechanically pulling off the method for the transfer of rear dry method or Direct precipitation thin film and are formed, and material is
YBCO、Nb、NbSe2, NbTi, NbN or NbTiN.
As the scheme of a kind of optimization of the preparation method of the present invention novel quantum Hall device, described first superconducting thin film
Layer is respectively less than 100nm with the thickness of the second superconducting thin film layer.
As the scheme of a kind of optimization of the preparation method of the present invention novel quantum Hall device, described first dielectric film
Layer and the second Dielectric film layers are by mechanically pulling off the method for the transfer of rear dry method or Direct precipitation thin film and are formed, and material is h-
BN、Al2O3Or HfO2, thickness is 10～100nm.
As the scheme of a kind of optimization of the preparation method of the present invention novel quantum Hall device, described graphene layer or half
Leading thin layer and be by mechanically pulling off the transfer formation of rear dry method, described semiconductor film layer is MoS2, black phosphorus, silene, germanium alkene, WS2、
WTe2、MoSe、MoTe2、WSe2、WTe、TiSe2、PtSe2、ZnSe、PdSe2、CdS、CdSe、BP、SnSe、PtS2、PbI2、GaSe、
InSe、ReS2Or ReSe2, described graphene layer or the thickness partly leading thin layer are extremely several atomic layers.
As the scheme of a kind of optimization of the preparation method of the present invention novel quantum Hall device, described step 5) described in
Metal electrode does not contacts with described first superconducting thin film layer and the second superconducting thin film layer.
The present invention also provides for a kind of novel quantum Hall device, and described quantum Hall device at least includes:
Substrate；
It is formed at the first superconducting thin film layer of described substrate surface；
It is covered in first Dielectric film layers on described first superconducting thin film layer surface；
It is formed at described first Dielectric film layers and there is graphene layer or the semiconductor film layer of preset pattern；
It is sequentially formed in the of described first Dielectric film layers and graphene layer or semiconductor film layer surface from bottom to top
Two Dielectric film layers and the second superconducting thin film layer；
It is formed at described substrate surface and the metal electrode contacted with described graphene layer or semiconductor film layer.
As the scheme of a kind of optimization of the present invention novel quantum Hall device, described first superconducting thin film layer passes through first
Dielectric film layers is dielectrically separated from graphene layer or semiconductor film layer, and described second superconducting thin film layer passes through the second dielectric film
Layer is dielectrically separated from graphene layer or semiconductor film layer.
As the scheme of a kind of optimization of the present invention novel quantum Hall device, described first superconducting thin film layer and the second surpassing
The thickness leading thin layer is respectively less than 100nm.
As the scheme of a kind of optimization of the present invention novel quantum Hall device, described metal electrode the first does not surpasses with described
Leading thin layer and the contact of the second superconducting thin film layer, described second superconducting thin film layer is as back-gate electrode.
As it has been described above, novel quantum Hall device of the present invention and preparation method thereof, including step: first provide a lining
The end, form the first superconducting thin film layer at described substrate surface；Secondly the first dielectric is covered on described first superconducting thin film layer surface
Thin layer；Then graphene layer or the semiconductor film layer with preset pattern is formed on described first Dielectric film layers surface；
Then the body structure surface in above-mentioned formation sequentially forms the second Dielectric film layers and the second superconducting thin film layer from bottom to top；Finally exist
Described substrate surface forms metal electrode and contacts with graphene layer or semiconductor film layer with described metal electrode, the second surpasses
Leading thin layer and the second superconducting thin film layer does not contacts with metal electrode, the second superconducting thin film layer can use as back-gate electrode.
The present invention combines microelectronic processing technology based on two-dimensional material, it is provided that a kind of novel quantum Hall device and preparation method thereof,
This device uses two-layer superconducting thin film, utilizes the superconductor shielding character to magnetic field, can be with control action in the magnetic of device
Field size, when superconducting thin film is relatively thin, masked segment externally-applied magnetic field, the remaining magnetic line of force forms quantum uniformly across superconducting thin film
Device, reduces the difficulty preparing device Technology on the premise of realizing quantum device high-speed low-power-consumption.
Accompanying drawing explanation
Fig. 1 is the preparation method schematic flow sheet of the present invention novel quantum Hall device.
Fig. 2 a is the preparation method step 1 of the present invention novel quantum Hall device) the structural upright schematic diagram that presents.
Fig. 2 b is the sectional view in Fig. 2 a along AA ' direction.
Fig. 3 a is the preparation method step 2 of the present invention novel quantum Hall device) the structural upright schematic diagram that presents.
Fig. 3 b is the sectional view in Fig. 3 a along AA ' direction.
Fig. 4 a is the preparation method step 3 of the present invention novel quantum Hall device) the structural upright schematic diagram that presents.
Fig. 4 b is the sectional view in Fig. 4 a along AA ' direction.
Fig. 5 a and Fig. 6 a is the preparation method step 4 of the present invention novel quantum Hall device) signal of the structural upright that presents
Figure.
Fig. 5 b and Fig. 6 b is respectively the sectional view in Fig. 5 a and Fig. 6 a along AA ' direction.
Fig. 7 a is the preparation method step 5 of the present invention novel quantum Hall device) the structural upright schematic diagram that presents.
Fig. 7 b is the sectional view in Fig. 7 a along AA ' direction.
Element numbers explanation
1 substrate
2 first superconducting thin film layers
3 first Dielectric film layers
4 graphene layers or semiconductor film layer
5 second Dielectric film layers
6 second superconducting thin film layers
7 metal electrodes
Detailed description of the invention
Below by way of specific instantiation, embodiments of the present invention being described, those skilled in the art can be by this specification
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also be by the most different concrete realities
The mode of executing is carried out or applies, the every details in this specification can also based on different viewpoints and application, without departing from
Various modification or change is carried out under the spirit of the present invention.
Refer to accompanying drawing.It should be noted that the diagram provided in the present embodiment illustrates the present invention the most in a schematic way
Basic conception, the most graphic in component count time only display with relevant assembly in the present invention rather than is implemented according to reality, shape
Shape and size are drawn, and during its actual enforcement, the kenel of each assembly, quantity and ratio can be a kind of random change, and its assembly cloth
Office's kenel is likely to increasingly complex.
The present invention provides the preparation method of a kind of novel quantum Hall device, refers to accompanying drawing 1, is shown as the system of the method
Standby process chart, comprises the steps:
S1: provide a substrate, forms the first superconducting thin film layer at described substrate surface；
S2: cover the first Dielectric film layers on described first superconducting thin film layer surface；
S3: form graphene layer or the semiconductor film layer with preset pattern on described first Dielectric film layers surface；
S4: the body structure surface formed in described step S3 sequentially forms the second Dielectric film layers and the second superconducting thin film layer from bottom to top；
S5: forming metal electrode at described substrate surface, described metal electrode connects with graphene layer or semiconductor film layer
Touch.
The technical scheme of the preparation method of the present invention novel quantum Hall device is described in detail below by accompanying drawing.
Step 1 is first carried out, as shown in figures 2 a and 2b, it is provided that a substrate 1, forms the first superconduction on described substrate 1 surface
Thin layer 2.
Described substrate 1 can be SiO2, MgO or Al2O3Deng, it is of course also possible to be other suitable backing materials, at this
Do not limit.In the present embodiment, described substrate 1 is SiO2Substrate.In another embodiment, described substrate 1 uses MgO substrate.
In this step, the process forming the first superconducting thin film layer 2 on described substrate 1 surface is: after first using mechanical stripping
The method of dry method transfer or Direct precipitation (physical deposition) thin film forms one layer of superconducting thin film at described substrate surface, then leads to
Over etching technique forms the first superconducting thin film layer 2 of preset pattern, as in Fig. 2 a and 2b for formed after etching superconducting thin film the
One superconducting thin film layer 2.
As example, the material of described first superconducting thin film layer 2 can be YBCO, Nb, NbSe2, NbTi, NbN or NbTiN
Deng two dimension superconductor.In the present embodiment, superconducting thin film is formed at described lining by the method being by mechanically pulling off the transfer of rear dry method
Surface, the end 1, described first superconducting thin film layer 2 uses NbSe2.In another embodiment, described first superconducting thin film layer 2 uses
YBCO。
The thinner thickness of described first superconducting thin film layer 2, controls in the range of less than 100nm, can be such as 10nm,
20nm, 35nm, 45nm, 50nm, 70nm, 80nm, 90nm or 95nm etc..
Then perform step S2, as best shown in figures 3 a and 3b, cover the first dielectric on described first superconducting thin film layer 2 surface thin
Film layer 3.
Detailed process is: first use dry method transfer or Direct precipitation (physical deposition or chemical deposition) after mechanical stripping
The method of thin film forms one layer of Dielectric film layers 3 on described first superconducting thin film layer 2 surface, is then formed pre-by etching technics
If the first Dielectric film layers 3 of figure, as in Fig. 3 a and 3b being the first Dielectric film layers 3 formed after etch dielectric thin film.
As example, the material of described first Dielectric film layers 3 can be h-BN, Al2O3Or HfO2Deng, it is of course also possible to
It is other suitable dielectric materials, does not limits at this.In the present embodiment, the method being by mechanically pulling off the transfer of rear dry method is thin by dielectric
Film is formed at described first superconducting thin film layer 2 surface, and described first Dielectric film layers 3 uses h-BN.In another embodiment, institute
Stating the first Dielectric film layers 3 uses h-BN to use Al2O3。
The thickness range of described first Dielectric film layers 3 is 10～100nm models, can be such as 10nm, 15nm, 30nm,
45nm, 50nm, 75nm, 85nm, 90nm or 98nm etc..
It should be noted that described first Dielectric film layers 3 formed needs whole first superconduction in covering step S1 thin
Film layer 2 surface (includes upper surface and side), so can avoid the first superconducting thin film layer 2 and the graphene layer being subsequently formed or
Person's semiconductor film layer 4 contacts.
Then step S3 is performed, as shown in Figs. 4a and 4b, formed to have on described first Dielectric film layers 3 surface and preset figure
The graphene layer (Gr) of shape or semiconductor film layer 4.
Detailed process is: first use dry method transfer or Direct precipitation (physical deposition or chemical deposition) after mechanical stripping
The method of thin film forms layer graphene material or a semiconductor film material on described first Dielectric film layers 3 surface, then leads to
Over etching technique forms graphene layer or the semiconductor film layer 4 of preset pattern, thus forms hall structure, in Fig. 4 a and 4b
For the graphene layer formed after etching or semiconductor film layer 4.
As example, the material of described semiconductor film layer 4 can be MoS2, black phosphorus, silene, germanium alkene, WS2、WTe2、
MoSe、MoTe2、WSe2、WTe、TiSe2、PtSe2、ZnSe、PdSe2、CdS、CdSe、BP、SnSe、PtS2、PbI2、GaSe、
InSe、ReS2Or ReSe2Deng, it is of course also possible to be that other are suitable as the material of hall structure, do not limit at this.The present embodiment
In, grapheme material or semiconductor film material are formed at described first dielectric by the method being by mechanically pulling off the transfer of rear dry method
Thin layer 3 surface.In the present embodiment, in hall device, use graphene layer.In another embodiment, in hall device, use half
Conductor thin film layer, such as MoS2, MoS2There is the layer structure similar with Graphene, be the quasiconductor material of a kind of low dimensional broad-band gap
Material, the MoS of monolayer2There is direct band gap (1.8ev) structure, it is adaptable to prepare transistor, opto-electronic device etc..
Described graphene layer or the thickness partly leading thin layer 4 are extremely several atomic layer level thickness.In the present embodiment, Hall
Device uses single-layer graphene.
It should be noted that etch the graphene layer with preset pattern or semiconductor film layer 4 outward flange formed
(as shown in Figs. 4a and 4b) can be contacted with substrate 1 or do not contact, and contact with the metal electrode 7 being subsequently formed.
Then performing step S4, as shown in Fig. 5 a～Fig. 6 b, the body structure surface formed in described step S3 depends on from bottom to top
Secondary formation the second Dielectric film layers 5 and the second superconducting thin film layer 6.
As shown in figure 5a and 5b, first the second Dielectric film layers 5 is formed at the described body structure surface formed in step S3.Preparation
The second Dielectric film layers 5 method with preparation the first Dielectric film layers 3 method identical, do not repeat them here.The formed
Two Dielectric film layers 5 contact with the first Dielectric film layers 3 and the graphene layer (or semiconductor film layer) 4 of lower floor.
As example, the material of described second Dielectric film layers 5 can be h-BN, Al2O3Or HfO2Deng, it is of course also possible to
It is other suitable dielectric materials, does not limits at this.In the present embodiment, described second Dielectric film layers 5 uses thin with the first dielectric
The material that film layer is identical, for h-BN.In another embodiment, described second Dielectric film layers 5 uses Al2O3。
The thickness range of described second Dielectric film layers 5 is 10～100nm models, can be such as 10nm, 15nm, 30nm,
45nm, 50nm, 75nm, 85nm, 90nm or 98nm etc..
It should be noted that the edge of the second Dielectric film layers 5 of etching formation not can exceed that graphene layer or quasiconductor
The edge of thin layer 4, i.e. needs to come out the edge of graphene layer or semiconductor film layer 4, in order to follow-up graphite
Alkene layer or semiconductor film layer 4 can be formed with metal electrode 7 and contact.
As shown in figure 6 a and 6b, the second superconducting thin film layer 6 is formed on described second Dielectric film layers 5 surface.The formed
The graphic structure of two superconducting thin film layers 6 is identical with the graphic structure of the first superconducting thin film layer 2 in step S1, prepares the second superconduction thin
The method of film layer 6 is identical with the method preparing the first superconducting thin film layer 2 in step S1, does not repeats them here.
As example, the material of described second superconducting thin film layer 6 can be YBCO, Nb, NbSe2, NbTi, NbN or NbTiN
Deng two dimension superconductor.In the present embodiment, described second superconducting thin film layer 6 uses the material identical with the first superconducting thin film layer 2,
For NbSe2.In another embodiment, described second superconducting thin film layer 6 uses YBCO.
The thinner thickness of described second superconducting thin film layer 6, controls in the range of less than 100nm, can be such as 10nm,
20nm, 35nm, 45nm, 50nm, 70nm, 80nm, 90nm or 95nm etc..
It should be noted that the edge of the second superconducting thin film layer 6 should be less than the edge of the second Dielectric film layers 5, with
Insulated by the graphene layer (or semiconductor layer) of described second dielectric film 5 with lower floor.
Finally perform step S5, as described in Fig. 7 a and 7b, form metal electrode 7, described metal electricity on described substrate 1 surface
Pole 7 contacts with graphene layer or semiconductor film layer 4.
It should be noted that, described metal electrode 7 is except contacting with graphene layer or semiconductor film layer 4, it is also possible to
One Dielectric film layers 3 contacts with the second Dielectric film layers 5, but does not connects with the first superconducting thin film layer 2 and the second superconducting thin film layer 6
Touch.Wherein, the second superconducting thin film layer is also used as back-gate electrode.
In a word, between graphene layer or semiconductor film layer 4 and the levels superconducting thin film 2,6 in the middle of hall device by
Dielectric film 3,5 is isolated, in order to avoid metal electrode 7 touches superconducting thin film 2,6, after graphical, and the limit of superconducting thin film 2,6
Edge should not contacted with graphene layer (semiconductor film layer) 4 by dielectric film 3,5 isolation, and last metal electrode 7
The graphene layer (semiconductor film layer) 4 or Graphene (the semiconductor film layer)/Dielectric film layers that expose with edge contact,
And do not contact with superconducting thin film 2,6.
From above-mentioned, in the present embodiment, define NbSe2/h-BN/Gr/h-BN/NbSe2/SiO2Stacked structure, should
Stacked structure forms fabulous contacting through mask etching layer by layer, structural edge with the metal electrode of subsequent deposition.Wherein two-layer
Superconducting thin film does not contacts with metal electrode.Owing to when magnetic field one timing, the penetrated bed of superconducting thin film is relevant with the thickness of thin film.When
When superconducting thin film is thicker, magnetic field penetration layer is the thinnest, is negligible, and has diamagnetism completely.But superconducting thin film is relatively thin
Time, magnetic field penetration layer, compared with thin film, cannot be ignored, it is allowed to partial magnetic field penetrates thin film.Owing to the present embodiment uses
Superconducting thin film relatively thin, when graphene device that step S5 is formed is in external magnetic field, due to the NbSe of device upper and lower surface2
Middle by sensing generation eddy current, and produce and the rightabout induced field of external magnetic field, part external magnetic field is cancelled, the remanence line of force
Form periodic magnetic field and act on superconducting thin film so that it is be operated in the interval that normal state changes to superconducting state, form Graphene quantum
Device.
The NbSe of the present embodiment2/h-BN/Gr/h-BN/NbSe2/SiO2The device of stacked structure has outside uniform masked segment
The effect in magnetic field.The method using superconducting thin film to produce uniform, controllable magnetic field formation quantum device greatly reduces quantum device pair
The rigors of microelectronics preparation technology, easily realizes electronic device low-power consumption purpose at a high speed.Dielectric layer h-BN mono-aspect is made
Graphene-structured is prevented to be destroyed for protective layer, on the one hand isolation Graphene and NbSe2.It is by mechanically pulling off and dry method transfer obtains
Obtain the graphene device of stacked structure, keep the intrinsic electrology characteristic of layers of material to the full extent.
And in another embodiment, define YBCO/Al2O3/MoS2/Al2O3The stacked structure of/YBCO/MgO, by adopting
With two dimension MoS2Thin film has active layer as device, thin layer YBCO superconductive film can effective masked segment magnetic field, formation is evenly distributed
Controlled magnetic field passes superconducting thin film, and the similar magnetic field of its effect passes the physical arrangement with quantum dot, therefore forms quantum device
Part.Additionally use the structure of superconducting thin film/dielectric film/Graphene (quasiconductor)/dielectric film/superconducting thin film, layers of material
Selection be not limited to cited by embodiment one and two, as required and material behavior can select substrate, technique and each
Layer suitably materials application is prepared in device.
The present invention also provides for a kind of novel quantum Hall device, and as shown in figure 6 a and 6b, described quantum Hall device is at least
Including: substrate the 1, first superconducting thin film layer the 2, first Dielectric film layers 3, graphene layer or semiconductor film layer the 4, second dielectric are thin
Film layer the 5, second superconducting thin film layer 6 and metal electrode 7.
Described first Dielectric film layers 3 is covered in described first superconducting thin film layer 2 surface and (includes that upper surface and side are all covered
Lid).
Described graphene layer (or semiconductor film layer) 4 is formed at described first Dielectric film layers 3 and has preset pattern,
Extend a part to contact with metal electrode 7.
Described second Dielectric film layers 5 is formed at described first Dielectric film layers 3 and graphene layer (or semiconductive thin film
Layer) 4 surfaces, described second superconducting thin film layer 6 is formed at described second Dielectric film layers 5 surface.
Described metal electrode 7 is formed at described substrate 1 surface and connects with described graphene layer (or semiconductor film layer) 4
Touch.
In the present invention, described first superconducting thin film layer 2 is by the first Dielectric film layers 3 and graphene layer or semiconductive thin film
Layer 4 is dielectrically separated from, and described second superconducting thin film layer 6 is exhausted with graphene layer or semiconductor film layer 4 by the second Dielectric film layers 5
Edge is isolated.Described second superconducting thin film layer is also used as back-gate electrode and uses.
It addition, as example, described first superconducting thin film layer 2 and the thinner thickness of the second superconducting thin film layer 6, be respectively less than
100nm。
Preferably, described metal electrode 7 can also contact with described first Dielectric film layers 3 and the second Dielectric film layers 5
In sum, novel quantum Hall device that the present invention provides and preparation method thereof, it is adaptable to Graphene and MoS2
Etc. the preparation of the quantum device of two-dimensional material, use superconducting thin film/dielectric film/Graphene (semiconductive thin film)/dielectric film/
The structure of superconducting thin film, utilizes the diamagnetic characteristic of superconducting thin film such as YBCO, NbSe, when superconducting thin film is relatively thin, it is allowed to part magnetic
Field penetrates membrane action and forms quantum device in core material.In device fabrication process, it is not necessary to formed by patterned method
Quantum dot, therefore on the premise of realizing the high-speed low-power-consumption characteristic of quantum device, reduces device microelectronics preparation technology's
Difficulty, especially reduces the difficulty of photolithography patterning.
So, the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
The principle of above-described embodiment only illustrative present invention and effect thereof, not for limiting the present invention.Any ripe
Above-described embodiment all can be modified under the spirit and the scope of the present invention or change by the personage knowing this technology.Cause
This, have usually intellectual such as complete with institute under technological thought without departing from disclosed spirit in art
All equivalences become are modified or change, and must be contained by the claim of the present invention.
Claims (12)
1. the preparation method of a novel quantum Hall device, it is characterised in that described preparation method at least includes:
1) substrate is provided, forms the first superconducting thin film layer at described substrate surface；
2) the first Dielectric film layers is covered on described first superconducting thin film layer surface；
3) there is graphene layer or the semiconductor film layer of preset pattern in described first Dielectric film layers surface formation；
4) in described step 3) body structure surface that formed sequentially forms the second Dielectric film layers and the second superconducting thin film from bottom to top
Layer；
5) forming metal electrode at described substrate surface, described metal electrode contacts with graphene layer or semiconductor film layer.
The preparation method of novel quantum Hall device the most according to claim 1, it is characterised in that: described substrate is SiO2、
MgO or Al2O3。
The preparation method of novel quantum Hall device the most according to claim 1, it is characterised in that: described first superconduction is thin
Film layer is dielectrically separated from graphene layer or semiconductor film layer by the first Dielectric film layers, and described second superconducting thin film layer passes through
Second Dielectric film layers is dielectrically separated from graphene layer or semiconductor film layer.
The preparation method of novel quantum Hall device the most according to claim 1, it is characterised in that: described first superconduction is thin
Film layer and the second superconducting thin film layer are by mechanically pulling off the method for the transfer of rear dry method or Direct precipitation thin film and are formed, and material is
YBCO、Nb、NbSe2, NbTi, NbN or NbTiN.
The preparation method of novel quantum Hall device the most according to claim 1, it is characterised in that: described first superconduction is thin
The thickness of film layer and the second superconducting thin film layer is respectively less than 100nm.
The preparation method of novel quantum Hall device the most according to claim 1, it is characterised in that: described first dielectric is thin
Film layer and the second Dielectric film layers are by mechanically pulling off the method for the transfer of rear dry method or Direct precipitation thin film and are formed, and material is h-
BN、Al2O3Or HfO2, thickness is 10～100nm.
The preparation method of novel quantum Hall device the most according to claim 1, it is characterised in that: described graphene layer or
Partly leading thin layer and be by mechanically pulling off the transfer formation of rear dry method, described semiconductor film layer is MoS2, black phosphorus, silene, germanium alkene,
WS2、WTe2、MoSe、MoTe2、WSe2、WTe、TiSe2、PtSe2、ZnSe、PdSe2、CdS、CdSe、BP、SnSe、PtS2、PbI2、
GaSe、InSe、ReS2Or ReSe2, described graphene layer or the thickness partly leading thin layer are extremely several atomic layers.
The preparation method of novel quantum Hall device the most according to claim 1, it is characterised in that: described step 5) in institute
State metal electrode not contact with described first superconducting thin film layer and the second superconducting thin film layer.
9., such as the quantum Hall device utilizing preparation method preparation as described in any one of claim 1～8 to be formed, its feature exists
In, described quantum Hall device at least includes:
Substrate；
It is formed at the first superconducting thin film layer of described substrate surface；
It is covered in first Dielectric film layers on described first superconducting thin film layer surface；
It is formed at described first Dielectric film layers and there is graphene layer or the semiconductor film layer of preset pattern；
It is sequentially formed in second Jie on described first Dielectric film layers and graphene layer or semiconductor film layer surface from bottom to top
Thin film layer and the second superconducting thin film layer；
It is formed at described substrate surface and the metal electrode contacted with described graphene layer or semiconductor film layer.
The preparation method of novel quantum Hall device the most according to claim 9, it is characterised in that: described first superconduction
Thin layer is dielectrically separated from graphene layer or semiconductor film layer by the first Dielectric film layers, and described second superconducting thin film layer leads to
Cross the second Dielectric film layers to be dielectrically separated from graphene layer or semiconductor film layer.
The preparation method of 11. novel quantum Hall devices according to claim 9, it is characterised in that: described first superconduction
The thickness of thin layer and the second superconducting thin film layer is respectively less than 100nm.
The preparation method of 12. novel quantum Hall devices according to claim 9, it is characterised in that: described metal electrode
Not contacting with described first superconducting thin film layer and the second superconducting thin film layer, described second superconducting thin film layer is as back-gate electrode.
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