CN105633268A - Superconducting circuit structure and preparation method thereof - Google Patents
Superconducting circuit structure and preparation method thereof Download PDFInfo
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- CN105633268A CN105633268A CN201511028259.8A CN201511028259A CN105633268A CN 105633268 A CN105633268 A CN 105633268A CN 201511028259 A CN201511028259 A CN 201511028259A CN 105633268 A CN105633268 A CN 105633268A
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- H10N60/00—Superconducting devices
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- H10N60/0912—Manufacture or treatment of Josephson-effect devices
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Abstract
The invention provides a superconducting circuit structure and a preparation method thereof. The preparation method comprises steps of 1) providing a substrate, and forming a stress pattern structure in a position, in which a Josephson junction is going to be formed, corresponding to the surface of the substrate, wherein the size of the stress pattern structure is larger than that of the Josephson junction; 2) successively forming three layers of thin film structures including a first superconducting material layer, a first insulation material layer and a second superconducting layer on the surface of the substrate; 3) etching the three layers of the thin film structures so as to form a bottom electrode and the Josephson junction; 4) forming a second insulation material layer on the surface of a structure obtained in the step 3) and forming a first opening in a position corresponding to the Josephson junction of the second insulation material layer; and 5) depositing and etching the third superconducting material layer so as to form a wire distributing layer. By forming the stress pattern structure under the Josephson junction, wherein the size of the stress patter structure is larger than that of the Josephson junction, effective releasing of stress in the Josephson junction is facilitated, so leakage current is avoided and performance and stability of the superconducting circuit structure are improved.
Description
Technical field
The present invention relates to superconducting circuit design field, particularly relate to a kind of superconducting circuit structure and preparation method thereof.
Background technology
Superconducting circuit structure includes superconducting quantum interference device (SQUID), the circuit of the application Josephson junctions such as single flux quantum device (SFQ).
Superconducting quantum interference device (superconductingquantuminterferencedevice, SQUID) the Superconducting Quantum device of Josephson effect and flux quautization principle it is based on, its basic structure is two Josephson junctions of insertion in superconducting ring, SQUID is the sensitiveest magnetic flux detection sensor being currently known, and the Flux noise of typical SQUID device is at �� ��0/Hz1/2Magnitude (1 ��0=2.07 �� 10-15Wb), its magnetic noise is at fT/Hz1/2Magnitude (1fT=1 �� 10-15T), owing to it has high sensitivity, can be widely applied to each side such as medical science heart magnetic brain magnetic, materials detection, magnetic field of the earth, military affairs, earthquake and archaeology, basic research can be engaged in its magnetic flux microscope prepared.
Single flux quantum device (SingleFluxQuantum, SFQ) utilizes single magnetic flux in Josephson junction to represent the superconducting circuit technology of logical one and " 0 ". Superconducting digital circuits clock frequency based on this, up to 770GHz, can be used for the digital autocorrelator and superconducting computer etc. of the ultra broadband D and D/A converter of radar and communication system, broadband network exchanger, radio astronomy. Because it has the advantages such as speed is fast, low in energy consumption, the current U.S. and Japan all put into huge fund and carry out strategic research.
In quantum-mechanical concept, when two nugget genus are separated by insulator one layer thin, electric current can being had to pass through, generally the lamination of this " metal-insulator-metal " is called tunnel knot between metal, between them, the electric current of flowing is called tunnel current. If, in this lamination sandwich structure, one or two metals are superconductors, then be called superconducting tunnel junction. According to Josephson effect, in superconducting tunnel junction, insulating barrier has the properties of superconductor, but has more weak superconductivity compared with conventional superconductor, is referred to as " weakly-coupled superconductor ".
It is illustrated in figure 1 the structural representation of Josephson junction (JosephsonJunction) 11, including first superconducting material the 111, second superconducting material 113 and the first insulation material layer 112 between described first superconducting material 111 and described second superconducting material 113, the very thin thickness of wherein said first insulation material layer 112, generally at several thickness to tens nanometers.
Superconducting circuit structure is generally collocated with each other by Josephson junction 11 and some resistance, inductance etc. and forms, and has the insulation material layer of more than three layers or above superconducting material and two-layer. As shown in Figure 2 to Figure 3, wherein, Fig. 2 is the fragmentary top TV structure schematic diagram of superconducting circuit structure to the part-structure schematic diagram of existing superconducting circuit structure, and Fig. 3 is the cross section structure schematic diagram of Fig. 2; By Fig. 2 to Fig. 3 it can be seen that described Josephson junction 11 is connected by devices such as wiring layer 14 and conductive through hole 13 and inductance. Because merging Superconductor Physics and microelectric technique, the design of superconducting circuit is complex, need to consider the impact that causes of small variable, mate including inductance size, resistance size and resistance, the thickness of every layer film, the electric capacity etc. that caused by metal-insulator metal. In the performance of Josephson junction that is made up of superconducting insulation superconduction very crucial, if technology controlling and process is bad, be easier to that leakage current occurs. Leakage current is typically derived from interlayer and side. The leakage current of side can be solved by the covering of insulating barrier. The leakage current of interlayer then derives from the hole of insulating barrier, compactness and stress in Josephson junction. Its hole and compactness can be solved by the sedimentary condition of adjustment insulating barrier. And stress part is always up the direction that scientific research personnel makes great efforts. The focus of work is placed on the stress aspect how reducing thin film itself by major part scientific research personnel.
The preparation method of typical superconductive device is as follows: first prepare the three-layer thin-film of superconductor-insulation material layer-superconductor structure on substrate; Then, trilamellar membrane etches hearth electrode; Then, Josephson junction is prepared at the design attitude of Josephson junction; Then on device surface, deposit SiO or SiO2Insulation material layer also prepares the hole deposition in order to next step superconducting thin film on insulation material layer, or with lift-off method Josephson junction prepared above go out hole; Deposit the bypass resistance of Josephson junction in SQUID device again; Finally, deposition wiring layer also carries out etching technics, to draw the top electrode of Josephson junction. When applying stripping technology (lift-off) and preparing Josephson junction or application drilling technology, first do hearth electrode and re-define interface, generally do inter-layer passages with bigger Josephson junction and connect, because bigger knot has bigger critical current. The plan structure schematic diagram of the single channel superconduction attachment structure that respectively prepared by said method as shown in Figures 2 and 3 and cross section structure schematic diagram, described superconducting circuit structure includes: substrate 10; It is positioned at the Josephson junction 11 on described substrate 10 surface, described Josephson junction 11 includes the hearth electrode 114 being positioned at described substrate 10 surface, it is positioned at first insulation material layer 112 on described hearth electrode 114 surface, and is positioned at the top electrode 115 on described first insulation material layer 112 surface; Being positioned at second insulation material layer 12 on described substrate 10 and described Josephson junction 11 surface, be formed with opening in described second insulation material layer 12, described opening exposes the top electrode 115 of described Josephson junction 11; Being positioned at the wiring layer 14 of described second insulation material layer 12 surface and described opening, the described wiring layer 14 being positioned at described opening contacts with described top electrode 115 to form described conductive through hole described top electrode 115 electricity to be drawn.
But, the stress of the Josephson junction in existing superconducting circuit structure is difficult to control to, and has bigger stress, and bigger stress exists easily caused by Josephson's junction leakage, and then affects performance and the stability thereof of superconducting circuit structure.
Summary of the invention
The shortcoming of prior art in view of the above, it is an object of the invention to provide a kind of superconducting circuit structure and preparation method thereof, for solve prior art causes owing to the Josephson junction in superconducting circuit structure has bigger stress easily caused by Josephson's junction leakage, and then affect the performance of superconducting circuit structure and the problem of stability thereof.
For achieving the above object and other relevant purposes, the preparation method that the present invention provides a kind of superconducting circuit structure, the preparation method of described superconducting circuit structure at least comprises the following steps:
1) provide substrate, form stress pattern structure, the size being sized larger than the follow-up Josephson junction to be formed of described stress pattern structure at described substrate surface corresponding to the follow-up position forming Josephson junction;
2) sequentially form the three-layer thin-film structure of the first superconducting material, the first insulation material layer and the second superconducting material at described substrate surface, described three-layer thin-film structure is coated with described stress pattern structure;
3) described three-layer thin-film structure is etched to form hearth electrode and Josephson junction;
4) in step 3) body structure surface that obtains forms the second insulation material layer, and form the first opening at described second insulation material layer corresponding to the position of described Josephson junction, described first opening exposes described Josephson junction;
5) deposition the 3rd superconducting material, and etch described 3rd superconducting material formation wiring layer.
As a kind of preferred version of preparation method of the superconducting circuit structure of the present invention, described step 1) in, etching removes the described substrate of part, to form described stress pattern structure at described substrate surface.
A kind of preferred version of preparation method as the superconducting circuit structure of the present invention, described step 1) in, form the 3rd insulation material layer at described substrate surface, and etch described 3rd insulation material layer, to form described stress pattern structure at described substrate surface.
As a kind of preferred version of preparation method of the superconducting circuit structure of the present invention, described step 1) in, form metal level at described substrate surface, and etch described metal level, to form described stress pattern structure at described substrate surface.
A kind of preferred version of preparation method as the superconducting circuit structure of the present invention, described step 1) in, etching described metal level, concurrently form described stress pattern structure and bypass resistance at described substrate surface, described bypass resistance and described stress pattern structure are separated by certain spacing.
A kind of preferred version of preparation method as the superconducting circuit structure of the present invention, described step 1) in, after described substrate surface forms described stress pattern structure, being additionally included in described stress pattern body structure surface and around form the step of the 4th insulation material layer, described 4th insulation material layer is coated with described stress pattern structure.
As a kind of preferred version of preparation method of the superconducting circuit structure of the present invention, described step 3) comprise the following steps:
31) described second superconducting material is etched to form described Josephson junction;
32) described first insulation material layer and described first superconducting material it are sequentially etched to form described hearth electrode.
As a kind of preferred version of preparation method of the superconducting circuit structure of the present invention, described step 3) comprise the following steps:
31) described second superconducting material, described first insulation material layer and described first superconducting material it are sequentially etched to form described hearth electrode;
32) continue to etch described second superconducting material to form described Josephson junction.
As a kind of preferred version of preparation method of the superconducting circuit structure of the present invention, described step 4) and described step 5) between also include deposition bypass resistance material layer, and etch described bypass resistance material layer to form the step of bypass resistance.
A kind of preferred version of preparation method as the superconducting circuit structure of the present invention, after forming described bypass resistance, also include deposition the 5th insulation material layer, and forming the second opening at described 5th insulation material layer corresponding to the position of described bypass resistance, described second opening exposes described bypass resistance.
The present invention also provides for a kind of superconducting circuit structure, and described superconducting circuit structure includes:
Substrate;
Stress pattern structure, is positioned at described substrate surface;
Josephson junction, described Josephson junction includes hearth electrode, the first insulation material layer and top electrode, described hearth electrode is positioned at top and the both sides of described stress pattern structure, described first insulation material layer is positioned at described hearth electrode surface, described top electrode is positioned at the described first insulation material layer surface of the top of described stress pattern structure and the size being smaller in size than described stress pattern structure of described top electrode.
As a kind of preferred version of the superconducting circuit structure of the present invention, described stress pattern structure is monolayer, bilayer or multi-lager semiconductor material layer, insulation material layer or metal material layer.
A kind of preferred version as the superconducting circuit structure of the present invention, when the material of described stress pattern structure is monolayer, bilayer or multiple layer metal material layer or semiconductor material layer, described superconducting circuit structure also includes the first dielectric isolation layer, and described first dielectric isolation layer is coated with described stress pattern structure.
As a kind of preferred version of the superconducting circuit structure of the present invention, described superconducting circuit structure also includes:
Second insulation material layer, is covered in described substrate and described first insulation material layer surface, and described second insulation material layer is provided with the first opening corresponding to the position of described top electrode, and described first opening exposes described top electrode;
Wiring layer, is positioned at described second insulation material layer surface and described first opening, and contacts with described top electrode.
As a kind of preferred version of the superconducting circuit structure of the present invention, described superconducting circuit structure also includes bypass resistance, and described bypass resistance is between described hearth electrode and described substrate, and is separated by certain spacing with described stress pattern structure.
A kind of preferred version as the superconducting circuit structure of the present invention, described superconducting circuit structure also includes bypass resistance, described bypass resistance is positioned at described first insulation material layer surface or the first superconducting material surface of described substrate side, and is separated by certain spacing with described stress pattern structure; The upper surface of described bypass resistance contacts with described wiring layer.
A kind of preferred version as the superconducting circuit structure of the present invention, described superconducting circuit structure also includes the second dielectric isolation layer, described second dielectric isolation layer is positioned at the surface of described bypass resistance, and described second dielectric isolation layer is provided with the second opening corresponding to the position contacted with described wiring layer, described second opening exposes described bypass resistance.
As it has been described above, superconducting circuit structure of the present invention and preparation method thereof, have the advantages that
Superconducting circuit structure of the present invention and preparation method thereof forms, by the substrate surface below Josephson junction, the stress pattern structure that size is bigger than Josephson junction size, be conducive to effective release of stress in Josephson junction, it is finally reached the effect reducing stress, thus solving Josephson's junction leakage that stress causes, improve performance and the stability thereof of superconducting circuit structure.
Accompanying drawing explanation
Fig. 1 is shown as the structural representation of Josephson junction of the prior art.
Fig. 2 is shown as the fragmentary top TV structure schematic diagram of superconducting circuit structure of the prior art.
Fig. 3 is shown as partial cross section's structural representation of superconducting circuit structure of the prior art.
Fig. 4 is shown as the preparation flow schematic diagram of the superconducting circuit structure of the present invention.
Fig. 5 to Figure 12 is shown as the cross section structure schematic diagram that each step of preparation method of the superconducting circuit structure of the present invention presents.
Figure 13 is shown as the fragmentary top TV structure schematic diagram of the superconducting circuit structure of the present invention.
Element numbers explanation
10 substrates
11 Josephson junctions
111 first superconducting material
112 first insulation material layers
113 second superconducting material
114 hearth electrodes
115 top electrodes
12 second insulation material layers
13 conductive through holes
14 wiring layers
20 substrates
21 stress pattern structures
22 Josephson junctions
221 first superconducting material
222 first insulation material layers
223 second superconducting material
224 hearth electrodes
225 top electrodes
23 second insulation material layers
24 first openings
25 wiring layers
S1��S5 step
Detailed description of the invention
Below by way of specific instantiation, embodiments of the present invention being described, those skilled in the art the content disclosed by this specification can understand other advantages and effect of the present invention easily. The present invention can also be carried out by additionally different detailed description of the invention or apply, and the every details in this specification based on different viewpoints and application, can also carry out various modification or change under the spirit without departing from the present invention.
Refer to Fig. 4��Figure 13. It should be noted that, the diagram provided in the present embodiment only illustrates the basic conception of the present invention in a schematic way, though only display component count with relevant assembly in the present invention but not when implementing according to reality, shape and size drafting in diagram, during its actual enforcement, the kenel of each assembly, quantity and ratio can be a kind of random change, and its assembly layout kenel is likely to increasingly complex.
Embodiment one
Refer to Fig. 4, the preparation method that the present invention provides a kind of superconducting circuit structure, the preparation method of described superconducting circuit structure at least comprises the following steps:
1) provide substrate, form stress pattern structure, the size being sized larger than the follow-up Josephson junction to be formed of described stress pattern structure at described substrate surface corresponding to the follow-up position forming Josephson junction;
2) sequentially form the three-layer thin-film structure of the first superconducting material, the first insulation material layer and the second superconducting material at described substrate surface, described three-layer thin-film structure is coated with described stress pattern structure;
3) described three-layer thin-film structure is etched to form hearth electrode and Josephson junction;
4) in step 3) body structure surface that obtains forms the second insulation material layer, and form the first opening at described second insulation material layer corresponding to the position of described Josephson junction, described first opening exposes described Josephson junction;
5) deposition the 3rd superconducting material, and etch described 3rd superconducting material formation wiring layer.
In step 1) in, refer to the S1 step in Fig. 4 and Fig. 5, substrate 20 is provided, forms stress pattern structure 21, the size being sized larger than the follow-up Josephson junction to be formed of described stress pattern structure 21 on described substrate 20 surface corresponding to the follow-up position forming Josephson junction.
Exemplarily, the thickness of described substrate 20 can be but be not limited only to 0.2mm��0.8mm, and in the present embodiment, described substrate 20 can be the silicon dioxide on monocrystal silicon, and wherein monocrystalline silicon piece thickness is 0.625mm, silicon dioxide thickness 300nm above. The material of described substrate 20 is not limited to the material cited by the present embodiment, it is also possible to include but not limited to monocrystal silicon, sapphire, carborundum, magnesium oxide and Afluon (Asta) etc.
Exemplarily, the shape of described stress pattern structure 21 can set according to actual needs, in the present embodiment, with the shape of cross section of described stress pattern structure 21 for square exemplarily, but being not limited thereto, the shape of cross section of described stress pattern structure 21 can also be rectangle, circle, ellipse etc.
Exemplarily, the center of described stress pattern structure 21 is corresponding up and down with the center of the follow-up Josephson junction to be formed, and the size of described stress pattern structure 21 and area are all higher than size and the area of the follow-up Josephson junction to be formed. It should be noted that, from follow-up preparation process, the size of described Josephson junction is determined by the size being subsequently formed top electrode, therefore, the center of described stress pattern structure 21 is corresponding up and down with the center of the follow-up top electrode to be formed, and the size of described stress pattern structure 21 and area are all higher than size and the area of the follow-up top electrode to be formed.
In one example, the described substrate 20 of part is removed by etching, to form described stress pattern structure 21 on described substrate 20 surface.
In another example, first form one layer of the 3rd insulation material layer (not shown) on described substrate 20 surface, then pass through photoetching, etching technics described 3rd insulation material layer of etching, to form described stress pattern structure 21 on described substrate 20 surface.
In another example, first form layer of metal layer (not shown) on described substrate 20 surface, then pass through photoetching, the etching technics described metal level of etching, to form described stress pattern structure 21 on described substrate 20 surface. Described metal level can be superconducting metal layer or non-superconducting metal layer.
Exemplarily, when described stress pattern structure 21 for formed by etching sheet metal structure time, after described substrate 20 surface forms described stress pattern structure, being additionally included in described stress pattern structure 21 surface and around form the step of the 4th insulation material layer (not shown), described 4th insulation material layer is coated with described stress pattern structure 21.
In step 2) in, refer to the S2 step in Fig. 4 and Fig. 6, sequentially form the three-layer thin-film structure of first superconducting material the 221, first insulation material layer 222 and the second superconducting material 223 on described substrate 20 surface, described three-layer thin-film structure is coated with described stress pattern structure 21.
Exemplarily, described first superconducting material 221 is subsequently used for forming hearth electrode, described second superconducting material 223 is subsequently used for forming top electrode, superconducting tunnel junction is constituted with described first insulation material layer 222, the thickness of described first superconducting material 221 can be 50nm��200nm, the thickness of described first insulation material layer 222 can be 1nm��15nm, the thickness of described second superconducting material 223 can be 50nm��200nm, the material of described first superconducting material 221 and described second superconducting material 223 includes but not limited to niobium or niobium nitride, the material of described first insulation material layer 222 includes but not limited to aluminium oxide or aluminium nitride. in the present embodiment, the thickness of described first superconducting material 221 and described second superconducting material 223 is 150nm, and material is niobium (niobium, Nb), the thickness of described first insulation material layer 222 is 10nm, and material is aluminium oxide. prepared by the method that described three-layer thin-film structure passes sequentially through magnetron sputtering.
In step 3) in, refer to the S3 step in Fig. 4 and Fig. 7 to Figure 10, etch described three-layer thin-film structure to form hearth electrode 224 and Josephson junction 22.
In one example, described step 3) comprise the following steps:
31) described second superconducting material 223 is etched to form described Josephson junction 22; Concrete, first pass through photoetching process and define the figure of top electrode 225, then pass through etching technics and etch described second superconducting material 223 to form described top electrode 225, described top electrode 225 constitutes Josephson junction 22 with described first insulation material layer 222 and described first superconducting material 221, as shown in Figure 7;
32) described first insulation material layer 222 and described first superconducting material 221 it are sequentially etched to form described hearth electrode 224; Concrete, first pass through photoetching process and define the figure of described hearth electrode 224, then pass through etching technics and be sequentially etched described first insulation material layer 222 and described first superconducting material 221 to form described hearth electrode 224, as shown in Figure 8.
In another example, described step 3) comprise the following steps:
31) described second superconducting material 223, described first insulation material layer 222 and described first superconducting material 221 it are sequentially etched to form described hearth electrode 224; Concrete, first pass through photoetching process and define the figure of described hearth electrode 224, then pass through etching technics and be sequentially etched described second superconducting material 223, described first insulation material layer 222 and described first superconducting material 221 to form described hearth electrode 224, as shown in Figure 9;
32) continue to etch described second superconducting material 223 to form described Josephson junction 22; Concrete, first pass through photoetching process and define the figure of top electrode 225, then pass through etching technics and etch described second superconducting material 223 to form described top electrode 225, described top electrode 225 constitutes Josephson junction 22 with described first insulation material layer 222 and described hearth electrode 224, as shown in Figure 10.
In step 4) in, refer to the S4 step in Fig. 4 and Figure 11, in step 3) body structure surface that obtains forms the second insulation material layer 23, and forming the first opening 24 in the position that described second insulation material layer 23 corresponds to described Josephson junction 22, described first opening 24 exposes described Josephson junction 22.
Exemplarily, it is possible to using plasma strengthens the methods such as chemical vapour deposition technique PECVD, chemical vapour deposition technique or reactive evaporation in step 3) body structure surface obtained forms the second insulation material layer 23.
Exemplarily, the position corresponding to described Josephson junction 22 by lithographic etch process at described second insulation material layer 23 forms described first opening 24; Concrete, first pass through photoetching process and define position and the figure of described first opening 24, then pass through etching technics and etch described second insulation material layer 23 to form described first opening 24.
Exemplarily, it is also possible to adopt lift-off method to be formed over described first opening 24 at described Josephson junction 22.
Exemplarily, described step 4) after, also include deposition bypass resistance material layer (not shown), and etch described bypass resistance material layer to form the step of bypass resistance (not shown). Described bypass resistance is positioned at described first insulation material layer 222 of described substrate 20 side or described first superconducting material 221 surface, and is separated by certain spacing with described stress pattern structure 21.
Exemplarily, after forming described bypass resistance, also include deposition the 5th insulation material layer (not shown), and forming the step of the second opening (not shown) at described 5th insulation material layer corresponding to the position of described bypass resistance, described second opening exposes described bypass resistance.
In step 5) in, refer to the S5 step in Fig. 4 and Figure 12 to Figure 13, Figure 12 is the cross section structure schematic diagram that this step presents, Figure 13 is the plan structure schematic diagram of the structure that this step obtains, deposit the 3rd superconducting material (not shown), and etch described 3rd superconducting material formation wiring layer 25.
Exemplarily, the thickness of described 3rd superconducting material can be 300��500nm, and in the present embodiment, the material of described 3rd superconducting material is niobium, and its thickness is 400nm. Described wiring layer 5 is positioned at the surface of the described top electrode 225 of the surface of described second insulation material layer 23, described first opening 24 and the surface of described bypass resistance, is suitable to draw described top electrode 225 and described bypass resistance electricity.
It should be noted that in actual process, each structure in Figure 13 is opaque structure, for the ease of showing each structure and position relationship between, Figure 13 is deliberately shown with transparent configuration.
Embodiment two
In the present embodiment, the preparation method also providing for a kind of superconducting circuit structure, the preparation method of the superconducting circuit structure in the present embodiment is roughly the same with the preparation method of the superconducting circuit structure described in embodiment one, the two is distinctive in that: in embodiment one, in step 4) after, form bypass resistance on described first insulation material layer 222 surface of described substrate 20 side; And in the present embodiment, in step 1) in, while forming described stress pattern 21, form bypass resistance on described substrate 20 surface, described bypass resistance is between described hearth electrode 224 and described substrate 20, and is separated by certain spacing with described stress pattern structure 21.
Embodiment three
Please continue to refer to Figure 12 and Figure 13, the present invention also provides for a kind of superconducting circuit structure, and described superconducting circuit structure preparation method described in embodiment one or embodiment two is prepared and obtained, and described superconducting circuit structure includes: substrate 20; Stress pattern structure 21, described stress pattern structure 21 is positioned at described substrate 20 surface; Josephson junction 22, described Josephson junction 22 includes hearth electrode the 224, first insulation material layer 222 and top electrode 225, described hearth electrode 224 is positioned at top and the both sides of described stress pattern structure 21, described first insulation material layer 222 is positioned at described hearth electrode 224 surface, described top electrode 225 is positioned at described first insulation material layer 222 surface of the top of described stress pattern structure 21 and the size being smaller in size than described stress pattern structure 21 of described top electrode 225.
Exemplarily, the shape of described stress pattern structure 21 and described top electrode 225 can set according to actual needs, in the present embodiment, with the shape of cross section of described stress pattern structure 21 and described top electrode 225 for square exemplarily, but being not limited thereto, the shape of cross section of described stress pattern structure 21 and described top electrode 225 can also be rectangle, circle, ellipse etc.
Exemplarily, the center of described top electrode 225 is corresponding up and down with the center of described stress pattern structure 21, and the size of described top electrode 225 and area are less than the size of described stress pattern structure 21 and area.
Exemplarily, the material of described stress pattern structure 21 is monolayer, bilayer or multi-lager semiconductor material layer, insulation material layer or metal material layer.
Exemplarily, when described stress pattern structure 21 is monolayer, bilayer or multiple layer metal material layer or semiconductor material layer, described superconducting circuit structure also includes the first dielectric isolation layer (not shown), and described first dielectric isolation layer is coated with described stress pattern structure 21. The 4th insulation material layer described in described first dielectric isolation layer i.e. corresponding embodiment one or embodiment two.
Exemplarily, described superconducting circuit structure also includes: the second insulation material layer 23, described second insulation material layer 23 is covered in described substrate 20 and described first insulation material layer 222 surface, described second insulation material layer 23 is provided with the first opening 24 corresponding to the position of described top electrode 225, and described first opening 24 exposes described top electrode 225; Wiring layer 25, described wiring layer 25 is positioned at described second insulation material layer 23 surface and described first opening 24, and contacts with described top electrode 225.
In one example, described superconducting circuit structure also includes bypass resistance (not shown), and described bypass resistance is between described hearth electrode 224 and described substrate 20, and is separated by certain spacing with described stress pattern structure 21.
In another example, described superconducting circuit structure also includes bypass resistance (not shown), described bypass resistance is positioned at described first insulation material layer 222 surface or the first superconducting material surface of described substrate 20 side, and is separated by certain spacing with described stress pattern structure 21; The upper surface of described bypass resistance contacts with described wiring layer 25.
Exemplarily, described superconducting circuit structure also includes the second dielectric isolation layer (not shown), described second dielectric isolation layer is positioned at the surface of described bypass resistance, and described second dielectric isolation layer is provided with the second opening (not shown) corresponding to the position contacted with described wiring layer 25, described second opening exposes described bypass resistance. Described second dielectric isolation layer is the 5th insulation material layer described in embodiment one or embodiment two.
In sum, the present invention provides a kind of superconducting circuit structure and preparation method thereof, the preparation method of described superconducting circuit structure at least comprises the following steps: 1) provide substrate, stress pattern structure, the size being sized larger than the follow-up Josephson junction to be formed of described stress pattern structure is formed corresponding to the follow-up position forming Josephson junction at described substrate surface; 2) sequentially form the three-layer thin-film structure of the first superconducting material, the first insulation material layer and the second superconducting material at described substrate surface, described three-layer thin-film structure is coated with described stress pattern structure; 3) described three-layer thin-film structure is etched to form hearth electrode and Josephson junction; 4) in step 3) body structure surface that obtains forms the second insulation material layer, and form the first opening at described second insulation material layer corresponding to the position of described Josephson junction, described first opening exposes described Josephson junction; 5) deposition the 3rd superconducting material, and etch described 3rd superconducting material formation wiring layer. Superconducting circuit structure of the present invention and preparation method thereof forms, by the substrate surface below Josephson junction, the stress pattern structure that size is bigger than Josephson junction size, be conducive to effective release of stress in Josephson junction, it is finally reached the effect reducing stress, thus solving Josephson's junction leakage that stress causes, improve performance and the stability thereof of superconducting circuit structure.
Above-described embodiment is illustrative principles of the invention and effect thereof only, not for the restriction present invention. Above-described embodiment all under the spirit and category of the present invention, can be modified or change by any those skilled in the art. Therefore, art has usually intellectual such as modifying without departing from all equivalences completed under disclosed spirit and technological thought or change, must be contained by the claim of the present invention.
Claims (17)
1. the preparation method of a superconducting circuit structure, it is characterised in that the preparation method of described superconducting circuit structure comprises the following steps:
1) provide substrate, form stress pattern structure, the size being sized larger than the follow-up Josephson junction to be formed of described stress pattern structure at described substrate surface corresponding to the follow-up position forming Josephson junction;
2) sequentially form the three-layer thin-film structure of the first superconducting material, the first insulation material layer and the second superconducting material at described substrate surface, described three-layer thin-film structure is coated with described stress pattern structure;
3) described three-layer thin-film structure is etched to form hearth electrode and Josephson junction;
4) in step 3) body structure surface that obtains forms the second insulation material layer, and form the first opening at described second insulation material layer corresponding to the position of described Josephson junction, described first opening exposes described Josephson junction;
5) deposition the 3rd superconducting material, and etch described 3rd superconducting material formation wiring layer.
2. the preparation method of superconducting circuit structure according to claim 1, it is characterised in that: described step 1) in, etching removes the described substrate of part, to form described stress pattern structure at described substrate surface.
3. the preparation method of superconducting circuit structure according to claim 1, it is characterized in that: described step 1) in, form the 3rd insulation material layer at described substrate surface, and etch described 3rd insulation material layer, to form described stress pattern structure at described substrate surface.
4. the preparation method of superconducting circuit structure according to claim 1, it is characterised in that: described step 1) in, form metal level at described substrate surface, and etch described metal level, to form described stress pattern structure at described substrate surface.
5. the preparation method of superconducting circuit structure according to claim 4, it is characterized in that: described step 1) in, etch described metal level, concurrently form described stress pattern structure and bypass resistance at described substrate surface, described bypass resistance and described stress pattern structure are separated by certain spacing.
6. the preparation method of superconducting circuit structure according to claim 4, it is characterized in that: described step 1) in, after described substrate surface forms described stress pattern structure, being additionally included in described stress pattern body structure surface and around form the step of the 4th insulation material layer, described 4th insulation material layer is coated with described stress pattern structure.
7. the preparation method of superconducting circuit structure according to claim 1, it is characterised in that: described step 3) comprise the following steps:
31) described second superconducting material is etched to form described Josephson junction;
32) described first insulation material layer and described first superconducting material it are sequentially etched to form described hearth electrode.
8. the preparation method of superconducting circuit structure according to claim 1, it is characterised in that: described step 3) comprise the following steps:
31) described second superconducting material, described first insulation material layer and described first superconducting material it are sequentially etched to form described hearth electrode;
32) continue to etch described second superconducting material to form described Josephson junction.
9. the preparation method of the superconducting circuit structure according to claim 1,2,3,4,6,7 or 8, it is characterized in that: described step 4) and described step 5) between also include deposition bypass resistance material layer, and etch described bypass resistance material layer to form the step of bypass resistance.
10. the preparation method of superconducting circuit structure according to claim 9, it is characterized in that: after forming described bypass resistance, also include deposition the 5th insulation material layer, and forming the second opening at described 5th insulation material layer corresponding to the position of described bypass resistance, described second opening exposes described bypass resistance.
11. a superconducting circuit structure, it is characterised in that described superconducting circuit structure includes:
Substrate;
Stress pattern structure, is positioned at described substrate surface;
Josephson junction, described Josephson junction includes hearth electrode, the first insulation material layer and top electrode, described hearth electrode is positioned at top and the both sides of described stress pattern structure, described first insulation material layer is positioned at described hearth electrode surface, described top electrode is positioned at the described first insulation material layer surface of the top of described stress pattern structure and the size being smaller in size than described stress pattern structure of described top electrode.
12. superconducting circuit structure according to claim 11, it is characterised in that: described stress pattern structure is monolayer, bilayer or multi-lager semiconductor material layer, insulation material layer or metal material layer.
13. superconducting circuit structure according to claim 12, it is characterized in that: when the material of described stress pattern structure is monolayer, bilayer or multiple layer metal material layer or semiconductor material layer, described superconducting circuit structure also includes the first dielectric isolation layer, and described first dielectric isolation layer is coated with described stress pattern structure.
14. superconducting circuit structure according to claim 11, it is characterised in that: described superconducting circuit structure also includes:
Second insulation material layer, is covered in described substrate and described first insulation material layer surface, and described second insulation material layer is provided with the first opening corresponding to the position of described top electrode, and described first opening exposes described top electrode;
Wiring layer, is positioned at described second insulation material layer surface and described first opening, and contacts with described top electrode.
15. superconducting circuit structure according to claim 14, it is characterised in that: described superconducting circuit structure also includes bypass resistance, and described bypass resistance is between described hearth electrode and described substrate, and is separated by certain spacing with described stress pattern structure.
16. superconducting circuit structure according to claim 14, it is characterized in that: described superconducting circuit structure also includes bypass resistance, described bypass resistance is positioned at described first insulation material layer of described substrate side or described first superconducting material surface, and is separated by certain spacing with described stress pattern structure; The upper surface of described bypass resistance contacts with described wiring layer.
17. superconducting circuit structure according to claim 16, it is characterized in that: described superconducting circuit structure also includes the second dielectric isolation layer, described second dielectric isolation layer is positioned at the surface of described bypass resistance, and described second dielectric isolation layer is provided with the second opening corresponding to the position contacted with described wiring layer, described second opening exposes described bypass resistance.
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