CN105633268B - A kind of superconducting circuit structure and preparation method thereof - Google Patents
A kind of superconducting circuit structure and preparation method thereof Download PDFInfo
- Publication number
- CN105633268B CN105633268B CN201511028259.8A CN201511028259A CN105633268B CN 105633268 B CN105633268 B CN 105633268B CN 201511028259 A CN201511028259 A CN 201511028259A CN 105633268 B CN105633268 B CN 105633268B
- Authority
- CN
- China
- Prior art keywords
- layer
- superconducting
- circuit structure
- material layer
- insulation material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0912—Manufacture or treatment of Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/10—Junction-based devices
- H10N60/12—Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
- H10N60/805—Constructional details for Josephson-effect devices
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Abstract
The present invention provides a kind of superconducting circuit structure and preparation method thereof, comprising: 1) provides substrate, correspond to the subsequent position that form Josephson junction in substrate surface and form stress pattern structure, the size of stress pattern structure is greater than the size of Josephson junction；2) the three-layer thin-film structure of the first superconducting material, the first insulation material layer and the second superconducting material is sequentially formed in substrate surface；3) three-layer thin-film structure is etched to form hearth electrode and Josephson junction；4) the second insulation material layer is formed in the body structure surface that step 3) obtains, and forms the first opening in the position that the second insulation material layer corresponds to Josephson junction；5) third superconducting material is deposited, and etches third superconducting material and forms wiring layer.By forming the size stress pattern structure bigger than Josephson junction size below Josephson junction, is conducive to being released effectively for stress in Josephson junction, to solve leakage current, improves the performance and stability of superconducting circuit structure.
Description
Technical field
The present invention relates to superconducting circuit design fields, more particularly to a kind of superconducting circuit structure and its preparation side
Method.
Background technique
Superconducting circuit structure includes superconducting quantum interference device (SQUID), and the application such as single flux quantum device (SFQ) superconduction is about
The circuit of Se Fusen knot.
Superconducting quantum interference device (superconducting quantum interference device, SQUID) is
Superconducting Quantum device based on Josephson effect and flux quautization principle, its basic structure is that two are inserted into superconducting ring
A Josephson junction, SQUID are the most sensitive magnetic flux detection sensors being currently known, and the magnetic flux of typical SQUID device is made an uproar
Sound is in μ Φ0/Hz1/2Magnitude (1 Φ0=2.07 × 10-15Wb), magnetic noise is in fT/Hz1/2Magnitude (1fT=1 × 10-15T),
Since it is with high sensitivity, can be widely applied to medicine heart magnetic brain magnetic, materials detection, earth magnetic field, military affairs, earthquake and
The various aspects such as archaeology can be engaged in basic research with its magnetic flux microscope prepared.
Single flux quantum device (Single Flux Quantum, SFQ) is to utilize the single magnetic flux in Josephson junction
Son indicates the superconducting circuit technology of logical one He " 0 ".Superconducting digital circuits clock frequency based on this is reachable
770GHz can be used for the ultra wide band D and D/A converter of radar and communication system, broadband network exchanger, radio astronomy
Digital autocorrelator and superconducting computer etc..Because it has many advantages, such as that speed is fast, low in energy consumption, the U.S. and Japan are thrown at present
Enter huge fund and carries out strategic research.
In quantum-mechanical concept, when two blocks of metals are separated by one layer of thin insulator, there can be electricity between metal
Stream passes through, and the lamination of this " metal-insulator-metal " is usually called tunnel knot, the electric current flowed between them is known as
Tunnel current.If one or two metals are superconductors in this lamination sandwich structure, then referred to as superconducting tunnel
Knot.According to Josephson effect, in superconducting tunnel junction, insulating layer have superconductor properties, but with conventional superconductor
Compared to having weaker superconductivity, referred to as " weakly-coupled superconductor ".
It is as shown in Figure 1 the structural schematic diagram of Josephson junction (Josephson Junction) 11, including the first superconduction
Material layer 111, the second superconducting material 113 and between first superconducting material 111 and second superconducting material
The first insulation material layer 112 between 113, wherein the very thin thickness of first insulation material layer 112, usually several to more than ten
The thickness of nanometer.
Superconducting circuit structure is generally collocated with each other by Josephson junction 11 and some resistance, inductance etc. and is formed, have three layers or
The insulation material layer of the above superconducting material and two layers or more.Partial structure diagram such as Fig. 2 of existing superconducting circuit structure
To shown in Fig. 3, wherein Fig. 2 is the local overlooking structural schematic diagram of superconducting circuit structure, and the cross section structure that Fig. 3 is Fig. 2 is illustrated
Figure；By Fig. 2 to Fig. 3 it is found that the Josephson junction 11 is connect by wiring layer 14 and conductive through hole 13 with devices such as inductance.Cause
For fusion Superconductor Physics and microelectric technique, the design of superconducting circuit is complex, needs to consider shadow caused by small variable
It rings, including the matching of inductance size, resistance size and resistance value, the thickness of every layer film, the electricity as caused by metal-insulator metal
Hold etc..In the performance of Josephson junction that is made of superconducting insulation superconduction it is very crucial, if technology controlling and process is bad, be easier to out
Existing leakage current.Leakage current is typically derived from interlayer and side.The leakage current of side can be solved by the covering of insulating layer.Layer
Between leakage current then derive from the hole of insulating layer, compactness and stress in Josephson junction.Its hole and compactness can lead to
The sedimentary condition of insulating layer is overregulated to solve.And stress part is always the direction that scientific research personnel makes great efforts.Most of scientific research people
In terms of the focus of work is placed on the stress for how reducing film itself by member.
Typical superconductive device the preparation method is as follows: preparing superconductor-insulation material layer-superconductor on substrate first
The three-layer thin-film of structure；Then, hearth electrode is etched on trilamellar membrane；Then, it is prepared in the design position of Josephson junction
Josephson junction；Then SiO or SiO is deposited on device surface2Insulation material layer simultaneously prepares hole on insulation material layer
In case the deposition of next step superconducting thin film, or with lift-off method in Josephson junction hole out prepared above；It is redeposited
The bypass resistance of Josephson junction in SQUID device；Finally, depositing wiring layer and carrying out etching technics, to draw Joseph
The top electrode of gloomy knot.When preparing Josephson junction or application drilling technology using stripping technology (lift-off), bottom is first done
Electrode re-defines interface, usually does inter-layer passages connection with biggish Josephson junction because biggish knot possess it is biggish
Critical current.It is as shown in Figures 2 and 3 respectively the overlooking structure diagram of the single channel superconduction connection structure of above method preparation
And cross section structure schematic diagram, the superconducting circuit structure include: substrate 10；Josephson junction positioned at 10 surface of substrate
11, the Josephson junction 11 includes the hearth electrode 114 positioned at 10 surface of substrate, positioned at 114 surface of hearth electrode
First insulation material layer 112, and the top electrode 115 positioned at 112 surface of the first insulation material layer；Positioned at the substrate 10 and
Second insulation material layer 12 on 11 surface of Josephson junction is formed with opening in second insulation material layer 12, described
Opening exposes the top electrode 115 of the Josephson junction 11；Positioned at 12 surface of the second insulation material layer and the opening
Interior wiring layer 14, the wiring layer 14 in the opening are in contact with the top electrode 115 to form the conduction
Through-hole is to draw 115 electricity of top electrode.
However, the stress of the Josephson junction in existing superconducting circuit structure is difficult to control, there is biggish stress, compared with
There is the performance and its stability for easily causing Josephson's junction leakage, and then influencing superconducting circuit structure in big stress.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of superconducting circuit structure and its systems
Preparation Method, for solving caused by there is biggish stress due to the Josephson junction in superconducting circuit structure in the prior art
The problem of easily causing Josephson's junction leakage, and then influencing the performance and its stability of superconducting circuit structure.
In order to achieve the above objects and other related objects, the present invention provides a kind of preparation method of superconducting circuit structure, institute
The preparation method for stating superconducting circuit structure at least includes the following steps:
1) substrate is provided, corresponds to the subsequent position that form Josephson junction in the substrate surface and forms stress pattern
Structure, the size of the stress pattern structure are greater than the size of subsequent Josephson junction to be formed；
2) the first superconducting material, the first insulation material layer and the second superconducting material are sequentially formed in the substrate surface
Three-layer thin-film structure, the three-layer thin-film structure coats the stress pattern structure；
3) the three-layer thin-film structure is etched to form hearth electrode and Josephson junction；
4) the second insulation material layer is formed in the body structure surface that step 3) obtains, and corresponding in second insulation material layer
The first opening is formed in the position of the Josephson junction, first opening exposes the Josephson junction；
5) third superconducting material is deposited, and etches the third superconducting material and forms wiring layer.
A kind of preferred embodiment of preparation method as superconducting circuit structure of the invention, in the step 1), etching is gone
Except the part substrate, to form the stress pattern structure in the substrate surface.
A kind of preferred embodiment of preparation method as superconducting circuit structure of the invention, in the step 1), described
Substrate surface forms third insulation material layer, and etches the third insulation material layer, described to be formed in the substrate surface
Stress pattern structure.
A kind of preferred embodiment of preparation method as superconducting circuit structure of the invention, in the step 1), described
Substrate surface forms metal layer, and etches the metal layer, to form the stress pattern structure in the substrate surface.
A kind of preferred embodiment of preparation method as superconducting circuit structure of the invention in the step 1), etches institute
State metal layer, be formed simultaneously the stress pattern structure and bypass resistance in the substrate surface, the bypass resistance with it is described
Stress pattern structure is separated by certain spacing.
A kind of preferred embodiment of preparation method as superconducting circuit structure of the invention, in the step 1), described
Substrate surface is formed after the stress pattern structure, further include the stress pattern body structure surface and around formed the 4th absolutely
The step of edge material layer, the 4th insulation material layer coat the stress pattern structure.
A kind of preferred embodiment of preparation method as superconducting circuit structure of the invention, the step 3) include following step
It is rapid:
31) second superconducting material is etched to form the Josephson junction；
32) first insulation material layer and first superconducting material are sequentially etched to form the hearth electrode.
A kind of preferred embodiment of preparation method as superconducting circuit structure of the invention, the step 3) include following step
It is rapid:
31) second superconducting material, first insulation material layer and first superconducting material are sequentially etched
To form the hearth electrode；
32) continue to etch second superconducting material to form the Josephson junction.
A kind of preferred embodiment of preparation method as superconducting circuit structure of the invention, the step 4) and the step
5) further include deposition bypass resistance material layer between, and etch the step of bypass resistance material layer is to form bypass resistance.
A kind of preferred embodiment of preparation method as superconducting circuit structure of the invention, formed the bypass resistance it
It afterwards, further include the 5th insulation material layer of deposition, and correspond to the position shape of the bypass resistance in the 5th insulation material layer
At the second opening, second opening exposes the bypass resistance.
The present invention also provides a kind of superconducting circuit structure, the superconducting circuit structure includes:
Substrate；
Stress pattern structure is located at the substrate surface；
Josephson junction, the Josephson junction include hearth electrode, the first insulation material layer and top electrode, the hearth electrode
Positioned at the top and two sides of the stress pattern structure, first insulation material layer is located at the hearth electrode surface, the top
Electrode is located at the first insulating materials layer surface of the top of the stress pattern structure, and the size of the top electrode is less than
The size of the stress pattern structure.
As a kind of preferred embodiment of superconducting circuit structure of the invention, the stress pattern structure be single layer, bilayer or
Multi-lager semiconductor material layer, insulation material layer or metal material layer.
As a kind of preferred embodiment of superconducting circuit structure of the invention, the material of the stress pattern structure be single layer,
When bilayer or multilayer metal material layer or semiconductor material layer, the superconducting circuit structure further includes the first dielectric isolation layer, institute
It states the first dielectric isolation layer and coats the stress pattern structure.
As a kind of preferred embodiment of superconducting circuit structure of the invention, the superconducting circuit structure further include:
Second insulation material layer is covered in the substrate and the first insulating materials layer surface, second insulation material
The position that the bed of material corresponds to the top electrode is equipped with the first opening, and first opening exposes the top electrode；
Wiring layer is located in the second insulating materials layer surface and first opening, and connects with the top electrode
Touching.
As a kind of preferred embodiment of superconducting circuit structure of the invention, the superconducting circuit structure further includes bypass electricity
Resistance, the bypass resistance between the hearth electrode and the substrate, and with the stress pattern structure be separated by it is certain between
Away from.
As a kind of preferred embodiment of superconducting circuit structure of the invention, the superconducting circuit structure further includes bypass electricity
Resistance, the bypass resistance are located at the first insulating materials layer surface or the first superconductor layer surface of the one side of substrate,
And it is separated by certain spacing with the stress pattern structure；The upper surface of the bypass resistance is in contact with the wiring layer.
As a kind of preferred embodiment of superconducting circuit structure of the invention, the superconducting circuit structure further includes the second insulation
Separation layer, second dielectric isolation layer are located at the surface of the bypass resistance, and second dielectric isolation layer correspond to
The position that the wiring layer is in contact is equipped with the second opening, and second opening exposes the bypass resistance.
As described above, superconducting circuit structure and preparation method thereof of the invention, has the advantages that
Superconducting circuit structure of the invention and preparation method thereof forms ruler by the substrate surface below Josephson junction
The very little stress pattern structure bigger than Josephson junction size is conducive to being released effectively for stress in Josephson junction, is finally reached
The effect for reducing stress improves the property of superconducting circuit structure to solve Josephson's junction leakage caused by stress
Energy and its stability.
Detailed description of the invention
Fig. 1 is shown as the structural schematic diagram of Josephson junction in the prior art.
Fig. 2 is shown as the local overlooking structural schematic diagram of superconducting circuit structure in the prior art.
Fig. 3 is shown as partial cross section's structural schematic diagram of superconducting circuit structure in the prior art.
Fig. 4 is shown as the preparation flow schematic diagram of superconducting circuit structure of the invention.
The cross section structure that each step of preparation method that Fig. 5 to Figure 12 is shown as superconducting circuit structure of the invention is presented shows
It is intended to.
Figure 13 is shown as the local overlooking structural schematic diagram of superconducting circuit structure of the invention.
Component label instructions
10 substrates
11 Josephson junctions
111 first superconducting materials
112 first insulation material layers
113 second superconducting materials
114 hearth electrodes
115 top electrodes
12 second insulation material layers
13 conductive through holes
14 wiring layers
20 substrates
21 stress pattern structures
22 Josephson junctions
221 first superconducting materials
222 first insulation material layers
223 second superconducting materials
224 hearth electrodes
225 top electrodes
23 second insulation material layers
24 first openings
25 wiring layers
S1~S5 step
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Please refer to Fig. 4~Figure 13.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, though only show in diagram with related component in the present invention rather than package count when according to actual implementation
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its
Assembly layout kenel may also be increasingly complex.
Embodiment one
Referring to Fig. 4, the present invention provides a kind of preparation method of superconducting circuit structure, the preparation of the superconducting circuit structure
Method at least includes the following steps:
1) substrate is provided, corresponds to the subsequent position that form Josephson junction in the substrate surface and forms stress pattern
Structure, the size of the stress pattern structure are greater than the size of subsequent Josephson junction to be formed；
2) the first superconducting material, the first insulation material layer and the second superconducting material are sequentially formed in the substrate surface
Three-layer thin-film structure, the three-layer thin-film structure coats the stress pattern structure；
3) the three-layer thin-film structure is etched to form hearth electrode and Josephson junction；
4) the second insulation material layer is formed in the body structure surface that step 3) obtains, and corresponding in second insulation material layer
The first opening is formed in the position of the Josephson junction, first opening exposes the Josephson junction；
5) third superconducting material is deposited, and etches the third superconducting material and forms wiring layer.
In step 1), S1 step and Fig. 5 in Fig. 4 are please referred to, substrate 20 is provided, corresponded on 20 surface of substrate
The subsequent position that form Josephson junction forms stress pattern structure 21, and the size of the stress pattern structure 21 is greater than subsequent
The size of Josephson junction to be formed.
As an example, the thickness of the substrate 20 can be but be not limited only to 0.2mm~0.8mm, and in the present embodiment, institute
Stating substrate 20 can be the silica on monocrystalline silicon, and wherein monocrystalline silicon piece is with a thickness of 0.625mm, silicon dioxide thickness above
300nm.The material of the substrate 20 is not limited to the present embodiment cited material, can also include but is not limited to monocrystalline silicon, indigo plant
Jewel, silicon carbide, magnesia and magnesium fluoride etc..
As an example, the shape of the stress pattern structure 21 can be set according to actual needs, in the present embodiment, with institute
The cross-sectional shape for stating stress pattern structure 21 is square as an example, but being not limited thereto, the stress pattern structure
21 cross-sectional shape can also be rectangle, circle, ellipse etc..
As an example, the center of the stress pattern structure 21 with it is right above and below the center of subsequent Josephson junction to be formed
It answers, and the size of the stress pattern structure 21 and area are all larger than the size and area of subsequent Josephson junction to be formed.
It should be noted that by subsequent preparation step it is found that the size of the Josephson junction is by being subsequently formed the size institute of top electrode
It determines, it is therefore, corresponding above and below the center of the stress pattern structure 21 and the center of subsequent top electrode to be formed, and described answer
The size and area of power patterning 21 are all larger than the size and area of subsequent top electrode to be formed.
In one example, the part substrate 20 is removed by etching, to form the stress on 20 surface of substrate
Patterning 21.
In another example, one layer of third insulation material layer (not shown) first is formed on 20 surface of substrate, then led to
Photoetching, the etching technics etching third insulation material layer are crossed, to form the stress pattern structure on 20 surface of substrate
21。
In another example, one layer of metal layer (not shown) first is formed on 20 surface of substrate, then passes through photoetching, quarter
Etching technique etches the metal layer, to form the stress pattern structure 21 on 20 surface of substrate.The metal layer can be with
For superconducting metal layer or non-superconducting metal layer.
As an example, when the stress pattern structure 21 is the structure formed by etching sheet metal, in the lining
20 surface of bottom is formed after the stress pattern structure, further include 21 surface of stress pattern structure and around formed the 4th
The step of insulation material layer (not shown), the 4th insulation material layer coat the stress pattern structure 21.
In step 2), S2 step and Fig. 6 in Fig. 4 are please referred to, sequentially forms the first superconduction on 20 surface of substrate
The three-layer thin-film structure of material layer 221, the first insulation material layer 222 and the second superconducting material 223, the three-layer thin-film structure
Coat the stress pattern structure 21.
As an example, first superconducting material 221 is subsequently used for forming hearth electrode, second superconducting material
223 are subsequently used for forming top electrode, constitute superconducting tunnel junction, first superconductor with first insulation material layer 222
The thickness of layer 221 can be 50nm~200nm, and the thickness of first insulation material layer 222 can be 1nm~15nm, described
The thickness of second superconducting material 223 can be 50nm~200nm, first superconducting material 221 and second superconduction
The material of material layer 223 includes but is not limited to niobium or niobium nitride, and the material of first insulation material layer 222 includes but is not limited to
Aluminium oxide or aluminium nitride.In the present embodiment, the thickness of first superconducting material 221 and second superconducting material 223
Degree is 150nm, and material is niobium (niobium, Nb)；First insulation material layer 222 with a thickness of 10nm, material is oxidation
Aluminium.The three-layer thin-film structure passes sequentially through the method preparation of magnetron sputtering.
In step 3), the S3 step and Fig. 7 to Figure 10 in Fig. 4 are please referred to, etches the three-layer thin-film structure to be formed
Hearth electrode 224 and Josephson junction 22.
In one example, the step 3) the following steps are included:
31) second superconducting material 223 is etched to form the Josephson junction 22；Specifically, first passing through photoetching
Technique defines the figure of top electrode 225, then etches second superconducting material 223 by etching technics with described in being formed
Top electrode 225, the top electrode 225 constitute about plucked instrument with first insulation material layer 222 and first superconducting material 221
The gloomy knot 22 of husband, as shown in Figure 7；
32) first insulation material layer 222 and first superconducting material 221 are sequentially etched to form the bottom electricity
Pole 224；Specifically, first passing through the figure that photoetching process defines the hearth electrode 224, then it is sequentially etched by etching technics
First insulation material layer 222 and first superconducting material 221 are to form the hearth electrode 224, as shown in Figure 8.
In another example, the step 3) the following steps are included:
31) second superconducting material 223, first insulation material layer 222 and first superconduction are sequentially etched
Material layer 221 is to form the hearth electrode 224；Specifically, the figure that photoetching process defines the hearth electrode 224 is first passed through,
Then second superconducting material 223, first insulation material layer 222 and described first are sequentially etched by etching technics
Superconducting material 221 is to form the hearth electrode 224, as shown in Figure 9；
32) continue to etch second superconducting material 223 to form the Josephson junction 22；Specifically, first passing through
Photoetching process defines the figure of top electrode 225, then etches second superconducting material 223 by etching technics to be formed
The top electrode 225, the top electrode 225 constitute Josephson with first insulation material layer 222 and the hearth electrode 224
Knot 22, as shown in Figure 10.
In step 4), S4 step and Figure 11 in Fig. 4 are please referred to, forms second absolutely in the body structure surface that step 3) obtains
Edge material layer 23, and the first opening is formed in the position that second insulation material layer 23 corresponds to the Josephson junction 22
24, first opening 24 exposes the Josephson junction 22.
As an example, chemical vapour deposition technique PECVD, chemical vapour deposition technique or resistance can be enhanced with using plasma
The methods of evaporation forms the second insulation material layer 23 in the body structure surface that step 3) obtains.
As an example, corresponding to the Josephson junction 22 in second insulation material layer 23 by lithographic etch process
Position formed it is described first opening 24；Specifically, first passing through position and figure that photoetching process defines first opening 24
Then shape etches second insulation material layer 23 by etching technics to form first opening 24.
As an example, first opening can also be formed above the Josephson junction 22 using lift-off method
24。
As an example, further including deposition bypass resistance material layer (not shown), and etch the side after the step 4)
The step of road resistance elements are to form bypass resistance (not shown).The bypass resistance is located at the described of 20 side of substrate
First insulation material layer 222 or 221 surface of the first superconducting material, and be separated by with the stress pattern structure 21 certain
Spacing.
It further include the 5th insulation material layer (not shown) of deposition, and in institute as an example, being formed after the bypass resistance
The step of the 5th insulation material layer forms the second opening (not shown) corresponding to the position of the bypass resistance is stated, described second opens
Mouth exposes the bypass resistance.
In step 5), the section knot that the S5 step and Figure 12 to Figure 13, Figure 12 in Fig. 4 are presented for the step is please referred to
Structure schematic diagram, Figure 13 are the overlooking structure diagram for the structure that the step obtains, and deposit third superconducting material (not shown), and
It etches the third superconducting material and forms wiring layer 25.
As an example, the thickness of the third superconducting material can be 300~500nm, in the present embodiment, described the
The material of three superconducting materials is niobium, with a thickness of 400nm.The wiring layer 5 is located at the table of second insulation material layer 23
The surface in face, the surface of the top electrode 225 in first opening 24 and the bypass resistance, is suitable for the top electrode
225 and the bypass resistance electricity draw.
It should be noted that each structure in Figure 13 is opaque structure in actual process, it is each for the ease of showing
Structure and its between positional relationship, deliberately shown with transparent configuration in Figure 13.
Embodiment two
In the present embodiment, a kind of preparation method of superconducting circuit structure, the superconducting circuit structure in the present embodiment are also provided
Preparation method it is roughly the same with the preparation method of superconducting circuit structure described in embodiment one, the difference of the two is: real
It applies in example one, after step 4), forms bypass electricity on 222 surface of the first insulation material layer of 20 side of substrate
Resistance；And in the present embodiment, in step 1), while forming stress pattern 21, is formed and bypassed on 20 surface of substrate
Resistance, the bypass resistance are separated by between the hearth electrode 224 and the substrate 20, and with the stress pattern structure 21
Certain spacing.
Embodiment three
Please continue to refer to Figure 12 and Figure 13, the present invention also provides a kind of superconducting circuit structure, the superconducting circuit structure by
Preparation method described in embodiment one or embodiment two is prepared, and the superconducting circuit structure includes: substrate 20；Stress
Patterning 21, the stress pattern structure 21 are located at 20 surface of substrate；Josephson junction 22, the Josephson junction 22
Including hearth electrode 224, the first insulation material layer 222 and top electrode 225, the hearth electrode 224 is located at the stress pattern structure
21 top and two sides, first insulation material layer 222 are located at 224 surface of hearth electrode, and the top electrode 225 is located at institute
222 surface of the first insulation material layer of the top of stress pattern structure 21 is stated, and the size of the top electrode 225 is less than institute
State the size of stress pattern structure 21.
As an example, the stress pattern structure 21 and the shape of the top electrode 225 can be set according to actual needs,
In the present embodiment, be square with the cross-sectional shape of the stress pattern structure 21 and the top electrode 225 as an example, but
Be not limited thereto, the cross-sectional shape of the stress pattern structure 21 and the top electrode 225 can also for rectangle, circle,
Ellipse etc..
As an example, the center of the top electrode 225 is corresponding and described up and down with the center of the stress pattern structure 21
The size and area of top electrode 225 are less than the size and area of the stress pattern structure 21.
As an example, the material of the stress pattern structure 21 is single layer, bilayer or multilayer semiconductor material layer, insulation material
The bed of material or metal material layer.
As an example, the stress pattern structure 21 is single layer, bilayer or multilayer metal material layer or semiconductor material layer
When, the superconducting circuit structure further includes the first dielectric isolation layer (not shown), is answered described in the first dielectric isolation layer cladding
Power patterning 21.4th insulating materials described in first dielectric isolation layer, that is, corresponding embodiment one or embodiment two
Layer.
As an example, the superconducting circuit structure further include: the second insulation material layer 23, second insulation material layer 23
It is covered in the substrate 20 and 222 surface of the first insulation material layer, second insulation material layer 23 corresponds to the top
The position of electrode 225 is equipped with the first opening 24, and first opening 24 exposes the top electrode 225；Wiring layer 25, it is described to match
Line layer 25 is located in 23 surface of the second insulation material layer and first opening 24, and is in contact with the top electrode 225.
In one example, the superconducting circuit structure further includes bypass resistance (not shown), and the bypass resistance is located at institute
It states between hearth electrode 224 and the substrate 20, and is separated by certain spacing with the stress pattern structure 21.
In another example, the superconducting circuit structure further includes bypass resistance (not shown), and the bypass resistance is located at
222 surface of the first insulation material layer of 20 side of substrate or the first superconductor layer surface, and with the stress diagram
Case structure 21 is separated by certain spacing；The upper surface of the bypass resistance is in contact with the wiring layer 25.
As an example, the superconducting circuit structure further includes the second dielectric isolation layer (not shown), second insulation every
Absciss layer is located at the surface of the bypass resistance, and second dielectric isolation layer corresponds to the position being in contact with the wiring layer 25
The second opening (not shown) is installed, second opening exposes the bypass resistance.Second dielectric isolation layer is
5th insulation material layer described in embodiment one or embodiment two.
In conclusion the present invention provides a kind of superconducting circuit structure and preparation method thereof, the system of the superconducting circuit structure
Preparation Method at least includes the following steps: 1) providing substrate, to form Josephson junction corresponding to subsequent in the substrate surface
Position forms stress pattern structure, and the size of the stress pattern structure is greater than the size of subsequent Josephson junction to be formed；
2) the three layers thin of the first superconducting material, the first insulation material layer and the second superconducting material is sequentially formed in the substrate surface
Membrane structure, the three-layer thin-film structure coat the stress pattern structure；3) the three-layer thin-film structure is etched to form bottom electricity
Pole and Josephson junction；4) the second insulation material layer is formed in the body structure surface that step 3) obtains, and in second insulation material
The position that the bed of material corresponds to the Josephson junction forms the first opening, and first opening exposes the Josephson junction；
5) third superconducting material is deposited, and etches the third superconducting material and forms wiring layer.Superconducting circuit structure of the invention
And preparation method thereof the size stress diagram bigger than Josephson junction size is formed by substrate surface below Josephson junction
Case structure is conducive to being released effectively for stress in Josephson junction, is finally reached the effect for reducing stress, thus solve in response to
Josephson's junction leakage caused by power improves the performance and its stability of superconducting circuit structure.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (12)
1. a kind of preparation method of superconducting circuit structure, which is characterized in that the preparation method of the superconducting circuit structure include with
Lower step:
1) substrate is provided, forms metal layer in the substrate surface, and etch the metal layer, with corresponding in the substrate surface
Stress pattern structure is formed in the subsequent position that form Josephson junction, the size of the stress pattern structure is greater than subsequent want
The size of the Josephson junction of formation, is formed simultaneously bypass resistance, and the bypass resistance and the stress pattern structure are separated by one
Fixed spacing；
2) the three of the first superconducting material, the first insulation material layer and the second superconducting material are sequentially formed in the substrate surface
Layer film structure, the three-layer thin-film structure coat the stress pattern structure；
3) the three-layer thin-film structure is etched to form hearth electrode and Josephson junction；
4) the second insulation material layer is formed in the body structure surface that step 3) obtains, and corresponds to institute in second insulation material layer
The position for stating Josephson junction forms the first opening, and first opening exposes the Josephson junction；
5) third superconducting material is deposited, and etches the third superconducting material and forms wiring layer.
2. the preparation method of superconducting circuit structure according to claim 1, it is characterised in that: in the step 1), in institute
Substrate surface is stated to be formed after the stress pattern structure, further include the stress pattern body structure surface and around formed the 4th
The step of insulation material layer, the 4th insulation material layer coat the stress pattern structure.
3. the preparation method of superconducting circuit structure according to claim 1, it is characterised in that: the step 3) includes following
Step:
31) second superconducting material is etched to form the Josephson junction；
32) first insulation material layer and first superconducting material are sequentially etched to form the hearth electrode.
4. the preparation method of superconducting circuit structure according to claim 1, it is characterised in that: the step 3) includes following
Step:
31) second superconducting material, first insulation material layer and first superconducting material are sequentially etched with shape
At the hearth electrode；
32) continue to etch second superconducting material to form the Josephson junction.
5. the according to claim 1, preparation method of superconducting circuit structure described in 3 or 4, it is characterised in that: the step 4) with
Further include deposition bypass resistance material layer between the step 5), and etches the bypass resistance material layer to form bypass resistance
The step of.
6. the preparation method of superconducting circuit structure according to claim 5, it is characterised in that: formed the bypass resistance it
It afterwards, further include the 5th insulation material layer of deposition, and correspond to the position shape of the bypass resistance in the 5th insulation material layer
At the second opening, second opening exposes the bypass resistance.
7. a kind of superconducting circuit structure, the superconducting circuit structure is prepared by preparation method as claimed in any one of claims 1 to 6
It is formed, which is characterized in that the superconducting circuit structure includes:
Substrate；
Stress pattern structure, is located at the substrate surface, and the stress pattern structure is single layer, bilayer or multilayer metal material
Layer；
Josephson junction, the size and area of the Josephson junction are respectively less than the size and area of the stress pattern structure,
The Josephson junction includes hearth electrode, the first insulation material layer and top electrode, and the hearth electrode is located at the stress pattern knot
The top and two sides of structure, first insulation material layer are located at the hearth electrode surface, and the top electrode is located at the stress diagram
The first insulating materials layer surface of the top of case structure, and the size of the top electrode is less than the stress pattern structure
Size.
8. superconducting circuit structure according to claim 7, it is characterised in that: the superconducting circuit structure further includes first exhausted
Edge separation layer, first dielectric isolation layer coat the stress pattern structure.
9. superconducting circuit structure according to claim 7, it is characterised in that: the superconducting circuit structure further include:
Second insulation material layer is covered in the substrate and the first insulating materials layer surface, second insulation material layer
Position corresponding to the top electrode is equipped with the first opening, and first opening exposes the top electrode；
Wiring layer is located in the second insulating materials layer surface and first opening, and is in contact with the top electrode.
10. superconducting circuit structure according to claim 9, it is characterised in that: the superconducting circuit structure further includes bypass
Resistance, the bypass resistance are separated by with the stress pattern structure certain between the hearth electrode and the substrate
Spacing.
11. superconducting circuit structure according to claim 9, it is characterised in that: the superconducting circuit structure further includes bypass
Resistance, the bypass resistance be located at the one side of substrate first insulation material layer or the hearth electrode surface, and with institute
It states stress pattern structure and is separated by certain spacing；The upper surface of the bypass resistance is in contact with the wiring layer.
12. superconducting circuit structure according to claim 11, it is characterised in that: the superconducting circuit structure further includes second
Dielectric isolation layer, second dielectric isolation layer is located at the surface of the bypass resistance, and second dielectric isolation layer is corresponding
It is equipped with the second opening in the position being in contact with the wiring layer, second opening exposes the bypass resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511028259.8A CN105633268B (en) | 2015-12-31 | 2015-12-31 | A kind of superconducting circuit structure and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511028259.8A CN105633268B (en) | 2015-12-31 | 2015-12-31 | A kind of superconducting circuit structure and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105633268A CN105633268A (en) | 2016-06-01 |
| CN105633268B true CN105633268B (en) | 2019-04-05 |
Family
ID=56047998
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201511028259.8A Active CN105633268B (en) | 2015-12-31 | 2015-12-31 | A kind of superconducting circuit structure and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105633268B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108447613B (en) * | 2018-02-02 | 2020-05-08 | 中国科学院宁波材料技术与工程研究所 | Method for regulating and controlling superconducting transition temperature |
| CN108539004B (en) * | 2018-04-25 | 2023-12-05 | 中国科学院上海微系统与信息技术研究所 | Submicron Josephson tunnel junction and preparation method thereof |
| CN109273585A (en) * | 2018-08-28 | 2019-01-25 | 中国科学院上海微系统与信息技术研究所 | Membrane deposition method and Josephson junction preparation method |
| CN112068047B (en) * | 2020-09-14 | 2021-11-16 | 中国科学院上海微系统与信息技术研究所 | Device structure for improving EMC performance of superconducting quantum device and preparation method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4418095A (en) * | 1982-03-26 | 1983-11-29 | Sperry Corporation | Method of making planarized Josephson junction devices |
| US6384423B1 (en) * | 1998-09-18 | 2002-05-07 | Trw Inc. | Process for reducing surface roughness of superconductor integrated circuit having a ground plane of niobium nitride of improved smoothness |
| CN101101952A (en) * | 2004-03-23 | 2008-01-09 | 丰田合成株式会社 | Solid-state component and solid-state component device |
| CN104377299A (en) * | 2014-08-21 | 2015-02-25 | 中国科学院上海微系统与信息技术研究所 | SQUID structure preventing magnetic field interference in non-magnetic shielding environment |
| US9130116B1 (en) * | 2010-01-08 | 2015-09-08 | Hypres Inc. | System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7741634B2 (en) * | 2008-03-26 | 2010-06-22 | Massachusetts Institute Of Technology | Josephson junction device for superconductive electronics with a magnesium diboride |
-
2015
- 2015-12-31 CN CN201511028259.8A patent/CN105633268B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4418095A (en) * | 1982-03-26 | 1983-11-29 | Sperry Corporation | Method of making planarized Josephson junction devices |
| US6384423B1 (en) * | 1998-09-18 | 2002-05-07 | Trw Inc. | Process for reducing surface roughness of superconductor integrated circuit having a ground plane of niobium nitride of improved smoothness |
| CN101101952A (en) * | 2004-03-23 | 2008-01-09 | 丰田合成株式会社 | Solid-state component and solid-state component device |
| US9130116B1 (en) * | 2010-01-08 | 2015-09-08 | Hypres Inc. | System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits |
| CN104377299A (en) * | 2014-08-21 | 2015-02-25 | 中国科学院上海微系统与信息技术研究所 | SQUID structure preventing magnetic field interference in non-magnetic shielding environment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105633268A (en) | 2016-06-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105633268B (en) | A kind of superconducting circuit structure and preparation method thereof | |
| CN105449094B (en) | The preparation method of niobium nitride film, SQUID device and preparation method thereof | |
| CN106816525B (en) | Niobium nitride SQUID device, preparation method and parameter post-processing approach | |
| CN105428517B (en) | A kind of binary channels superconduction connection and preparation method thereof | |
| CN111933787B (en) | Superconducting connecting channel and method for producing same | |
| CN106953000B (en) | It is integrated in the superconducting field coils and preparation method thereof of Josephson junction | |
| CN110148664A (en) | The preparation method of Josephson junction | |
| CN105702849B (en) | Stepped area is covered with superconducting circuit structure of superconduction coating and preparation method thereof | |
| CN109597004A (en) | Superconducting quantum interference device and preparation method | |
| CN108539004A (en) | Sub-micron josephson tunnel junction and preparation method thereof | |
| JP2764115B2 (en) | Manufacturing method of high sensitivity magnetic field detector | |
| RU2439749C1 (en) | Superconducting device with josephson junction | |
| CN208078023U (en) | Sub-micron josephson tunnel junction | |
| CN111969100B (en) | Josephson junction based on TaN and preparation method thereof | |
| RU2373610C1 (en) | Superconducting device with josephson junction | |
| CN114171670A (en) | Josephson junction, superconducting circuit and preparation method thereof | |
| US6479139B1 (en) | Superconducting substrate structure and a method of producing such structure | |
| JP2539584B2 (en) | Superconducting quantum interference device | |
| JP2768276B2 (en) | Oxide superconducting junction element | |
| JPS60147179A (en) | Superconducting multi-terminal element | |
| CN117881269A (en) | Step-by-step etched Josephson junction preparation method | |
| JPH01300575A (en) | Superconducting element | |
| JP2909455B1 (en) | Superconducting element | |
| Capogna et al. | Fabrication and properties of vertically stacked Nb/Al AlOχ/Nb Josephson tunnel junctions | |
| JPH02213176A (en) | Quasi-plane-type josephson junction device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |