CN105977355A - LED epitaxial wafer and preparation method thereof - Google Patents
LED epitaxial wafer and preparation method thereof Download PDFInfo
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- CN105977355A CN105977355A CN201610302023.7A CN201610302023A CN105977355A CN 105977355 A CN105977355 A CN 105977355A CN 201610302023 A CN201610302023 A CN 201610302023A CN 105977355 A CN105977355 A CN 105977355A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 230000004888 barrier function Effects 0.000 claims description 11
- 238000002347 injection Methods 0.000 abstract description 7
- 239000007924 injection Substances 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000006243 chemical reaction Methods 0.000 description 10
- 230000008901 benefit Effects 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- Engineering & Computer Science (AREA)
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Abstract
The invention discloses an LED epitaxial wafer and a preparation method thereof and belongs to the technical field of semiconductors. The LED epitaxial wafer includes a substrate, and an undoped GaN layer, an N-type GaN layer, a multiple quantum well layer and a P-type GaN layer arranged on the substrate successively in an overlapping manner. The multiple quantum well layer includes InGaN quantum well layers and GaN quantum well layers stacking with each other in an alternating manner. The LED epitaxial wafer also includes an N-type contact layer, which is a Si-doped GaN layer, arranged on the P-type GaN layer. According to the invention, by arranging the N-type contact layer which is the Si-doped GaN layer on the P-type GaN layer, the resistance is reduced and the electric conductivity is increased and the transverse expansion of P-type electrode injection current on the N-type contact layer is facilitated. The LED epitaxial wafer is especially suitable for backlight use.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly to a kind of LED epitaxial slice and preparation side thereof
Method.
Background technology
Light emitting diode (Light Emitting Diode is called for short LED) is as a kind of efficient, environmental protection
New Solid lighting source, has that volume is little, lightweight, life-span length, reliability high and uses low in energy consumption etc.
Advantage, is widely used at lighting field, and LED is in terms of the backlight such as mobile phone, display screen simultaneously
Application is the most popular.
Existing LED includes substrate, cushion, N-type GaN layer, multiple quantum well layer, p-type
GaN layer.
During realizing the present invention, inventor finds that prior art at least there is problems in that
It is leptosomatic for applying the LED chip in backlight, the LED chip that existing LED makes
Ability extending transversely poor, apply the luminous efficiency in backlight relatively low.
Summary of the invention
In order to solve, prior art ability extending transversely is poor, apply relatively low the asking of the luminous efficiency in backlight
Topic, embodiments provides a kind of LED epitaxial slice and preparation method thereof.Described technical scheme
As follows:
On the one hand, a kind of LED epitaxial slice is embodiments provided, outside described light emitting diode
Prolong sheet include substrate and stack gradually layer of undoped gan over the substrate, N-type GaN layer, many
Quantum well layer and p-type GaN layer, described multiple quantum well layer include alternately laminated InGaN quantum well layer and
GaN quantum barrier layer, described LED epitaxial slice also includes the N-type being layered in described p-type GaN layer
Contact layer, described N-type contact layer is the GaN layer of doping Si.
Alternatively, in described N-type contact layer, the concentration of carrier is 1018cm-3～1020cm-3。
Preferably, in described N-type contact layer, the concentration of carrier is 5*1019cm-3。
Alternatively, the thickness of described N-type contact layer is 1nm～20nm.
Preferably, the thickness of described N-type contact layer is 5nm.
On the other hand, embodiments provide the preparation method of a kind of LED epitaxial slice, described
Preparation method includes:
One substrate is provided；
Grow layer of undoped gan over the substrate；
Described layer of undoped gan grows N-type GaN layer；
Growing multiple quantum well layer in described N-type GaN layer, described multiple quantum well layer includes alternately laminated
InGaN quantum well layer and GaN quantum barrier layer；
Growth P-type GaN layer on described multiple quantum well layer；
Growing N-type contact layer in described p-type GaN layer, described N-type contact layer is the GaN of doping Si
Layer.
Alternatively, the Si flow being passed through during the growth of described N-type contact layer is 20sccm～140sccm.
Preferably, the Si flow being passed through during the growth of described N-type contact layer is 70sccm.
Alternatively, in described N-type contact layer, the concentration of carrier is 1018cm-3～1020cm-3。
Alternatively, the thickness of described N-type contact layer is 1nm～20nm.
The technical scheme that the embodiment of the present invention provides has the benefit that
By stacking N-type contact layer in p-type GaN layer, N-type contact layer is the GaN layer of doping Si,
Reduce resistance and increase conductivity, be conducive to the horizontal stroke of the P-type electrode injection current being arranged on N-type contact layer
To extension, it is particularly well-suited in backlight.
Accompanying drawing explanation
For the technical scheme being illustrated more clearly that in the embodiment of the present invention, institute in embodiment being described below
The accompanying drawing used is needed to be briefly described, it should be apparent that, the accompanying drawing in describing below is only the present invention
Some embodiments, for those of ordinary skill in the art, on the premise of not paying creative work,
Other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the structural representation of a kind of LED epitaxial slice that the embodiment of the present invention one provides；
Fig. 2 is the flow chart of the preparation method of a kind of LED epitaxial slice that the embodiment of the present invention two provides.
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to the present invention
Embodiment is described in further detail.
Embodiment one
Embodiments provide a kind of LED epitaxial slice, it is adaptable to GaN base LED of blue green light,
Seeing Fig. 1, this LED epitaxial slice includes substrate 100 and stacks gradually the most not
Doped gan layer 101, N-type GaN layer 102, multiple quantum well layer 103, p-type GaN layer 104, N-type connect
Contact layer 105, multiple quantum well layer 104 includes that alternately laminated InGaN quantum well layer 103a and GaN quantum are built
Layer 103b, N-type contact layer 105 is the GaN layer of doping Si.
It is to be appreciated that the carrier in N-type contact layer is electronics, the mobility of electronics is far above hole,
Reduce resistance, increase conductivity, the P-type electrode injection current being conducive to being arranged on N-type contact layer
Extending transversely so that uniformity of luminance obtains the improvement of matter, is greatly improved luminous efficiency.
In the present embodiment, the number of plies of InGaN quantum well layer 103a and GaN quantum barrier layer 103b is 6,
To coordinate with N-type contact layer, improve the ability extending transversely of electric current, improve uniformity of luminance, improve luminescence
Efficiency.
Specifically, substrate 100 can be Sapphire Substrate, it is also possible to for other substrate, such as Si substrate, SiC
Substrate etc..
Alternatively, the thickness of layer of undoped gan 101 can be 1 μm～4 μm.
Preferably, the thickness of layer of undoped gan 101 can be 2 μm.
Alternatively, the thickness of N-type GaN layer 102 can be 1 μm～4 μm.
Preferably, the thickness of N-type GaN layer 102 can be 2 μm.
Alternatively, the thickness of InGaN quantum well layer 103a can be 2.8nm～3.8nm.
Preferably, the thickness of InGaN quantum well layer 103a can be 3nm～3.5nm.
Alternatively, the thickness of GaN quantum barrier layer 103b can be 6nm～20nm.
Preferably, the thickness of GaN quantum barrier layer 103b can be 8nm～15nm.
Alternatively, the thickness of p-type GaN layer 104 can be 100nm～500nm.
Preferably, the thickness of p-type GaN layer 104 can be 200nm.
Alternatively, in N-type contact layer 105, the concentration of carrier can be 1018cm-3～1020cm-3.Work as N-type
In contact layer 105, the concentration of carrier is less than 1018cm-3Time, it is impossible to it is effectively improved P-type electrode injection current
Ability extending transversely；When in N-type contact layer 105, the concentration of carrier is more than 1020cm-3Time, P can be affected
Type GaN layer injects hole to multiple quantum well layer.
Preferably, in N-type contact layer 105, the concentration of carrier can be 5*1019cm-3。
Alternatively, the thickness of N-type contact layer 105 can be 1nm～20nm.When N-type contact layer 105
When thickness is less than 1nm or more than 20nm, all cannot be effectively improved the horizontal expansion of P-type electrode injection current
Exhibition ability.
Preferably, the thickness of N-type contact layer 105 can be 5nm.
The embodiment of the present invention is by stacking N-type contact layer in p-type GaN layer, and N-type contact layer is doping
The GaN layer of Si, reduces resistance and increases conductivity, be conducive to the P-type electrode being arranged on N-type contact layer
Injection current extending transversely, is particularly well-suited in backlight.
Embodiment two
Embodiments provide the preparation method of a kind of LED epitaxial slice, it is adaptable to preparation is strictly according to the facts
Executing the LED epitaxial slice that example one provides, see Fig. 2, this preparation method includes:
Step 200 a: substrate is provided.
In the present embodiment, substrate can be Sapphire Substrate, it is also possible to for other substrate, as Si substrate,
SiC substrate etc..
Specifically, this step 200 may include that
To be placed in graphite plate in substrate feeding reaction chamber, and reacting by heating chamber will be to 1000～1100 DEG C, increase
In big reaction chamber, pressure is to 500torr, and substrate carries out the pretreatment of 5min.
Step 201: in Grown layer of undoped gan.
Alternatively, the thickness of layer of undoped gan can be 1 μm～4 μm.
Preferably, the thickness of layer of undoped gan can be 2 μm.
Specifically, this step 201 may include that
Reacting by heating chamber is to 1100～1200 DEG C, and in reducing reaction chamber, pressure is to 200torr, at Grown
One layer 1～the layer of undoped gan of 4 μm (preferably 2 μm) thickness.
Step 202: grow N-type GaN layer in layer of undoped gan.
Alternatively, the thickness of N-type GaN layer can be 1 μm～4 μm.
Preferably, the thickness of N-type GaN layer can be 2 μm.
Specifically, this step 202 may include that
Keeping reaction cavity temperature is 1100～1200 DEG C, and in holding reaction chamber, pressure is 200torr, is not mixing
Grow one layer 1 in miscellaneous GaN layer～4 μm (preferably 2 μm) thickness mixes the N-type GaN layer of Si.
Step 203: grow multiple quantum well layer in N-type GaN layer.
In the present embodiment, multiple quantum well layer includes that alternately laminated InGaN quantum well layer and GaN quantum are built
Layer.
Alternatively, the thickness of InGaN quantum well layer can be 2.8nm～3.8nm.
Preferably, the thickness of InGaN quantum well layer can be 3nm～3.5nm.
Alternatively, the thickness of GaN quantum barrier layer can be 6nm～20nm.
Preferably, the thickness of GaN quantum barrier layer can be 8nm～15nm.
Specifically, this step 203 may include that
In holding reaction chamber, pressure is 200torr, reduces reaction cavity temperature simultaneously, raw in N-type GaN layer
Long one layer of multiple quantum well layer, multiple quantum well layer include 6 InGaN quantum well layers of alternating growth and 6 with
InGaN quantum barrier layer, wherein, the thickness of InGaN quantum well layer is 2.8～3.8nm (preferably 3～3.5nm),
Growth temperature is 750～780 DEG C；The thickness of GaN quantum barrier layer is 6nm～20nm (preferably 8～15nm),
Growth temperature is 900 DEG C.
Step 204: growth P-type GaN layer on multiple quantum well layer.
Alternatively, the thickness of p-type GaN layer can be 100nm～500nm.
Preferably, the thickness of p-type GaN layer can be 200nm.
Specifically, this step 204 may include that
Reacting by heating chamber is to 940～970 DEG C, and in reaction chamber, pressure remains 200torr, in MQW region layer
The p-type GaN layer mixing Mg that upper growth one layer 100～500nm (preferably 200nm) is thick.
Step 205: grow N-type contact layer in p-type GaN layer.
In the present embodiment, N-type contact layer is the GaN layer of doping Si.
Alternatively, the Si flow being passed through during the growth of N-type contact layer can be 20sccm～140sccm.
Preferably, the Si flow being passed through during the growth of N-type contact layer can be 70sccm.
Alternatively, in N-type contact layer, the concentration of carrier can be 1018cm-3～1020cm-3。
Preferably, in N-type contact layer, the concentration of carrier can be 5*1019cm-3。
Alternatively, the thickness of N-type contact layer can be 1nm～20nm.
Preferably, the thickness of N-type contact layer can be 5nm.
Specifically, this step 205 may include that
Keep reaction chamber temperature 940～970 DEG C, reaction chamber pressure 200torr, during growth GaN, mix Si amount
70sccm, generation carrier concentration is 5*1019cm-3, thickness is the N-type contact layer of 5nm.
The embodiment of the present invention is by stacking N-type contact layer in p-type GaN layer, and N-type contact layer is doping
The GaN layer of Si, reduces resistance and increases conductivity, be conducive to the P-type electrode being arranged on N-type contact layer
Injection current extending transversely, is particularly well-suited in backlight.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all the present invention's
Within spirit and principle, any modification, equivalent substitution and improvement etc. made, should be included in the present invention's
Within protection domain.
Claims (10)
1. a LED epitaxial slice, described LED epitaxial slice includes substrate and layer successively
Folded layer of undoped gan, N-type GaN layer, multiple quantum well layer and p-type GaN layer over the substrate,
Described multiple quantum well layer includes alternately laminated InGaN quantum well layer and GaN quantum barrier layer, it is characterised in that
Described LED epitaxial slice also includes the N-type contact layer being layered in described p-type GaN layer, described N
Type contact layer is the GaN layer of doping Si.
LED epitaxial slice the most according to claim 1, it is characterised in that described N-type contacts
In Ceng, the concentration of carrier is 1018cm-3～1020cm-3。
LED epitaxial slice the most according to claim 2, it is characterised in that described N-type contacts
In Ceng, the concentration of carrier is 5*1019cm-3。
4. according to the LED epitaxial slice described in any one of claim 1-3, it is characterised in that described
The thickness of N-type contact layer is 1nm～20nm.
LED epitaxial slice the most according to claim 4, it is characterised in that described N-type contacts
The thickness of layer is 5nm.
6. the preparation method of a LED epitaxial slice, it is characterised in that described preparation method includes:
One substrate is provided；
Grow layer of undoped gan over the substrate；
Described layer of undoped gan grows N-type GaN layer；
Growing multiple quantum well layer in described N-type GaN layer, described multiple quantum well layer includes alternately laminated
InGaN quantum well layer and GaN quantum barrier layer；
Growth P-type GaN layer on described multiple quantum well layer；
Growing N-type contact layer in described p-type GaN layer, described N-type contact layer is the GaN of doping Si
Layer.
Preparation method the most according to claim 6, it is characterised in that during the growth of described N-type contact layer
The Si flow being passed through is 20sccm～140sccm.
Preparation method the most according to claim 7, it is characterised in that during the growth of described N-type contact layer
The Si flow being passed through is 70sccm.
9. according to the preparation method described in any one of claim 6-8, it is characterised in that described N-type contacts
In Ceng, the concentration of carrier is 1018cm-3～1020cm-3。
10. according to the preparation method described in any one of claim 6-8, it is characterised in that described N-type connects
The thickness of contact layer is 1nm～20nm.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107359229A (en) * | 2017-06-30 | 2017-11-17 | 华灿光电(苏州）有限公司 | A kind of LED epitaxial slice and its manufacture method |
| CN109346573A (en) * | 2018-09-21 | 2019-02-15 | 华灿光电(苏州）有限公司 | A kind of gallium nitride based LED epitaxial slice and preparation method thereof |
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Application publication date: 20160928 |