CN105957890A - Novel enhanced AlGaN/GaN semiconductor device and preparation method thereof - Google Patents
Novel enhanced AlGaN/GaN semiconductor device and preparation method thereof Download PDFInfo
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- CN105957890A CN105957890A CN201610427274.8A CN201610427274A CN105957890A CN 105957890 A CN105957890 A CN 105957890A CN 201610427274 A CN201610427274 A CN 201610427274A CN 105957890 A CN105957890 A CN 105957890A
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- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 65
- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 238000002360 preparation method Methods 0.000 title abstract description 6
- 229910052751 metal Inorganic materials 0.000 claims abstract description 79
- 239000002184 metal Substances 0.000 claims abstract description 79
- 238000002161 passivation Methods 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 239000002245 particle Substances 0.000 claims abstract description 3
- 239000011248 coating agent Substances 0.000 claims description 27
- 238000000576 coating method Methods 0.000 claims description 27
- 229920002120 photoresistant polymer Polymers 0.000 claims description 20
- 238000004140 cleaning Methods 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 10
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 5
- 229910052719 titanium Inorganic materials 0.000 claims description 5
- 238000003475 lamination Methods 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- 229910002601 GaN Inorganic materials 0.000 description 43
- 239000010931 gold Substances 0.000 description 17
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000005533 two-dimensional electron gas Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
- H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
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Abstract
The invention discloses a novel enhanced AlGaN/GaN semiconductor device and a preparation method thereof. An Si substrate is sequentially coated with a GaN layer and an AlGaN layer from bottom to top; a groove is etched in one side edge of each of the GaN layer and the AlGaN layer and is over-etched to the GaN layer; the upper surface of the GaN layer at the bottom of the groove is coated with a source ohm metal; the other side edge of the upper surface of the AlGaN layer is coated with a drain ohm metal; a passivation layer coats between the source ohm metal and the drain source ohm metal; and the passivation layer close to a vertical channel is coated with a schottky metal which is used for controlling the conductive particle concentration of the vertical channel. The novel enhanced AlGaN/GaN semiconductor device can achieve lower on-resistance than traditional groove-enhanced AlGaN/GaN HEMTs.
Description
Technical field
The present invention relates to a kind of semiconductor device and preparation method, be specifically related to a kind of novel enhancement type
AlGaN/GaN semiconductor device and preparation method thereof, the semiconductor device of the present invention is mainly used in power collection
Become circuit.
Background technology
III-V compound material gallium nitride has bigger energy gap compared to silicon materials, higher punctures
Field intensity, is the outstanding representative in third generation semi-conducting material.It is different from traditional silicon based semiconductor device, based on
The AlGaN/GaN HEMT of gallium nitride material, utilizes the polarization in gallium nitride heterojunction to imitate
Should, obtain at heterojunction boundary and there is high two-dimensional electron gas, high electron mobility and high saturated electrons
The horizontal Two-dimensional electron gas channel of drift velocity realizes the conducting of device.The electrology characteristic of these excellences determines
AlGaN/GaN HEMTs device is deposited in the power semiconductor field of high frequency, high pressure and high power density
In huge industry potentiality.
In enhanced AlGaN/GaN HEMTs device, conducting resistance is typically by contact resistance, drift region
Resistance and channel resistance etc. form, at mesolow application (less than 600V), channel resistance proportion
Increase with the minimizing of drift region length.In traditional enhanced AlGaN/GaN HEMTs device, general
All over using plane raceway groove, due to the restriction of etching condition, channel length is generally about 1.5um, greatly
The reduction limiting channel resistance.For overcoming the defect of existing enhanced AlGaN/GaN HEMTs device,
Propose a kind of novel enhancement type AlGaN/GaN semiconductor device with vertical channel, owing to groove is carved
Erosion degree of depth controllability is preferable, can control channel length at 200-400nm, can greatly reduce channel resistance.
Summary of the invention
In order to overcome that existing enhanced AlGaN/GaN HEMTs device channel length is longer, conducting resistance relatively
Big defect, the present invention proposes a kind of novel enhancement type AlGaN/GaN with vertical channel and partly leads
Body device and preparation method thereof.
Its technical scheme realizing foregoing invention purpose is:
One, a kind of novel enhancement type AlGaN/GaN semiconductor device:
Its structure is to be sequentially coated with GaN layer and AlGaN layer from bottom to up, at GaN in Si substrate
Layer and the side etching edge of AlGaN layer have groove, groove to spend quarter to GaN layer, in trench bottom GaN layer
Upper surface coating source electrode ohmic metal, at AlGaN layer upper surface away from groove side edge coating drain ohmic
Metal, is coated with passivation layer between source and drain ohmic metal, is positioned on the passivation layer near vertical channel coating
There is the schottky metal for controlling vertical channel conducting particles concentration.
Described vertical channel refers to the GaN layer table being positioned at groove side surface and not covered by source electrode ohmic metal
Face, raceway groove is being perpendicular to the groove side surface direction degree of depth within 25nm.
Described trench bottom GaN layer upper surface coating source electrode ohmic metal, described AlGaN layer upper surface is remote
From groove side edge coating drain ohmic metal;Described passivation layer is coated in addition to drain ohmic metal
AlGaN layer upper surface and groove side surface in addition to source electrode ohmic metal, and extend to source electrode ohm gold
A part for the upper surface belonged to is as extension;Described schottky metal is coated in the side of passivation layer and prolongs
In the section of stretching, and extend to a part for passivation layer upper surface.
Described source electrode ohmic metal and drain ohmic metal are by Ti, Al, Ni and Au metal from top to bottom
Lamination is formed successively, and described schottky metal is formed by Ni and Au the most successively lamination.
The described vertical a length of 200-400nm on vertical channel cross section.
Described passivation layer uses aluminium oxide, and its thickness is 10-200nm.
In described source electrode ohmic metal and drain ohmic metal, the thickness of each layer of Ti/Al/Ni/Au is respectively
20/140/50/50-150nm, the thickness of the described each layer of schottky metal Ni/Au is respectively 30/50-150nm,
The thickness of described GaN layer is 1-100 μm, and the thickness of described AlGaN layer is 10-50nm.
The present invention can realize the conducting resistance less than conventional enhancement GaN HEMTs, described semiconductor device
Part structure is suitably applied the power device of planar structure.
Two, the manufacture method of a kind of novel full-control type AlGaN/GaN semiconductor device, comprises the following steps:
(1) GaN layer and AlGaN layer it are sequentially depositing from top to bottom at Si substrate;
(2) by utilizing ICP-RIE dry etching after exposure, development after AlGaN layer surface-coated photoresist
Method forms groove at a lateral edges, and groove spends quarter to GaN layer;
(3) clean after removing photoresist, then after integral surface coating photoresist, by difference after exposure, development
Trench bottom GaN layer upper surface and AlGaN layer upper surface away from groove side edge coating source electrode ohmic metal,
Drain ohmic metal;
(4) after peeling off the most successively, cleaning, the AlGaN layer upper surface in addition to drain ohmic metal,
Groove side surface in addition to source electrode ohmic metal and extend to the prolonging of a upper surface part of source electrode ohmic metal
Passivation layer is coated in the section of stretching;
(5) in the side of passivation layer after passing through exposure, development after integral surface coating photoresist after cleaning, prolong
The section of stretching and extend to the part of passivation layer upper surface and be coated with schottky metal.
The invention has the beneficial effects as follows:
The present invention utilizes ICP-RIE dry etching method to form vertical channel in table top side, and channel length is
200-400nm, channel resistance can reduce more than 50%, electric current density can double.The present invention is than passing
System enhanced AlGaN/GaN HEMTs has less conducting resistance.
Accompanying drawing explanation
Fig. 1 is semiconductor device structure schematic diagram of the present invention.
In figure, 1, drain ohmic metal, 2, source electrode ohmic metal;3, schottky metal;4, passivation layer;
5, AlGaN layer;6, GaN layer;7, vertical channel;8, Si substrate.
Detailed description of the invention
Below in conjunction with the accompanying drawings and the present invention is described in further detail by specific embodiment.
Embodiments of the invention are as follows:
Embodiment 1
1) GaN layer 6 and AlGaN layer 5, the thickness of GaN layer it are sequentially depositing from top to bottom at Si substrate 8
Being 1 μm, the thickness of AlGaN layer is 10nm;
2) by utilizing ICP-RIE dry etching method after exposure, development after AlGaN layer surface-coated photoresist
Forming groove at a lateral edges, groove spends quarter to GaN layer 6;
It is positioned at groove side surface and the GaN layer 6 surface formation vertical channel not covered by source electrode ohmic metal 2
7.Vertical a length of 200nm on its vertical channel 7 cross section, to realize reducing channel resistance, increasing and lead
Alive purpose.
3) clean after removing photoresist, then after integral surface coating photoresist, by existing respectively after exposure, development
Trench bottom GaN layer 6 upper surface and AlGaN layer 5 upper surface are away from groove side edge coating source electrode ohm gold
Genus 2, drain ohmic metal 1;Two ohmic metals all use the thickness of Ti/Al/Ni/Au, Ti/Al/Ni/Au to divide
Wei 20/140/50/50nm.
4) after peeling off the most successively, cleaning, AlGaN layer 5 upper surface in addition to drain ohmic metal 1,
Groove side surface in addition to source electrode ohmic metal 2 and extend to the upper surface part of source electrode ohmic metal 2
Extension on coating alumina as passivation layer 4, its thickness is 10nm;
5) in the side of passivation layer 4 after passing through exposure, development after integral surface coating photoresist after cleaning, prolong
The section of stretching and extend to the part of passivation layer 4 upper surface and be coated with schottky metal 3, schottky metal 3 is adopted
With Ni/Au, its thickness is 30/50nm.
Embodiment 2
1) GaN layer 6 and AlGaN layer 5, the thickness of GaN layer it are sequentially depositing from top to bottom at Si substrate 8
Being 20 μm, the thickness of AlGaN layer is 50nm;
2) by utilizing ICP-RIE dry etching method after exposure, development after AlGaN layer surface-coated photoresist
Forming groove at a lateral edges, groove spends quarter to GaN layer 6;
It is positioned at groove side surface and the GaN layer 6 surface formation vertical channel not covered by source electrode ohmic metal 2
7.Vertical a length of 350nm on its vertical channel 7 cross section, to realize reducing channel resistance, increasing and lead
Alive purpose.
3) clean after removing photoresist, then after integral surface coating photoresist, by existing respectively after exposure, development
Trench bottom GaN layer 6 upper surface and AlGaN layer 5 upper surface are away from groove side edge coating source electrode ohm gold
Genus 2, drain ohmic metal 1;Two ohmic metals all use the thickness of Ti/Al/Ni/Au, Ti/Al/Ni/Au to divide
Wei 20/140/50/150nm.
4) after peeling off the most successively, cleaning, AlGaN layer 5 upper surface in addition to drain ohmic metal 1,
Groove side surface in addition to source electrode ohmic metal 2 and extend to the upper surface part of source electrode ohmic metal 2
Extension on coating alumina as passivation layer 4, its thickness is 200nm;
5) in the side of passivation layer 4 after passing through exposure, development after integral surface coating photoresist after cleaning, prolong
The section of stretching and extend to the part of passivation layer 4 upper surface and be coated with schottky metal 3, schottky metal 3 is adopted
With Ni/Au, its thickness is 30/150nm.
Embodiment 3
1) GaN layer 6 and AlGaN layer 5, the thickness of GaN layer it are sequentially depositing from top to bottom at Si substrate 8
Being 100 μm, the thickness of AlGaN layer is 20nm;
2) by utilizing ICP-RIE dry etching method after exposure, development after AlGaN layer surface-coated photoresist
Forming groove at a lateral edges, groove spends quarter to GaN layer 6;
It is positioned at groove side surface and the GaN layer 6 surface formation vertical channel not covered by source electrode ohmic metal 2
7.Vertical a length of 400nm on its vertical channel 7 cross section, to realize reducing channel resistance, increasing and lead
Alive purpose.
3) clean after removing photoresist, then after integral surface coating photoresist, by existing respectively after exposure, development
Trench bottom GaN layer 6 upper surface and AlGaN layer 5 upper surface are away from groove side edge coating source electrode ohm gold
Genus 2, drain ohmic metal 1;Two ohmic metals all use the thickness of Ti/Al/Ni/Au, Ti/Al/Ni/Au to divide
Wei 20/140/50/80nm.
4) after peeling off the most successively, cleaning, AlGaN layer 5 upper surface in addition to drain ohmic metal 1,
Groove side surface in addition to source electrode ohmic metal 2 and extend to the upper surface part of source electrode ohmic metal 2
Extension on coating alumina as passivation layer 4, its thickness is 60nm;
5) in the side of passivation layer 4 after passing through exposure, development after integral surface coating photoresist after cleaning, prolong
The section of stretching and extend to the part of passivation layer 4 upper surface and be coated with schottky metal 3, schottky metal 3 is adopted
With Ni/Au, its thickness is 30/100nm.
The above, for the preferred embodiment of present invention, not impose any restrictions present invention,
All any simple modification, change and equivalences above example made according to present invention technical spirit
Structure changes, and belongs in the protection domain of present invention technical scheme.
Claims (9)
1. a novel enhancement type AlGaN/GaN semiconductor device, it is characterised in that: its structure is at Si
GaN layer (6) and AlGaN layer (5) it is sequentially coated with from bottom to up, in GaN layer on substrate (8)
(6) and the side etching edge of AlGaN layer (5) has groove, groove to spend quarter to GaN layer (6), exist
GaN layer (6) upper surface coating source electrode ohmic metal (2) of trench bottom, at the upper table of AlGaN layer (5)
Face, away from groove side edge coating drain ohmic metal (1), coats between source and drain ohmic metal (2,1)
There is passivation layer (4), be positioned on the passivation layer near vertical channel (4) and be coated with for controlling vertical-type
The schottky metal (3) of channel conduction particle concentration.
A kind of novel enhancement type AlGaN/GaN semiconductor device the most according to claim 1, it is special
Levy and be: described vertical channel (7) refers to be positioned at groove side surface and not by source electrode ohmic metal (2)
GaN layer (6) surface covered, raceway groove is being perpendicular to the groove side surface direction degree of depth within 25nm.
A kind of novel enhancement type AlGaN/GaN semiconductor device the most according to claim 1, it is special
Levy and be: described AlGaN layer (5) upper surface away from groove side edge coating drain ohmic metal (1),
GaN layer (6) upper surface coating source electrode ohmic metal (2) of described trench bottom;Described passivation layer (4)
It is coated in AlGaN layer (5) upper surface in addition to drain ohmic metal (1) and except source electrode ohmic metal (2)
Groove side surface in addition, and extend to the part of upper surface for source electrode ohmic metal (2) as extension;
Described schottky metal (3) is coated on side and the extension of passivation layer (4), and extends to passivation
The part of layer (4) upper surface.
4. according to the arbitrary described a kind of novel enhancement type AlGaN/GaN semiconductor device of claims 1 to 3,
It is characterized in that: described source electrode ohmic metal (2) and drain ohmic metal (1) are by Ti, Al, Ni
With Au metal the most successively lamination formed, described schottky metal (3) by Ni and Au from lower to
On successively lamination formed.
5. according to the arbitrary described a kind of novel enhancement type AlGaN/GaN semiconductor device of claims 1 to 3,
It is characterized in that: the described vertical a length of 200-400nm on vertical channel (7) cross section.
6. according to the arbitrary described a kind of novel enhancement type AlGaN/GaN semiconductor device of claims 1 to 3,
It is characterized in that: described passivation layer (4) uses aluminium oxide, and its thickness is 10-200nm.
7. according to the arbitrary described a kind of novel enhancement type AlGaN/GaN semiconductor device of claims 1 to 3,
It is characterized in that: in described source electrode ohmic metal (2) and drain ohmic metal (1), Ti/Al/Ni/Au is each
The thickness of layer is respectively 20/140/50/ (50-150) nm, the thickness of the described each layer of schottky metal (3) Ni/Au
Degree is respectively 30/ (50-150) nm, and the thickness of described GaN layer (6) is 1-100 μm, described AlGaN
The thickness of layer (5) is 10-50nm.
8. according to the arbitrary described a kind of novel enhancement type AlGaN/GaN semiconductor device of claim 1~7,
It is characterized in that: described semiconductor device structure is suitably applied the power device of planar structure.
9. the making of the arbitrary described novel full-control type AlGaN/GaN semiconductor device of claim 1~7
Method, it is characterised in that the method comprises the following steps:
(1) GaN layer (6) and AlGaN layer (5) it are sequentially depositing from top to bottom at Si substrate (8);
(2) by utilizing ICP-RIE after exposure, development after AlGaN layer (5) surface-coated photoresist
Dry etching method forms groove at a lateral edges, and groove is crossed and carved to GaN layer (6);
(3) clean after removing photoresist, then after integral surface coating photoresist, by difference after exposure, development
At trench bottom GaN layer (6) upper surface and AlGaN layer (5) upper surface away from edge coating source, groove side
Pole ohmic metal (2), drain ohmic metal (1);
(4) after peeling off the most successively, cleaning, in the AlGaN layer (5) in addition to drain ohmic metal (1)
Upper surface, groove side surface in addition to source electrode ohmic metal (2) and extend to source electrode ohmic metal (2)
Upper surface a part extension on coat passivation layer (4);
(5) after cleaning after integral surface coating photoresist by after exposure, development in the side of passivation layer (4)
Face, extension and extend to the part of passivation layer (4) upper surface and be coated with schottky metal (3).
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090267078A1 (en) * | 2008-04-23 | 2009-10-29 | Transphorm Inc. | Enhancement Mode III-N HEMTs |
CN102332469A (en) * | 2011-09-22 | 2012-01-25 | 中山大学 | Longitudinally-conductive GaN (gallium nitride) normally-closed MISFET (metal integrated semiconductor field effect transistor) device and manufacturing method thereof |
CN104916684A (en) * | 2015-06-11 | 2015-09-16 | 大连理工大学 | Longitudinal short-opening grid channel-type HEMT device and preparation method thereof |
CN105576020A (en) * | 2016-02-26 | 2016-05-11 | 大连理工大学 | Normally-off HEMT device with longitudinal grid structure and manufacturing method thereof |
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2016
- 2016-06-15 CN CN201610427274.8A patent/CN105957890A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090267078A1 (en) * | 2008-04-23 | 2009-10-29 | Transphorm Inc. | Enhancement Mode III-N HEMTs |
CN102332469A (en) * | 2011-09-22 | 2012-01-25 | 中山大学 | Longitudinally-conductive GaN (gallium nitride) normally-closed MISFET (metal integrated semiconductor field effect transistor) device and manufacturing method thereof |
CN104916684A (en) * | 2015-06-11 | 2015-09-16 | 大连理工大学 | Longitudinal short-opening grid channel-type HEMT device and preparation method thereof |
CN105576020A (en) * | 2016-02-26 | 2016-05-11 | 大连理工大学 | Normally-off HEMT device with longitudinal grid structure and manufacturing method thereof |
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Application publication date: 20160921 |