CN105955392A - Band-gap reference voltage source with base current compensation characteristic - Google Patents

Abstract

The invention belongs to the technical field of integrated circuits, and relates to a band-gap reference voltage source with a base current compensation characteristic. Mainly, by adding a resistor to a proper joint of a traditional reference voltage source through a circuit, through the additional voltage difference on the resistor, the influences of base current on finally-output voltage are eliminated, the band-gap reference voltage source with the base current compensation characteristic is finally generated, and therefore the band-gap reference voltage source has better temperature characteristics and can provide higher reference voltage precision.

Description

A kind of bandgap voltage reference with base current compensation characteristic

Technical field

The invention belongs to technical field of integrated circuits, relate to a kind of bandgap voltage reference with base current compensation characteristic.

Background technology

As the basic module in high-precision A/D, D/A converter and system integrated chip (SOC), reference voltage source is all the time Being an extremely important and conventional module in integrated circuit, its effect is to provide one not with temperature and supply voltage for system The voltage reference of change.

Now circuit design generally use the mode by two kinds of voltages with positive temperature coefficient and negative temperature coefficient are added to produce band Gap reference voltage, the voltage by two with opposite temperature coefficients is added with suitable weight, will obtain and have zero-temperature coefficient Voltage, traditional bandgap voltage reference is due to the existence of base current, it will affect the collector current size of audion, Thus result in bigger reference voltage temperature coefficient, need to carry out base current compensation.

Summary of the invention

To be solved by this invention, it is simply that for the problems referred to above, a kind of band-gap reference electricity with base current compensation characteristic is proposed Potential source.

The technical scheme is that as it is shown in figure 1, a kind of bandgap voltage reference with base current compensation characteristic, wrap Include the first PMOS MP1, the second PMOS MP2, the 3rd PMOS MP3, the first NMOS tube MN1, Two NMOS tube MN2, the first resistance R1, the second resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, First audion QN1, the second audion QN2, the 3rd audion Q3 and current source；Wherein, the first PMOS MP1 Source electrode connect power supply, its grid and drain interconnection；The source electrode of the second PMOS MP2 connects power supply, and its grid meets a PMOS The drain electrode of pipe MP1；The source electrode of the 3rd PMOS MP3 connects power supply, and its grid connects the drain electrode of the second PMOS MP2； The colelctor electrode of the first audion QN1 connects the drain electrode of the first PMOS MP1, and the base stage of the first audion QN1 is by the first electricity Resistance R1 is followed by the drain electrode of the 3rd PMOS MP3；The colelctor electrode of the second audion QN2 connects the leakage of the second PMOS MP2 Pole, the base stage of the second audion QN2 passes sequentially through the 3rd resistance R3 and the second resistance R2 and is followed by the first audion QN1 base stage Junction point with the first resistance R1；The input of current source connects power supply, and output connects the drain electrode of the first NMOS tube MN1；First The grid of NMOS tube MN1 and drain interconnection, its source ground；The drain electrode of the second NMOS tube MN2 connects the first audion The emitter stage of QN1 and the emitter stage of the second audion QN2, the grid of the second NMOS tube MN2 connects the first NMOS tube The drain electrode of MN1, the source ground of the second NMOS tube MN2；The base stage of the 3rd audion Q3 meets the second resistance R2 and The junction point of three resistance R3, the base stage of the 3rd audion Q3 interconnects with colelctor electrode, and its emitter stage is followed by by the 4th resistance R4 Ground；The drain electrode of the 3rd PMOS MP3 is by ground connection after the 5th resistance R5.

Beneficial effects of the present invention is, increases resistance by circuit at suitable node, utilizes voltage difference extra on resistance, thus Eliminate the base current impact on final output voltage, finally produce the bandgap voltage reference with base current compensation, therefore This bandgap voltage reference has more preferable temperature characterisitic, using the teaching of the invention it is possible to provide higher reference voltage precision.

Accompanying drawing explanation

Fig. 1 is the bandgap voltage reference structural representation of the present invention；

Fig. 2 is the practical circuit diagram that bandgap voltage reference of the present invention produces.

Detailed description of the invention

Below in conjunction with the accompanying drawings, technical scheme is described in detail:

The bandgap voltage reference physical circuit of the present invention is as it is shown in figure 1, include the first PMOS MP1, the second PMOS MP2, the 3rd PMOS MP3, the first NMOS tube MN1, the second NMOS tube MN2, the first resistance R1, second Resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the first audion QN1, the second audion QN2, 3rd audion Q3 and current source；Wherein, the source electrode of the first PMOS MP1 connects power supply, its grid and drain interconnection；The The source electrode of two PMOS MP2 connects power supply, and its grid connects the drain electrode of the first PMOS MP1；3rd PMOS MP3 Source electrode connect power supply, its grid connects the drain electrode of the second PMOS MP2；The colelctor electrode of the first audion QN1 meets a PMOS The drain electrode of pipe MP1, the base stage of the first audion QN1 is followed by the drain electrode of the 3rd PMOS MP3 by the first resistance R1； The colelctor electrode of the second audion QN2 connects the drain electrode of the second PMOS MP2, and the base stage of the second audion QN2 passes sequentially through Three resistance R3 and the second resistance R2 are followed by the junction point of the first audion QN1 base stage and the first resistance R1；The input of current source Connecing power supply, output connects the drain electrode of the first NMOS tube MN1；The grid of the first NMOS tube MN1 and drain interconnection, its source Pole ground connection；The drain electrode of the second NMOS tube MN2 connects emitter stage and the transmitting of the second audion QN2 of the first audion QN1 Pole, the grid of the second NMOS tube MN2 connects the drain electrode of the first NMOS tube MN1, the source electrode of the second NMOS tube MN2 Ground connection；The base stage of the 3rd audion Q3 connects the second resistance R2 and the junction point of the 3rd resistance R3, the base of the 3rd audion Q3 Pole interconnects with colelctor electrode, and its emitter stage is by ground connection after the 4th resistance R4；The drain electrode of the 3rd PMOS MP3 is by the 5th electricity Ground connection after resistance R5.

The operation principle of the present invention is:

If the collector current of QN1 is I_C1, the collector current of QN2 is I_C2, according to transistor collector electric current and V_BEIt Between relation, have:

$V_{BE1}=V_{T}ln\frac{I_{C1}}{I_{S1}}---\left(1\right)$

$V_{BE2}=V_{T}ln\frac{I_{C2}}{I_{S2}}---\left(2\right)$

If QN1 is a pipe, QN2 is eight pipe parallel connections, so I_S2=8I_S1, MP1 and MP2 constitutes 1:1's again Current mirror, so I_C1=I_C2, formula (1) and (2) subtract each other:

$\begin{array}{c}{\mathrm{\ΔV}}_{BE}=V_{BE1}-V_{BE2}=V_{T}ln\frac{I_{C1}}{I_{C2}}\frac{I_{S2}}{I_{S1}}\\ =V_T\ln 8\end{array}$

There is parasitic base resistance in transistor base, therefore we can regard R3 as the parasitic base resistance of QN2, equivalence The circuit that bandgap voltage reference produces afterwards is as in figure 2 it is shown, the voltage difference at such R2 two ends is Δ V_BEIf flowing through the electricity of R2 Stream is I, and the base current of audion QN1 and QN2 is I_b, then have:

ΔV_BE=V_TLn8=I × R2

$\begin{array}{c}{V}_{REF}=V_{BE-Q3}+R_1\×(I+I_b)+R_2\×I+R_4\×(I-I_b)\\ =V_{BE-Q3}+I\×(R_1+R_2+R_4)+I_b\×(R_1-R_4)\\ =V_{BE-Q3}+\frac{V_T\ln 8}{R_2}\×(R_1+R_2+R_4)+I_b\×(R_1-R_4)\end{array}$

If it is equal in magnitude to choose R1 and R4, then have:

$V_{REF}=V_{BE-Q3}+\frac{V_{T}ln8}{R_2}\×(R_1+R_2+R_4)$

As can be seen from the above equation, the final expression formula of benchmark does not include base current I_b, reference voltage and bipolar transistor Emitter stage and base voltage difference V_BE, the ratio of resistance and the launch site area ratio of QN2 with QN1 are relevant, eliminate base stage Electric current I_bImpact on reference voltage, using the teaching of the invention it is possible to provide higher reference voltage precision.Section 1 V_BEThere is negative temperature coefficient, It is about-2mV/ DEG C, Section 2 during room temperatureThere is positive temperature coefficient, be about+0.087mV/ DEG C when room temperature, By setting suitable operating point, two sums just can be made to reach zero-temperature coefficient at a certain temperature, thus obtain having one The reference voltage of rank temperature-compensating.

The band gap reference with base current compensation proposed by the invention, eliminates the base current shadow to bandgap voltage reference Ringing, this bandgap voltage reference has more preferable temperature characterisitic, using the teaching of the invention it is possible to provide higher reference voltage precision.

Claims (1)

1. there is a bandgap voltage reference for base current compensation characteristic, including the first PMOS MP1, the 2nd PMOS Pipe MP2, the 3rd PMOS MP3, the first NMOS tube MN1, the second NMOS tube MN2, the first resistance R1, Two resistance R2, the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the first audion QN1, the second audion QN2, 3rd audion Q3 and current source；Wherein, the source electrode of the first PMOS MP1 connects power supply, its grid and drain interconnection；The The source electrode of two PMOS MP2 connects power supply, and its grid connects the drain electrode of the first PMOS MP1；3rd PMOS MP3 Source electrode connect power supply, its grid connects the drain electrode of the second PMOS MP2；The colelctor electrode of the first audion QN1 meets a PMOS The drain electrode of pipe MP1, the base stage of the first audion QN1 is followed by the drain electrode of the 3rd PMOS MP3 by the first resistance R1； The colelctor electrode of the second audion QN2 connects the drain electrode of the second PMOS MP2, and the base stage of the second audion QN2 passes sequentially through Three resistance R3 and the second resistance R2 are followed by the junction point of the first audion QN1 base stage and the first resistance R1；The input of current source Connecing power supply, output connects the drain electrode of the first NMOS tube MN1；The grid of the first NMOS tube MN1 and drain interconnection, its source Pole ground connection；The drain electrode of the second NMOS tube MN2 connects emitter stage and the transmitting of the second audion QN2 of the first audion QN1 Pole, the grid of the second NMOS tube MN2 connects the drain electrode of the first NMOS tube MN1, the source electrode of the second NMOS tube MN2 Ground connection；The base stage of the 3rd audion Q3 connects the second resistance R2 and the junction point of the 3rd resistance R3, the base of the 3rd audion Q3 Pole interconnects with colelctor electrode, and its emitter stage is by ground connection after the 4th resistance R4；The drain electrode of the 3rd PMOS MP3 is by the 5th electricity Ground connection after resistance R5.