CN105800547A - Temporary bonding method for wafer-level ultra-thin silicon wafer in chemical-mechanical polishing - Google Patents

Temporary bonding method for wafer-level ultra-thin silicon wafer in chemical-mechanical polishing Download PDF

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CN105800547A
CN105800547A CN201610217363.XA CN201610217363A CN105800547A CN 105800547 A CN105800547 A CN 105800547A CN 201610217363 A CN201610217363 A CN 201610217363A CN 105800547 A CN105800547 A CN 105800547A
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thin silicon
silicon wafers
ultra thin
mechanical polishing
ultra
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CN105800547B (en
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曾毅波
郭航
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Xiamen University
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Xiamen University
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C3/00Assembling of devices or systems from individually processed components
    • B81C3/001Bonding of two components

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  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The invention discloses a temporary bonding method for a wafer-level ultra-thin silicon wafer in chemical-mechanical polishing, and relates to the field of a semiconductor technology and micro-manufacturing. Three sections of equal-diameter concentric arc grooves with the outer diameter slightly larger than that of the ultra-thin silicon wafer are formed in a bearing piece through processing, and three sections of overflow grooves are formed and are connected with the arc grooves; a spin-coating method is adopted, and an adhesive is applied to bottoms of the arc grooves, so that the arc grooves can locate and bear the ultra-thin silicon wafer; the overall silicon wafer is subjected to hot pressing; after subsequent chemical-mechanical polishing of the ultra-thin silicon wafer is completed, a cooled sulfuric acid and hydrogen peroxide mixed liquid and hot acetone are adopted successively, and the adhesive can be completely dissolved and removed, so that damage-free and stress-free separation between the ultra-thin silicon wafer and the bearing piece is realized; not only can the problems that the ultra-thin silicon wafer is difficult to clamp and easy to damage in the chemical-mechanical polishing process be solved, but also accumulative processing errors of the ultra-thin silicon wafer during subsequent polishing can be effectively reduced, and the technological cost is remarkably reduced.

Description

Interim adhesive method for chemically mechanical polishing wafer level ultra thin silicon wafers
Technical field
The present invention relates to semiconductor technology and micro-manufacture field, especially relate to a kind of interim adhesive method for chemically mechanical polishing wafer level ultra thin silicon wafers.
Background technology
Ultra thin silicon wafers (thickness≤80 μm) is commonly employed in the micro Nano material such as implanted prosthetics, micro-energy resource system, device encapsulation and device under RFID tag, retina, and its performance is had vital impact.First pass through physics or chemical reduction silicon chip, rear adopt chemical Mechanical Polishing Technique that the silicon chip surface after thinning is polished, be the priority scheme preparing ultra thin silicon wafers at present.Compared with preparing standard silicon chip, the yield rate preparing ultra thin silicon wafers is low, one of them major reason be in that thinning after ultra thin silicon wafers clamping difficulty.In CMP process, if polish pressure directly acts on the vac sorb in the middle of the back side of ultra thin silicon wafers or fixture, to produce unbalanced external and internal pressure for thin silicon wafer poor, all very easily causes breaking of ultra thin silicon wafers.Therefore the ultra thin silicon wafers of wafer level high-quality is obtained, it is necessary to solve the clamping problem of ultra thin silicon wafers.
The Chinese invention patent that publication number is CN104858806A provides a kind of vacuum fixture for clamping ultra thin silicon wafers, chuck body offers several sections of grooves, the first vacuum hole running through chuck body is offered in every section of groove, it is respectively arranged with sealing member in each section of groove, each sealing member offers the second vacuum hole, second vacuum hole is connected with the first vacuum hole in this section of groove, each first vacuum hole is connected with one group of pipeline structure respectively, and each group of pipeline structure includes gas exhaust piping and air inlet pipeline.By arranging several sections of grooves independent of each other, even if guaranteeing wherein one section of groove generation vacuum leak, without affecting vacuum fixture clamping silicon chip, simultaneously by arranging air inlet pipeline, achieve the gas pressure intensity difference between upper and lower two planes of silicon chip adjustable, enable vacuum fixture to consolidate, clamp ultra thin silicon wafers safely.
Become clear school etc. (monocrystalline silicon piece superfine grinding thinning technique experimental study [D]. the large paper of Dalian University of Technology: 2009.12) design for the vacuum cup of clamping ultra thin silicon wafers, utilize the negative pressure that vacuum produces by effective for silicon chip sticking.The matrix of sucker adopts pmma material, transparent with machine glass it can clearly be observed that when sticking silicon chip whether with the justified margin of silicon chip.Simultaneously at the viscous last layer polishing pad of the contact surface of silicon wafer sucking disc, the smooth and polishing pad of softness is possible to prevent ultra thin silicon wafers chipping when absorption.
Publication number has been the Chinese invention patent of CN103035483B discloses a kind of interim bonding reconciliation separating process method being applied to thin silicon wafer, belongs to the interim adhesive method of ultra thin silicon wafers.Comprise the following steps that 1) it is coated with the first binding agent at the bonding face of silicon chip, and to its baking;2) it is coated with the second binding agent at the bonding face of slide glass, and to its baking;3) silicon chip and slide glass are bonded temporarily;4) silicon chip back side is ground thinning;5) silicon chip back side technique is carried out;6) silicon chip after thinning and slide glass are dissociated;7) remove thinning after wafer bonding face on the first binding agent;8) the second binding agent on slide glass bonding face is removed.This process had both possessed the advantage can dissociated under room temperature, solve again conventional laser or irradiation under ultraviolet ray dissociate in method due to binding agent can not too thick and cause can not be completely covered on wafer bonding face the problem of the shoulder height of figure.
For the clamping of ultra thin silicon wafers, what currently mainly include developing special fixture and ultra thin silicon wafers binds two schemes temporarily.Special fixture solves vac sorb and ultra thin silicon wafers is produced to the problem of unbalanced external and internal pressure difference, guarantees that ultra thin silicon wafers is consistent with clamp central simultaneously, reduces the inhomogeneities of the follow-up polishing of ultra thin silicon wafers.But special fixture still cannot avoid polish pressure to act directly on the problem that the ultra thin silicon wafers back side causes ultra thin silicon wafers easily rupturable, special fixture there is also the defect that development cost is high, cannot adapt to different model chemical-mechanical polishing mathing simultaneously.The interim adhesive method of ultra thin silicon wafers is compared to the scheme developed for clamping the special fixture of ultra thin silicon wafers, then have and adapt in different model chemical-mechanical polishing mathing, it is to avoid the advantage that polish pressure acts directly on silicon chip back side.But the interim adhesive method of ultra thin silicon wafers exists for following defect at present: applied in two coats adhesive glue, not only increase the complexity of technique, and glue thickness increase certainly will strengthen follow-up ultra thin silicon wafers polishing error;Select special adhesive glue and special laser equipment to dissociate, though stress when dissociating can be prevented effectively from, but also increase considerably corresponding process costs undoubtedly;When sticking ultra thin silicon wafers, it is impossible to be accurately positioned ultra thin silicon wafers on carrying tablet, cause that the center of carrying tablet center and ultra thin silicon wafers is deviateed, strengthen the inhomogeneities of the follow-up polishing of ultra thin silicon wafers.
Summary of the invention
It is an object of the invention to the problems referred to above existed for the interim adhesive method of existing ultra thin silicon wafers, offer not only can solve ultra thin silicon wafers and be difficult to clamp in CMP process, breakable problem, can effectively reduce the interim adhesive method for chemically mechanical polishing wafer level ultra thin silicon wafers of accumulation mismachining tolerance when ultra thin silicon wafers is follow-up to be polished simultaneously.
The present invention comprises the following steps:
1) processing bigger three sections of isometrical isocentric circular arc grooves than ultra thin silicon wafers external diameter on carrying tablet, and offer three sections of overflow launders, overflow launder is connected with arc groove;
2) method adopting spin coating, is coated on viscose at the bottom of arc groove, for arc groove location and carrying ultra thin silicon wafers;
3) overall silicon chip is carried out hot pressing;
4) after ultra thin silicon wafers completes subsequent chemical-mechanical polishing, after successively adopting cooling, sulphuric acid and hydrogen peroxide mixed liquor can be completely dissolved with hot acetone and remove viscose, it is achieved ultra thin silicon wafers separates without damaged, unstressed with carrying tablet.
In step 1) in, described on carrying tablet, processing bigger three sections of isometrical isocentric circular arc grooves than ultra thin silicon wafers external diameter can adopt micro fabrication, described micro fabrication includes thermal oxide, photoetching and ultrasonic wet etching etc.;Diameter 25~the 50mm bigger than the diameter of ultra thin silicon wafers of described carrying tablet;Bigger than the diameter of ultra thin silicon wafers 80~150 μm of the diameter of described three sections of isometrical isocentric circular arc grooves, the degree of depth of arc groove is 10~30 μm, and the center of arc groove is consistent with the center of carrying tablet;Overflow launder on described carrying tablet is lower 10~25 μm than arc groove, and in order to follow-up spin coating viscose with when sticking ultra thin silicon wafers, unnecessary viscose can be discharged by overflow launder;The overall circumference of described arc groove is the 1/8~1/12 of ultra thin silicon wafers girth, removes photoresist in order to follow-up;Described ultrasonic anisotropic wet etch selects mass percent concentration to be the potassium hydroxide solution of 40%~60%, etching temperature is 75~80 DEG C, supersonic frequency is more than 80KHz, and ultrasonic power is 120~250W, to obtain the surface roughness smooth arc groove bottom surface less than 8nm.
In step 2) in, described viscose can adopt photoresist conventional in semiconductor technology;After described spin coating, the thickness of viscose is 0.6~1.8 μm, and after described spin coating, the inhomogeneities of the thickness of viscose is less than 0.3%.
In step 3) in, described hot pressing can adopt precuring hot pressing and be fully cured two steps of hot pressing;The temperature of described precuring hot pressing can be 50~70 DEG C, and pressure can be 0.8~2N/cm2, the time can be 15~60min;Described completely crued temperature can be 130~170 DEG C, and pressure can be 0.5~1.2N/cm2, the time can be 120~240min.
In step 4) in, the temperature of described sulphuric acid and hydrogen peroxide mixed liquor can be 40~50 DEG C, with the glue-line that loose part is crosslinked.
Compared with the prior art, the present invention has following outstanding advantages:
Guaranteeing on the basis of the interim adhesive method relative potence of ultra thin silicon wafers, innovated by related process and improve, the interim adhesive method of ultra thin silicon wafers and micro fabrication is made to have good compatibility, substitute the demand of extraordinary consumptive material that the interim adhesive method of existing ultra thin silicon wafers adopts and special warfare equipment, and reduce the mismachining tolerance that follow-up glossing is accumulated, to obtain the ultra thin silicon wafers of high-quality.It is based on above-mentioned purpose, it is proposed to a kind of brand-new interim adhesive method for chemically mechanical polishing wafer level ultra thin silicon wafers.
The present invention is based on micro fabrication, the proposed interim adhesive method for chemically mechanical polishing wafer level ultra thin silicon wafers, not only solve ultra thin silicon wafers in micro-nano technology, be difficult to the problem of clamping, and problem polish pressure can avoided to act directly on the ultra thin silicon wafers back side in CMP process and cause ultra thin silicon wafers easily rupturable.Simultaneously without customized special fixture, the demand of different model chemical-mechanical polishing mathing clamping ultra thin silicon wafers can be met.
The relatively existing technology of the present invention, its progressive being embodied in is obtained at the bottom of smooth arc groove by ultrasonic anisotropic wet etch, and is obtained the mismachining tolerance that mucigel ultra-thin and in uniform thickness is conducive to accumulating when reduction ultra thin silicon wafers is follow-up to be polished after photoresist spin coating;By three sections of isometrical isocentric circular arc groove locating super-thin silicon chips, it is ensured that ultra thin silicon wafers is consistent with carrying tablet center, advantageously reduces the inhomogeneities of the follow-up polishing of ultra thin silicon wafers;Guarantee ultra thin silicon wafers with under the unstressed premise separated of carrying tablet, adopt photoresist conventional in micro fabrication as viscose, remove photoresist with conventional chemical solvent, to substitute special adhesive glue and special laser dissociation equipment, significantly reduce process costs.
Accompanying drawing explanation
Fig. 1 (a)~(h) illustrates figure for carrying tablet micro Process step.
Fig. 2 is carrying tablet.
Fig. 3 is coated with photoresist at carrying tablet.
Fig. 4 for stick ultra thin silicon wafers by photoresist on carrying tablet.
Fig. 5 separates for after removing photoresist, ultra thin silicon wafers is unstressed with carrying tablet.
Detailed description of the invention
Following example are finally to obtain the 3 " ultra thin silicon wafers that thickness is 75 ± 3 μm.Being 83 ± 3 μm by thin silicon wafer thickness after chemical reduction, thin silicon wafer carries out chemically mechanical polishing after binding temporarily, obtains ultra thin silicon wafers after removing photoresist.
Referring to Fig. 1~5, for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers described in the embodiment of the present invention, comprise the following steps:
(1) thermal oxide, on carrying tablet 1, extension a layer thickness is the SiO of 300nm2Thin film 2.Referring to Fig. 1 (a);
(2) overflow launder position is made by lithography, and with photoresist 3 for mask, wet etching SiO2.Referring to Fig. 1 (b);
(3) photoresist is removed, with SiO2For mask layer, employing mass percent concentration is 60%KOH, and temperature is 78 DEG C, and supersonic frequency is 100KHz, and ultrasonic power is 200W, carries out the overflow launder anisotropic wet etch of Part I, and etching time is 0.75h, and corrosion depth is 16.8 μm.Referring to Fig. 1 (c);
(4) SiO is removed2For mask layer.Referring to Fig. 1 (d);
(5) thermal oxide, on carrying tablet, extension a layer thickness is the SiO of 1 μm2Thin film.Referring to Fig. 1 (e);
(6) arc groove and overflow launder position are made by lithography, and with photoresist for mask, wet etching SiO2.Referring to Fig. 1 (f);
(7) photoresist is removed, with SiO2For mask layer, employing mass percent concentration is 60%KOH, and temperature is 78 DEG C, and supersonic frequency is 100KHz, and ultrasonic power is 200W, carries out the overflow launder anisotropic wet etch of arc groove and Part II, and etching time is 1h, and corrosion depth is 33.6 μm.Namely the degree of depth of arc groove is 33.6 μm, and the degree of depth of overflow launder is 50.4 μm.Referring to Fig. 1 (g);
(8) SiO is removed2, it is thus achieved that carrying tablet, referring to Fig. 1 (h) and Fig. 2.The radius of every section of arc groove 4 is 38.15mm, and the arc chord angle corresponding to every section of circular arc is 10 °, and every section of circular arc girth is about 8mm, and arc groove surface roughness is less than 7.8nm;In fig. 2, labelling 5 is overflow launder;
(9) select BP212 photoresist 3 as viscose, carry out spin coating.Rotating speed 3000rpm, the time is 40s, and glue thickness is 1.3 μm (inhomogeneities is less than 0.2%).Referring to Fig. 3;In figure 3, labelling 1 is carrying tablet;
(10) stick ultra thin silicon wafers 6, successively carry out precuring hot pressing and be fully cured hot pressing.During precuring hot pressing, temperature is 60 DEG C, and pressure is 1N/cm2, time 30min.Being fully cured temperature during hot pressing is 150 DEG C, and pressure is 0.8N/cm2, the time is 3h.Referring to Fig. 4;
(11), after ultra thin silicon wafers chemically mechanical polishing, overall silicon chip is removed photoresist.When removing photoresist, first prepare concentrated sulphuric acid and hydrogen peroxide mixed liquor (volume ratio is 3: 1), and ice bath is cooled to 45 DEG C, with the glue-line that loose part is crosslinked.Rear employing heating in water bath, to 50 DEG C of hot acetone solution, removes the glue-line loosened, it is achieved ultra thin silicon wafers 6 and carrying tablet 1 are without separation damaged, unstressed.Referring to Fig. 5.
The present invention, based on micro fabrication, first develops carrying tablet, can be accurately positioned and carry ultra thin silicon wafers.Secondly adopt the photoresist that quasiconductor is conventional as viscose, by precuring hot pressing be fully cured hot pressing, improve the resistance to corrosion of Adhesion property and viscose, finally improve the temperature of the conventional solution that removes photoresist, it is achieved the ultra thin silicon wafers after chemically mechanical polishing separates without damaged, unstressed with carrying tablet.
The present invention adopts micro fabrication to include ultrasonic anisotropic wet etch and processes the isometrical isocentric circular arc groove of three section more bigger than ultra thin silicon wafers external diameter on carrying tablet, and offers three sections of overflow launders.Photoresist is spun at the bottom of arc groove as viscose, carries ultra thin silicon wafers, by hot pressing, improves Adhesion property and the resistance to corrosion of viscose.After ultra thin silicon wafers completes polishing, select the concentrated sulphuric acid after cooling and hydrogen peroxide mixed liquor and hot acetone mixing(of viscose), it is achieved ultra thin silicon wafers separates without breakage with carrying tablet.The interim adhesive method of ultra thin silicon wafers proposed by the invention effectively solves ultra thin silicon wafers and is difficult to the problem of clamping, simple to operate, applied widely.Carrying tablet Smooth bottom land and mucigel ultra-thin and in uniform thickness be conducive to reduce ultra thin silicon wafers follow-up polishing time cumulative error, ultra thin silicon wafers is consistent with carrying tablet center, advantageously reduces the inhomogeneities of follow-up polishing.

Claims (10)

1. for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterised in that comprise the following steps:
1) processing bigger three sections of isometrical isocentric circular arc grooves than ultra thin silicon wafers external diameter on carrying tablet, and offer three sections of overflow launders, overflow launder is connected with arc groove;
2) method adopting spin coating, is coated on viscose at the bottom of arc groove, for arc groove location and carrying ultra thin silicon wafers;
3) overall silicon chip is carried out hot pressing;
4) after ultra thin silicon wafers completes subsequent chemical-mechanical polishing, after successively adopting cooling, sulphuric acid and hydrogen peroxide mixed liquor can be completely dissolved with hot acetone and remove viscose, it is achieved ultra thin silicon wafers separates without damaged, unstressed with carrying tablet.
2. as claimed in claim 1 for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterized in that in step 1) in, described processing bigger three sections of isometrical isocentric circular arc grooves than ultra thin silicon wafers external diameter on carrying tablet and adopt micro fabrication, described micro fabrication includes thermal oxide, photoetching and ultrasonic wet etching.
3. as claimed in claim 1 for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterised in that in step 1) in, the diameter 25~50mm bigger than the diameter of ultra thin silicon wafers of described carrying tablet.
4. as claimed in claim 1 for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterized in that in step 1) in, bigger than the diameter of ultra thin silicon wafers 80~150 μm of the diameter of described three sections of isometrical isocentric circular arc grooves, the degree of depth of arc groove is 10~30 μm, and the center of arc groove is consistent with the center of carrying tablet;Overflow launder on described carrying tablet is lower 10~25 μm than arc groove;The overall circumference of described arc groove is the 1/8~1/12 of ultra thin silicon wafers girth, removes photoresist in order to follow-up.
5. as claimed in claim 1 for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterized in that in step 1) in, described ultrasonic anisotropic wet etch selects mass percent concentration to be the potassium hydroxide solution of 40%~60%, etching temperature is 75~80 DEG C, supersonic frequency is more than 80KHz, ultrasonic power is 120~250W, to obtain the surface roughness smooth arc groove bottom surface less than 8nm.
6. as claimed in claim 1 for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterised in that in step 2) in, described viscose adopts photoresist conventional in semiconductor technology;After described spin coating, the thickness of viscose is 0.6~1.8 μm, and after described spin coating, the inhomogeneities of the thickness of viscose is less than 0.3%.
7. as claimed in claim 1 for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterised in that in step 3) in, described hot pressing adopts precuring hot pressing and is fully cured two steps of hot pressing.
8. as claimed in claim 7 for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterised in that the temperature of described precuring hot pressing is 50~70 DEG C, and pressure is 0.8~2N/cm2, the time is 15~60min.
9. as claimed in claim 7 for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterised in that described completely crued temperature is 130~170 DEG C, and pressure is 0.5~1.2N/cm2, the time is 120~240min.
10. as claimed in claim 1 for the interim adhesive method of chemically mechanical polishing wafer level ultra thin silicon wafers, it is characterised in that in step 4) in, the temperature of described sulphuric acid and hydrogen peroxide mixed liquor is 40~50 DEG C.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111816604A (en) * 2020-08-18 2020-10-23 北京智创芯源科技有限公司 Wafer etching method
CN115028139A (en) * 2022-05-10 2022-09-09 美满芯盛(杭州)微电子有限公司 Separation method of MEMS silicon strain gauge
CN110349847B (en) * 2018-04-08 2022-11-04 上海新微技术研发中心有限公司 Method for bonding through bonding material and bonding structure

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030113984A1 (en) * 2000-05-16 2003-06-19 Mamoru Okada Semiconductor wafer thinning method, and thin semiconductor wafer
CN1956151A (en) * 2005-10-28 2007-05-02 三菱电机株式会社 Manufacturing method for semiconductor and accessorial device
TW200736420A (en) * 2006-02-09 2007-10-01 Sumco Techxiv Corp Susceptor and apparatus for manufacturing epitaxial wafer
CN201126815Y (en) * 2007-12-25 2008-10-01 中国电子科技集团公司第四十五研究所 Device for positioning wafer center
CN103035581A (en) * 2012-07-24 2013-04-10 上海华虹Nec电子有限公司 Silicon slice temporary bonding method
CN103035580A (en) * 2012-07-24 2013-04-10 上海华虹Nec电子有限公司 Temporary bonding and dissociating process method applied to thin silicon slices
CN103165502A (en) * 2011-12-14 2013-06-19 无锡华瑛微电子技术有限公司 Wafer tray and wafer box
CN104810317A (en) * 2014-01-23 2015-07-29 无锡华润上华半导体有限公司 Wafer clamp and wafer deep groove corrosion method
CN103035483B (en) * 2012-08-28 2015-10-14 上海华虹宏力半导体制造有限公司 A kind of interim bonding being applied to thin silicon wafer conciliates separating process method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030113984A1 (en) * 2000-05-16 2003-06-19 Mamoru Okada Semiconductor wafer thinning method, and thin semiconductor wafer
CN1956151A (en) * 2005-10-28 2007-05-02 三菱电机株式会社 Manufacturing method for semiconductor and accessorial device
TW200736420A (en) * 2006-02-09 2007-10-01 Sumco Techxiv Corp Susceptor and apparatus for manufacturing epitaxial wafer
CN201126815Y (en) * 2007-12-25 2008-10-01 中国电子科技集团公司第四十五研究所 Device for positioning wafer center
CN103165502A (en) * 2011-12-14 2013-06-19 无锡华瑛微电子技术有限公司 Wafer tray and wafer box
CN103035581A (en) * 2012-07-24 2013-04-10 上海华虹Nec电子有限公司 Silicon slice temporary bonding method
CN103035580A (en) * 2012-07-24 2013-04-10 上海华虹Nec电子有限公司 Temporary bonding and dissociating process method applied to thin silicon slices
CN103035483B (en) * 2012-08-28 2015-10-14 上海华虹宏力半导体制造有限公司 A kind of interim bonding being applied to thin silicon wafer conciliates separating process method
CN104810317A (en) * 2014-01-23 2015-07-29 无锡华润上华半导体有限公司 Wafer clamp and wafer deep groove corrosion method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110349847B (en) * 2018-04-08 2022-11-04 上海新微技术研发中心有限公司 Method for bonding through bonding material and bonding structure
CN111816604A (en) * 2020-08-18 2020-10-23 北京智创芯源科技有限公司 Wafer etching method
CN115028139A (en) * 2022-05-10 2022-09-09 美满芯盛(杭州)微电子有限公司 Separation method of MEMS silicon strain gauge
CN115028139B (en) * 2022-05-10 2023-05-16 美满芯盛(杭州)微电子有限公司 Separation method of MEMS silicon strain gauge

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