CN102751207B - Wafer temporary bonding method - Google Patents
Wafer temporary bonding method Download PDFInfo
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- CN102751207B CN102751207B CN201210260218.1A CN201210260218A CN102751207B CN 102751207 B CN102751207 B CN 102751207B CN 201210260218 A CN201210260218 A CN 201210260218A CN 102751207 B CN102751207 B CN 102751207B
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Abstract
The invention relates to a wafer temporary bonding method, which comprises the following steps of: a, providing and washing a first wafer; b, providing a carrier wafer, and spin-coating a bond; c, transferring the first wafer and the carrier wafer into a bonding box to form a first bonding body, and thinning the first wafer on the first bonding body according to demands; d, scribing the thinned first wafer on the first bonding body by utilizing a laser scribing machine; e, transferring the first bonding body into the bonding box, and enabling the temperature inside the bonding box to be higher than a softening temperature of the bond; and uniformly applying pressure on the surface of the first wafer by utilizing a flat wafer in the bonding box; f, providing a needed second wafer, and bonding the second wafer with the first wafer according to demands to form a second bonding body; and g, de-bonding the second bonding body. The technique steps are convenient to operate, the production cost is reduced, the tilt curvature influence after the thinning of the wafer can be avoided, permanent bonding can be formed, and safety and reliability can be realized.
Description
Technical field
The present invention relates to a kind of bonding method, the interim bonding method of especially a kind of wafer, specifically a kind of method of substrate warpage degree on wafer bonding impact that solve, belongs to semi-conductive technical field.
Background technology
Wafer bond techniques refers to the method for two wafer being combined closely by chemistry and physical action, and wafer bonding often combines with surface silicon processing and silicon bulk fabrication, is used in the processing technology of MEMS (micro electro mechanical system).Although wafer bonding is not the direct approach of micromachined; but in micromachined, there is consequence; by being combined with other manufacturing process, both can micro-structural be provided support and be protected, the electricity that can realize between mechanical structure or between mechanical structure and circuit is again connected.The quality of wafer bonding quality can have a direct impact the performance of micro mechanical system, and wherein before and after bonding, the angularity of wafer is one of principal element affecting bonding quality.Two contact crystal column surfaces must be less than certain angularity bonding could at room temperature occur, and after bonding, the angularity of wafer can not be excessive.The angularity of wafer is less, and surface is more smooth, overcomes strain institute work just less, and wafer is also with regard to easier bonding.
Carry out bonding for the wafer after attenuate, because thinning back side forms certain thickness damage layer at wafer rear, destroyed the lattice arrangement of inside wafer monocrystalline silicon, make the inside of wafer have larger stress.Along with the increase that mechanical grinding is cut thickness, the ability that wafer self is resisted stress just dies down, and is mainly reflected in wafer outside, i.e. silicon wafer warpage.Angularity and wafer thickness are inversely proportional to, and angularity is larger, and the stress that inside wafer exists is larger.For ultra-thin wafers, before bonding, must discharge stress and process to reduce silicon wafer warpage.After thinning back side, conventionally use chemico-mechanical polishing (CMP) to reduce the angularity of silicon chip at present.But the pollution that uses chemico-mechanical polishing (CMP) easily to produce remaining slurry, polishing time used is longer, has increased production cost.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, provide a kind of wafer interim bonding method, its processing step is easy to operate, reduces production costs, and avoids the angularity impact after attenuate, can form permanent bonding, safe and reliable.
According to technical scheme provided by the invention, the interim bonding method of a kind of wafer, the interim bonding method of described wafer comprises the steps:
A, provide and clean required the first wafer for the treatment of bonding;
B, provide carrying wafer, and on a surface of carrying wafer spin coating adhesive;
C, by above-mentioned the first wafer and carrying wafer transfer bonding case, the first wafer and carrying wafer are carried out to interim bonding, to form first key zoarium, and the first wafer on first key zoarium is carried out to required attenuate;
D, utilize laser scribing means to carry out scribing the first wafer after attenuate on above-mentioned first key zoarium;
E, above-mentioned first key zoarium is transferred in bonding case, and made temperature in the bonding case softening temperature higher than adhesive; In bonding case, utilize smooth wafer to exert pressure at the surface uniform of the first wafer downwards, to regulate the surface smoothness of the first wafer, regulate rear reduction temperature that adhesive is solidified;
F, provide the second required wafer, and described the second wafer and the first wafer are carried out to required bonding, form the second bonding body;
G, will on above-mentioned the second bonding body, separate bonding, to remove the carrying wafer being connected with the first wafer, form the permanent bonding of the first wafer and the second wafer.
In described step f, the method that the first wafer and the second wafer carry out bonding comprises vacuum bonding, eutectic bonding, anode linkage or solder bonding.
The material of described the first wafer, the second wafer comprises silicon, germanium or SOI.
In described step c, the operating procedure of first key zoarium is also comprised to TSV through hole is made, plating.
Advantage of the present invention: the first wafer and the second wafer are realized to switching by carrying wafer, after the first wafer attenuate, by to the first Wafer Dicing, and utilize smooth wafer to carry out leveling to the first wafer, the stress causing to discharge attenuate, and reduce angularity to forming the impact of semiconductor device, processing step is easy to operate, reduces production costs, and avoids the angularity impact after attenuate, can form permanent bonding, safe and reliable.
Brief description of the drawings
Fig. 1 is the structural representation of the present invention's the first wafer.
Fig. 2 is the present invention's spin coating binding agent on carrying wafer, and the schematic diagram coordinating with the first wafer.
To be the present invention's the first wafer carry out forming after interim bonding the schematic diagram of first key zoarium with carrying wafer to Fig. 3.
Fig. 4 is that the present invention carries out the schematic diagram after scribing to the first wafer on first key zoarium.
Fig. 5 is that the present invention utilizes smooth wafer to regulate the schematic diagram of the first wafer surface flatness.
Fig. 6 is for the invention provides the second wafer, and the schematic diagram coordinating with the first wafer.
Fig. 7 forms the schematic diagram after the second bonding body after the first wafer bonding on the present invention's the second wafer and first key zoarium.
Fig. 8 is the present invention separates bonding schematic diagram to the carrying wafer on first key zoarium.
Fig. 9 is the schematic diagram that the present invention's the first wafer and the second wafer form permanent bonding.
One single chip, the smooth wafer of 5-and 6-the second wafer after description of reference numerals: 1-the first wafer, 2-carrying wafer, 3-adhesive, 4-scribing.
Embodiment
Below in conjunction with concrete drawings and Examples, the invention will be further described.
After can reducing wafer attenuate, form the impact of angularity on device, the present invention adopts a kind of interim bonding method to form a kind of permanent bonding technology, and particularly, the interim bonding method of wafer of the present invention comprises the steps:
A, provide and clean required the first wafer 1 for the treatment of bonding;
As shown in Figure 1: the material of described the first wafer 1 comprises silicon, germanium, the first wafer 1 also can adopt SOI(silicon-on-insulator);
B, provide carrying wafer 2, and carrying wafer 2 a surface on spin coating adhesive 3;
As shown in Figure 2: described carrying wafer 2 is a kind of transition wafer, and adhesive 3 adopts conventional material, as SU-8 etc., will not enumerate herein;
C, by above-mentioned the first wafer 1 and the 2 transfer key mould assembling of carrying wafer, the first wafer 1 and carrying wafer 2 are carried out to interim bonding, to form first key zoarium, and the first wafer 1 on first key zoarium is carried out to required attenuate;
As shown in Figure 3: after the first wafer 1 and carrying wafer 2 are transferred in bonding case, utilize adhesive 3 that the first wafer 1 and carrying wafer 2 are carried out to interim bonding, the back side of the first wafer 1 is connected with the surface of carrying wafer 2 spin coating adhesives 3, to form first key zoarium; On to first key zoarium, the first wafer 1 carries out before required attenuate, and possible operating procedure also comprises TSV(Through Silicon Vias) through hole makes and the technique such as plating, and the technological operation before attenuate need to be carried out according to technique; Usually, the front of the first wafer 1 is the surface that forms device area, and the front of the first wafer 1 is corresponding with the back side of the first wafer 1;
D, utilize laser scribing means to carry out scribing the first wafer 1 after attenuate on above-mentioned first key zoarium;
As shown in Figure 4: the first wafer 1 on first key zoarium is carried out to scribing, and the stress causing to discharge the techniques such as attenuate, after scribing, forms one single chip 4 after some scribings; When scribing is carried out in the front of the first wafer 1, can not affect the device architecture being formed on the first wafer 1 front, after scribing, can utilize follow-up smooth wafer 5 to carry out smooth, to reduce stress;
E, above-mentioned first key zoarium is transferred in bonding case, and made temperature in the bonding case softening temperature higher than adhesive 3; In bonding case, utilize smooth wafer 5 to exert pressure at the surface uniform of the first wafer 1 downwards, to regulate the surface smoothness of the first wafer 1, regulate rear reduction temperature that adhesive is solidified; ;
As shown in Figure 5: the angularity causing after attenuate, scribing in order to reduce the first wafer 1, in bonding case, by smooth wafer 5, the first wafer 1 is evenly exerted pressure, to make the surface of the first wafer 1 form good evenness, the exert pressure surface of the first wafer 1 of described smooth wafer 1 is another surface that the first wafer 1 and carrying wafer 2 carry out bonding;
F, provide the second required wafer 6, and described the second wafer 6 and the first wafer 1 are carried out to required bonding, form the second bonding body;
As shown in Figure 6 and Figure 7: on the second wafer 6, prepare corresponding device architecture by required technique, after the second wafer 6 fabricate devices structures, can adopt the scribing flattening process identical with the first wafer 1 to reduce stress, the structure that also can adopt common process step to form, the material of the second wafer 6 is conventional semiconductor technology material, the mode of the first wafer 1 and the second wafer 6 bondings comprise vacuum bonding, eutectic key and, anode linkage, solder bonding, or other forms of bonding mode;
G, will on above-mentioned the second bonding body, separate bonding, to remove the carrying wafer 2 being connected with the first wafer 1, form the permanent bonding of the first wafer 1 and the second wafer 6.
As shown in Figure 8 and Figure 9: in order to make the first wafer 1 and the second wafer 6 form permanent bonding structure, carrying wafer 2 need to be removed; While separating bonding, adopt conventional step that the first wafer 1 is separated with carrying wafer 2.Concrete separation process can, for by heating, melt adhesive 3, to separate the first wafer 1 and to carry being connected of wafer 2, also can use chemical agent dissolves adhesive to separate the first wafer 1 and carrying wafer 2.Detailed process, by the art personnel are known, no longer describes in detail herein.
The present invention realizes switching by the first wafer 1 and the second wafer 6 by carrying wafer 2, after the first wafer 1 attenuate, by to the first wafer 1 scribing, and utilize smooth wafer 5 to carry out leveling, the stress causing to discharge attenuate to the first wafer 1, and reduce angularity to forming the impact of semiconductor device, processing step is easy to operate, reduces production costs, and avoids the angularity impact after attenuate, can form permanent bonding, safe and reliable.
Claims (1)
1. the interim bonding method of wafer, is characterized in that, the interim bonding method of described wafer comprises the steps:
(a), provide and clean required the first wafer (1) for the treatment of bonding;
(b), provide carrying wafer (2) a surperficial upper spin coating adhesive (3) that is carrying wafer (2);
(c), by above-mentioned the first wafer (1) and the transfer key mould assembling of carrying wafer (2), the first wafer (1) and carrying wafer (2) are carried out to interim bonding, to form first key zoarium, and the first wafer (1) on first key zoarium is carried out to required attenuate;
(d), utilize laser scribing means to carry out scribing the first wafer (1) after attenuate on above-mentioned first key zoarium;
(e), above-mentioned first key zoarium is transferred in bonding case, and make temperature in the bonding case softening temperature higher than adhesive (3); In bonding case, utilize smooth wafer (5) to exert pressure at the surface uniform of the first wafer (1) downwards, to regulate the surface smoothness of the first wafer (1), regulate rear reduction temperature that adhesive (3) is solidified;
(f), required the second wafer (6) is provided, and described the second wafer (6) and the first wafer (1) are carried out to required bonding, form the second bonding body;
(g), will on above-mentioned the second bonding body, separate bonding, to remove the carrying wafer (2) being connected with the first wafer (1), form the first wafer (1) and the permanent bonding of the second wafer (6);
In described step (f), the first wafer (1) comprises vacuum bonding, eutectic bonding, anode linkage or solder bonding with the method that the second wafer (6) carries out bonding;
The material of described the first wafer (1), the second wafer (6) comprises silicon, germanium or SOI;
In described step (c), the operating procedure of first key zoarium is also comprised to TSV through hole is made, plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201210260218.1A CN102751207B (en) | 2012-07-26 | 2012-07-26 | Wafer temporary bonding method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201210260218.1A CN102751207B (en) | 2012-07-26 | 2012-07-26 | Wafer temporary bonding method |
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| CN102751207A CN102751207A (en) | 2012-10-24 |
| CN102751207B true CN102751207B (en) | 2014-11-05 |
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| CN201210260218.1A Active CN102751207B (en) | 2012-07-26 | 2012-07-26 | Wafer temporary bonding method |
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Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103094094B (en) * | 2013-02-04 | 2015-03-25 | 武汉电信器件有限公司 | Prepared method of ultrathin semiconductor chip |
| CN104637824A (en) * | 2013-11-08 | 2015-05-20 | 上海华虹宏力半导体制造有限公司 | Temporary bonding and dissociation technology method for silicon wafer |
| CN103794523B (en) * | 2014-01-24 | 2017-06-06 | 清华大学 | A kind of interim bonding method of wafer |
| JP2015230971A (en) * | 2014-06-05 | 2015-12-21 | 株式会社ディスコ | Method for forming laminated wafer |
| CN106608615B (en) * | 2015-10-22 | 2019-03-08 | 上海先进半导体制造股份有限公司 | The manufacturing method of MEMS device |
| CN108565333B (en) * | 2018-04-09 | 2022-04-05 | 济南晶正电子科技有限公司 | Ultrathin wafer with electrodes on two sides and preparation method thereof |
| CN110223958B (en) * | 2019-06-19 | 2021-03-26 | 武汉新芯集成电路制造有限公司 | Semiconductor device and method for manufacturing the same |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6013534A (en) * | 1997-07-25 | 2000-01-11 | The United States Of America As Represented By The National Security Agency | Method of thinning integrated circuits received in die form |
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Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6013534A (en) * | 1997-07-25 | 2000-01-11 | The United States Of America As Represented By The National Security Agency | Method of thinning integrated circuits received in die form |
Non-Patent Citations (2)
| Title |
|---|
| "生产验证的临时键合与解键合设备及技术";H.Kirchberger et al;《电子工业专用设备》;20050531(第124期);第35页"Process Overview"，图2 * |
| H.Kirchberger et al."生产验证的临时键合与解键合设备及技术".《电子工业专用设备》.2005,(第124期),第33-40页. * |
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