CN105800547B - Interim adhesive method for chemically-mechanicapolish polishing wafer level ultra thin silicon wafers - Google Patents
Interim adhesive method for chemically-mechanicapolish polishing wafer level ultra thin silicon wafers Download PDFInfo
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- CN105800547B CN105800547B CN201610217363.XA CN201610217363A CN105800547B CN 105800547 B CN105800547 B CN 105800547B CN 201610217363 A CN201610217363 A CN 201610217363A CN 105800547 B CN105800547 B CN 105800547B
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- B81C3/00—Assembling of devices or systems from individually processed components
- B81C3/001—Bonding of two components
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Abstract
Interim adhesive method for chemically-mechanicapolish polishing wafer level ultra thin silicon wafers, is related to semiconductor technology and micro manufacturing field.Three sections of isometrical isocentric circular arc grooves more bigger than ultra thin silicon wafers external diameter are processed on carrying tablet, and opens up three sections of overflow launders, overflow launder is connected with arc groove；Using the method for spin coating, viscose is coated on arc groove bottom, ultra thin silicon wafers are positioned and carried for arc groove；Hot pressing is carried out to overall silicon chip；After ultra thin silicon wafers complete subsequent chemical-mechanical polishing, successively can be completely dissolved and remove viscose with hot acetone using sulfuric acid after cooling and dioxygen water mixed liquid, realize that ultra thin silicon wafers are separated with carrying tablet without damaged, unstressed.Ultra thin silicon wafers can not only be solved to be difficult to clamp in CMP process, breakable problem, while accumulation mismachining tolerance when ultra thin silicon wafers are subsequently polished can be effectively reduced, significantly reduces process costs.
Description
Technical field
The present invention relates to semiconductor technology and micro manufacturing field, more particularly, to one kind for chemically-mechanicapolish polishing wafer level
The interim adhesive method of ultra thin silicon wafers.
Background technology
Ultra thin silicon wafers (thickness≤80 μm) implanted prosthetics, micro-energy resource system, device envelope under RFID tag, retina
It is commonly employed in the micro Nano materials such as dress and device, has vital influence to its performance.First pass through physics or
Person's chemical reduction silicon chip, is polished using chemical Mechanical Polishing Technique to the silicon chip surface after thinning afterwards, be prepare at present it is super
The priority scheme of thin silicon wafer.Compared with standard silicon chip is prepared, the yield rate for preparing ultra thin silicon wafers is low, and one of major reason exists
The clamping of the ultra thin silicon wafers after thinning is difficult.In CMP process, if directly polish pressure acted on super
Vacuum suction in the middle of the back side of thin silicon wafer or fixture produces unbalanced external and internal pressure poor for thin silicon wafer, all easily causes to surpass
The rupture of thin silicon wafer.Therefore the ultra thin silicon wafers of wafer level high-quality to be obtained, it is necessary to solve the problems, such as the clamping of ultra thin silicon wafers.
The Chinese invention patent of the A of Publication No. CN 104858806 provides a kind of vacuum clip for clamping ultra thin silicon wafers
Tool, offers several sections of grooves in chuck body, and the first vacuum hole through chuck body is offered in every section of groove, and each section recessed
Seal is respectively arranged with groove, each seal offers the second vacuum hole, in the second vacuum hole and this section of groove first
Vacuum hole is connected, and each first vacuum hole is connected with one group of pipeline structure respectively, and each group of pipeline structure includes gas exhaust piping
And air inlet pipeline.By setting several sections of grooves independent of each other, it is ensured that even if wherein one section groove occurs vacuum leak, also will not
Influence vacuum fixture clamping silicon chip, while by setting air inlet pipeline, realizing the gas pressure between upper and lower two planes of silicon chip
It is strong poor adjustable, vacuum fixture is consolidated, safely clamp ultra thin silicon wafers.
Into (the large paper of monocrystalline silicon piece superfine grinding thinning technique experimental study [D] Dalian University of Technology such as clear school：
2009.12) vacuum cup of clamping ultra thin silicon wafers is designed for, the negative pressure produced using vacuum is by the effective sticking of silicon chip.Sucker
Matrix use pmma material, transparent with machine glass can clearly be observed that in sticking silicon chip whether with silicon chip
Justified margin.The contact surface in silicon wafer sucking disc glues last layer polishing pad simultaneously, and the smooth and polishing pad of softness can prevent ultra-thin
Silicon chip is chipping in absorption.
The Chinese invention patent of the B of Publication No. CN 103035483 discloses a kind of interim bonding for being applied to thin silicon wafer
Separating process method is conciliate, belongs to the interim adhesive method of ultra thin silicon wafers.It is as follows including step：1) in the bonding face coating the of silicon chip
One adhesive, and it is toasted；2) bonding face in slide glass is coated with second adhesive, and it is toasted；3) by silicon chip and slide glass
It is bonded temporarily；4) silicon chip back side is ground thinning；5) silicon chip back side technique is carried out；6) silicon chip and load after will be thinning
Piece is dissociated；7) first adhesive on wafer bonding face after removal is thinning；8) second on removal slide glass bonding face is glued
Mixture.The advantage that the process dissociated by both having possessed at room temperature, solves conventional laser or ultraviolet light dissociation method again
In due to adhesive can not it is too thick caused by the problem of the shoulder height of figure on wafer bonding face can not be completely covered.
For the clamping of ultra thin silicon wafers, two kinds of sides of interim bonding for including developing special fixture and ultra thin silicon wafers main at present
Case.Special fixture solves the problems, such as that vacuum suction produces unbalanced external and internal pressure poor for ultra thin silicon wafers, while ensuring ultra-thin
Silicon chip is consistent with clamp central, reduces the inhomogeneities that ultra thin silicon wafers are subsequently polished.But special fixture cannot still avoid throwing
Light pressure acts directly on the ultra thin silicon wafers back side causes the easily rupturable problem of ultra thin silicon wafers, while special fixture there is also and develop
Defect costly, that different model chemical-mechanical polishing mathing cannot be adapted to.The interim adhesive method of ultra thin silicon wafers is compared to development
Scheme for clamping the special fixture of ultra thin silicon wafers, then with adapting in different model chemical-mechanical polishing mathing, it is to avoid polishing
Pressure acts directly on the advantage of silicon chip back side.But the interim adhesive method of ultra thin silicon wafers there is following defect at present：Apply
Two-layer bonding glue is covered, the complexity of technique is not only increased, and thick increase of glue certainly will increase follow-up ultra thin silicon wafers polishing
Error；Dissociated from special bonding glue and special laser equipment, though stress when can be prevented effectively from dissociation, undoubtedly
Also corresponding process costs have been increased considerably；When sticking ultra thin silicon wafers, it is impossible to ultra thin silicon wafers are accurately positioned on carrying tablet, lead
The center deviation at carrying tablet center and ultra thin silicon wafers is caused, the inhomogeneities that ultra thin silicon wafers are subsequently polished is increased.
The content of the invention
The purpose of the present invention is directed to the above mentioned problem that the interim adhesive method of existing ultra thin silicon wafers is present, there is provided can not only solve
Certainly ultra thin silicon wafers are difficult to clamp in CMP process, breakable problem, while after effectively reducing ultra thin silicon wafers
The interim adhesive method for chemically-mechanicapolish polishing wafer level ultra thin silicon wafers of accumulation mismachining tolerance during continuous polishing.
The present invention is comprised the following steps：
1) three sections of isometrical isocentric circular arc grooves more bigger than ultra thin silicon wafers external diameter are processed on carrying tablet, and opens up three sections of overflows
Groove, overflow launder is connected with arc groove；
2) using the method for spin coating, viscose is coated on arc groove bottom, ultra thin silicon wafers is positioned and carried for arc groove；
3) hot pressing is carried out to overall silicon chip；
4) after ultra thin silicon wafers complete subsequent chemical-mechanical polishing, successively using sulfuric acid and dioxygen water mixed liquid after cooling with
Hot acetone can be completely dissolved and remove viscose, realize that ultra thin silicon wafers are separated with carrying tablet without damaged, unstressed.
In step 1) in, it is described three sections of isometrical isocentric circular arc grooves more bigger than ultra thin silicon wafers external diameter are processed on carrying tablet can
Using micro fabrication, the micro fabrication is including thermal oxide, photoetching and ultrasonic wet etching etc.；The diameter of the carrying tablet
25~50mm bigger than the diameter of ultra thin silicon wafers；The diameter of three sections of isometrical isocentric circular arc grooves is bigger than the diameter of ultra thin silicon wafers by 80~
150 μm, the depth of arc groove is 10~30 μm, and the center of arc groove is consistent with the center of carrying tablet；Overflowing on the carrying tablet
Chute is lower than arc groove 10~25 μm, and during with sharp follow-up spin coating viscose with ultra thin silicon wafers are sticked, unnecessary viscose can be by overflowing
Chute is discharged；The overall circumference of the arc groove is the 1/8~1/12 of ultra thin silicon wafers girth, is subsequently removed photoresist with profit；The ultrasound is each
From the potassium hydroxide solution that mass percent concentration is 40%~60%, etching temperature is 75~80 to anisotropy wet etching
DEG C, supersonic frequency is more than 80KHz, and ultrasonic power is 120~250W, to obtain smooth arc groove of the surface roughness less than 8nm
Bottom surface.
In step 2) in, the viscose can be using the photoresist commonly used in semiconductor technology；The thickness of viscose after the spin coating
It is 0.6~1.8 μm to spend, and the inhomogeneities of the thickness of viscose is less than 0.3% after the spin coating.
In step 3) in, the hot pressing can use precuring hot pressing and two steps of hot pressing are fully cured；The precuring
The temperature of hot pressing can be 50~70 DEG C, and pressure can be 0.8~2N/cm2, the time can be 15~60min；The temperature being fully cured
Degree can be 130~170 DEG C, and pressure can be 0.5~1.2N/cm2, the time can be 120~240min.
In step 4) in, the temperature of the sulfuric acid and dioxygen water mixed liquid can be 40~50 DEG C, handed over loose part
The glue-line of connection.
Compared with the prior art, the present invention has following outstanding advantages：
On the basis of the interim adhesive method relative advantage of ultra thin silicon wafers is ensured, innovated by related process and improved, made
Obtain the interim adhesive method of ultra thin silicon wafers has good compatibility with micro fabrication, substitutes the existing ultra thin silicon wafers side of bonding temporarily
Extraordinary consumptive material and the demand of special warfare equipment that method is used, and the mismachining tolerance of follow-up glossing accumulation is reduced, with
Obtain the ultra thin silicon wafers of high-quality.Above-mentioned purpose is based on, proposition is a kind of brand-new to surpass for chemically-mechanicapolish polishing wafer level
The interim adhesive method of thin silicon wafer.
The present invention is based on micro fabrication, the interim bonding for chemically-mechanicapolish polishing wafer level ultra thin silicon wafers for being proposed
Method, not only solves the problem that ultra thin silicon wafers are difficult to clamping in micro-nano technology, and can in CMP process
Polish pressure is avoided to act directly on the ultra thin silicon wafers back side and cause the easily rupturable problem of ultra thin silicon wafers.Simultaneously without customized special
Fixture, can meet different model chemical-mechanical polishing mathing clamp ultra thin silicon wafers demand.
The relatively existing technology of the present invention, its progress is embodied in and obtains smooth circular arc by ultrasonic anisotropic wet etch
Obtain tired when mucigel ultra-thin and in uniform thickness is conducive to reduction ultra thin silicon wafers subsequently to polish after bottom land, and photoresist spin coating
Long-pending mismachining tolerance；By three sections of isometrical isocentric circular arc groove locating super-thin silicon chips, it is ensured that ultra thin silicon wafers are consistent with carrying tablet center,
Advantageously reduce the inhomogeneities that ultra thin silicon wafers are subsequently polished；Ensuring the unstressed separate premise of ultra thin silicon wafers and carrying tablet
Under, using the photoresist commonly used in micro fabrication as viscose, and conventional chemical solvent is removed photoresist, special to substitute
Bonding glue and special laser dissociation equipment, significantly reduce process costs.
Brief description of the drawings
Fig. 1 (a)~(h) is carrying tablet micro Process step explanatory diagram.
Fig. 2 is carrying tablet.
Fig. 3 is to coat photoresist in carrying tablet.
Fig. 4 is to stick ultra thin silicon wafers on carrying tablet by photoresist.
Fig. 5 is separated for ultra thin silicon wafers are unstressed with carrying tablet after removal photoresist.
Specific embodiment
Following examples are 75 ± 3 μm 3 " as a example by ultra thin silicon wafers finally to obtain thickness.By thin silicon after chemical reduction
Piece thickness is 83 ± 3 μm, is chemically-mechanicapolish polished after thin silicon wafer bonding temporarily, and ultra thin silicon wafers are obtained after removing photoresist.
It is used to chemically-mechanicapolish polish the interim bonding side of wafer level ultra thin silicon wafers referring to Fig. 1~5, described in the embodiment of the present invention
Method, comprises the following steps：
(1) thermal oxide, extension a layer thickness is the SiO of 300nm on carrying tablet 12Film 2.Referring to Fig. 1 (a)；
(2) overflow groove location is made by lithography, and with photoresist 3 as mask, wet etching SiO2.Referring to Fig. 1 (b)；
(3) photoresist is removed, with SiO2It is mask layer, it is 60%KOH to use mass percent concentration, and temperature is 78 DEG C,
Supersonic frequency is 100KHz, and ultrasonic power is 200W, carries out the overflow launder anisotropic wet etch of Part I, etching time
It is 0.75h, corrosion depth is 16.8 μm.Referring to Fig. 1 (c)；
(4) SiO is removed2It is mask layer.Referring to Fig. 1 (d)；
(5) thermal oxide, extension a layer thickness is 1 μm of SiO on carrying tablet2Film.Referring to Fig. 1 (e)；
(6) arc groove and overflow groove location are made by lithography, and with photoresist as mask, wet etching SiO2.Referring to Fig. 1 (f)；
(7) photoresist is removed, with SiO2It is mask layer, it is 60%KOH to use mass percent concentration, and temperature is 78 DEG C,
Supersonic frequency is 100KHz, and ultrasonic power is 200W, carries out the overflow launder anisotropic wet etch of arc groove and Part II,
Etching time is 1h, and corrosion depth is 33.6 μm.I.e. the depth of arc groove is 33.6 μm, and the depth of overflow launder is 50.4 μm.
Referring to Fig. 1 (g)；
(8) SiO is removed2, carrying tablet is obtained, referring to Fig. 1 (h) and Fig. 2.Every section of radius of arc groove 4 is 38.15mm, often
Arc chord angle corresponding to section circular arc is 10 °, and every section of circular arc girth is about 8mm, and arc groove surface roughness is less than 7.8nm；In Fig. 2
In, mark 5 is overflow launder；
(9) spin coating is carried out as viscose from BP212 photoresists 3.Rotating speed 3000rpm, the time is 40s, and glue thickness is 1.3 μ
M (inhomogeneities is less than 0.2%).Referring to Fig. 3；In figure 3, mark 1 is carrying tablet；
(10) stick ultra thin silicon wafers 6, successively carry out precuring hot pressing and hot pressing is fully cured.Temperature is during precuring hot pressing
60 DEG C, pressure is 1N/cm2, time 30min.Temperature is 150 DEG C when hot pressing is fully cured, and pressure is 0.8N/cm2, the time is 3h.
Referring to Fig. 4；
(11) after ultra thin silicon wafers chemically mechanical polishing, overall silicon chip is removed photoresist.When removing photoresist, the concentrated sulfuric acid and double is first prepared
Oxygen water mixed liquid (volume ratio is 3: 1), and ice bath is cooled to 45 DEG C, with the crosslinked glue-line of loose part.Water-bath is used afterwards
50 DEG C of hot acetone solution are heated to, the glue-line that removal has loosened realizes ultra thin silicon wafers 6 and carrying tablet 1 without damaged, unstressed point
From.Referring to Fig. 5.
The present invention is based on micro fabrication, first develops carrying tablet, can be accurately positioned and carry ultra thin silicon wafers.Secondly use
The conventional photoresist of semiconductor by precuring hot pressing and is fully cured hot pressing as viscose, raising Adhesion property and viscose
Resistance to corrosion, finally improves the conventional temperature for removing sol solution, realize the ultra thin silicon wafers after chemically mechanical polishing and carrying tablet without
Damaged, unstressed separation.
The present invention includes that ultrasonic anisotropic wet etch is processed on carrying tablet and compares ultra-thin silicon using micro fabrication
Three sections of bigger isometrical isocentric circular arc grooves of piece external diameter, and open up three sections of overflow launders.Photoresist is spun on arc groove bottom as viscose,
Ultra thin silicon wafers are carried, by hot pressing, the resistance to corrosion of raising Adhesion property, and viscose.After ultra thin silicon wafers complete to polish, choosing
With the concentrated sulfuric acid after cooling and dioxygen water mixed liquid and hot acetone mixing(of viscose), realize ultra thin silicon wafers with carrying tablet without breakage point
From.The interim adhesive method of ultra thin silicon wafers proposed by the invention effectively solves the problems, such as that ultra thin silicon wafers are difficult to clamping, simple to operate,
It is applied widely.Carrying tablet Smooth bottom land and mucigel ultra-thin and in uniform thickness are conducive to reduction ultra thin silicon wafers subsequently to throw
The accumulated error of light time, ultra thin silicon wafers are consistent with carrying tablet center, advantageously reduce the inhomogeneities of follow-up polishing.
Claims (10)
1. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers, it is characterised in that comprise the following steps：
1) 80~150 μm bigger than ultra thin silicon wafers diameter of three sections of isometrical isocentric circular arc grooves are processed on carrying tablet, and opens up three
Section overflow launder, overflow launder is connected with arc groove；
2) using the method for spin coating, viscose is coated on arc groove bottom, ultra thin silicon wafers is positioned and carried for arc groove；
3) hot pressing is carried out to overall silicon chip；
4) after ultra thin silicon wafers complete subsequent chemical-mechanical polishing, successively using sulfuric acid after cooling and dioxygen water mixed liquid and heat third
Ketone can be completely dissolved and remove viscose, realize that ultra thin silicon wafers are separated with carrying tablet without damaged, unstressed.
2. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers as claimed in claim 1, it is characterised in that
In step 1) in, it is described three sections of isometrical isocentric circular arc grooves more bigger than ultra thin silicon wafers external diameter are processed on carrying tablet to use micro Process
Technique, the micro fabrication includes thermal oxide, photoetching and ultrasonic anisotropic wet etch.
3. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers as claimed in claim 1, it is characterised in that
In step 1) in, the diameter 25~50mm bigger than the diameter of ultra thin silicon wafers of the carrying tablet.
4. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers as claimed in claim 1, it is characterised in that
In step 1) in, the depth of the arc groove is 10~30 μm, and the center of arc groove is consistent with the center of carrying tablet；The carrying
Overflow launder on piece is lower than arc groove 10~25 μm；The overall circumference of the arc groove is the 1/8~1/12 of ultra thin silicon wafers girth, with
Profit is subsequently removed photoresist.
5. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers as claimed in claim 2, it is characterised in that
The ultrasonic anisotropic wet etch is from the potassium hydroxide solution that mass percent concentration is 40%~60%, etching temperature
It it is 75~80 DEG C, supersonic frequency is more than 80KHz, ultrasonic power is 120~250W, to obtain light of the surface roughness less than 8nm
Sliding circular arc groove bottom.
6. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers as claimed in claim 1, it is characterised in that
In step 2) in, the viscose is using the photoresist commonly used in semiconductor technology；After the spin coating thickness of viscose be 0.6~
1.8 μm, the inhomogeneities of the thickness of viscose is less than 0.3% after the spin coating.
7. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers as claimed in claim 1, it is characterised in that
In step 3) in, the hot pressing is using precuring hot pressing and two steps of hot pressing are fully cured.
8. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers as claimed in claim 7, it is characterised in that
The temperature of the precuring hot pressing is 50~70 DEG C, and pressure is 0.8~2N/cm2, the time is 15~60min.
9. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers as claimed in claim 7, it is characterised in that
The temperature being fully cured is 130~170 DEG C, and pressure is 0.5~1.2N/cm2, the time is 120~240min.
10. it is used to chemically-mechanicapolish polish the interim adhesive method of wafer level ultra thin silicon wafers as claimed in claim 1, it is characterised in that
In step 4) in, the temperature of the sulfuric acid and dioxygen water mixed liquid is 40~50 DEG C.
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| CN201610217363.XA CN105800547B (en) | 2016-04-08 | 2016-04-08 | Interim adhesive method for chemically-mechanicapolish polishing wafer level ultra thin silicon wafers |
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| CN110349847B (en) * | 2018-04-08 | 2022-11-04 | 上海新微技术研发中心有限公司 | Method for bonding through bonding material and bonding structure |
| CN111816604B (en) * | 2020-08-18 | 2021-03-12 | 北京智创芯源科技有限公司 | Wafer etching method |
| CN115028139B (en) * | 2022-05-10 | 2023-05-16 | 美满芯盛(杭州)微电子有限公司 | Separation method of MEMS silicon strain gauge |
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| JP3768069B2 (en) * | 2000-05-16 | 2006-04-19 | 信越半導体株式会社 | Thinning method of semiconductor wafer |
| JP4844086B2 (en) * | 2005-10-28 | 2011-12-21 | 三菱電機株式会社 | Semiconductor manufacturing method and satellite |
| JP2007243167A (en) * | 2006-02-09 | 2007-09-20 | Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 | Susceptor and apparatus for manufacturing epitaxial wafer |
| CN201126815Y (en) * | 2007-12-25 | 2008-10-01 | 中国电子科技集团公司第四十五研究所 | Device for positioning wafer center |
| CN103165502A (en) * | 2011-12-14 | 2013-06-19 | 无锡华瑛微电子技术有限公司 | Wafer tray and wafer box |
| CN103035581A (en) * | 2012-07-24 | 2013-04-10 | 上海华虹Nec电子有限公司 | Silicon slice temporary bonding method |
| CN103035580B (en) * | 2012-07-24 | 2015-06-03 | 上海华虹宏力半导体制造有限公司 | Temporary bonding and dissociating process method applied to thin silicon slices |
| CN103035483B (en) * | 2012-08-28 | 2015-10-14 | 上海华虹宏力半导体制造有限公司 | A kind of interim bonding being applied to thin silicon wafer conciliates separating process method |
| CN104810317B (en) * | 2014-01-23 | 2017-10-27 | 无锡华润上华科技有限公司 | Wafer deep groove etching method |
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