CN105704418B - MIPI picture signals are converted into the device and method of LVDS picture signals - Google Patents

MIPI picture signals are converted into the device and method of LVDS picture signals Download PDF

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CN105704418B
CN105704418B CN201610152211.6A CN201610152211A CN105704418B CN 105704418 B CN105704418 B CN 105704418B CN 201610152211 A CN201610152211 A CN 201610152211A CN 105704418 B CN105704418 B CN 105704418B
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mipi
signals
module
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lvds
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CN105704418A (en
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徐梦银
朱亚凡
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Wuhan Jingce Electronic Group Co Ltd
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Wuhan Jingce Electronic Group Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0125Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level one of the standards being a high definition standard
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0127Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

The invention discloses the device and method that a kind of MIPI picture signals are converted into LVDS picture signals, this method includes:1) 0 channel signals of MIPI lane and MIPI lane data-signals are received;It parses 0 channel signals of MIPI lane and obtains MIPI data channel physical layer coding informations, parse the MIPI lane data-signals and obtain MIPI data channel quantity informations;2) MIPI lane data-signals progress physical layer decoding process is obtained by MIPI image data packets according to the MIPI data channel physical layer coding information;3) the MIPI image datas packet is converted by rgb signal according to the MIPI data channel quantity information;4) rgb signal is divided by multilink rgb signal according to LVDS configuration orders;5) the multilink rgb signal is converted into multilink LVDS picture signals.The present invention can support that the MIPI signals input of all specifications, standard, the electrical parameter for the LVDS signals that the LVDS signals of a variety of link transmission modes can be supported to export, and exported are not influenced by MIPI signals.

Description

MIPI picture signals are converted into the device and method of LVDS picture signals
Technical field
The present invention relates to technical field of image signal processing, and LVDS images are converted into particular to a kind of MIPI picture signals The device and method of signal.
Background technology
MIPI interfaces (mobile industry processor interface) are a kind of Novel movable equipment that can support 2560x1600 resolution ratio Display interface, interface are transmitted image correlated condition, are controlled information by lane (channel) data-signal of transmission image data (channel 0) channel signals of lane 0 and clock clock signals composition.
But the display module of mainstream is due to the various originals such as production, technology, price, Consumers' Acceptance currently on the market Because remaining in the interface of LVDS signals (Low-Voltage Differential Signaling low-voltage differential signals) In standard, because LVDS signal standards is very ripe, picture display effect is also relatively good, the operation is stable, and by using More link transmission modes such as single link (link), double link, four link, eight link can equally show the figure of various high definition resolution ratio Picture.And it is high with the novel display module price that receives MIPI signals, kind and manufacturer are less, display effect and stability It is all not good enough.
For this reason, it may be necessary to which the various MIPI picture signals of input can be converted into that the LVDS of different characteristics can be transmitted by a kind of equipment Picture signal in LVDS display modules come for showing image.
Invention content
In view of the above shortcomings of the prior art, the present invention discloses a kind of MIPI picture signals and is converted into LVDS picture signals Device and method, the present invention can support the MIPI signals input of all specifications, standard, can export a variety of link transmission modes LVDS signals, and the electrical parameter of LVDS signals exported is not influenced by MIPI signals.
Technical solution is used by realizing the object of the invention:A kind of MIPI picture signals are converted into LVDS picture signals Device, including the control module, MIPI auxiliary signals parsing module, the MIPI data that are set in a programmable logic device are believed Number parsing module, image data Packet analyzing module, rgb signal conversion module, LVDS transmission links segmentation module and LVDS images Signal conversion module;Wherein,
The MIPI auxiliary signals parsing module parses the MIPI for receiving 0 channel signals of MIPI lane 0 channel signals of lane obtain MIPI data channel physical layer coding informations;
The MIPI data-signals parsing module parses the MIPI lane for receiving MIPI lane data-signals Data-signal obtains MIPI data channel quantity informations;
Described image resolve packet module is used for will be described according to the MIPI data channel physical layer coding information MIPI lane data-signals are parsed into MIPI image data packets;
The rgb signal conversion module is used for the MIPI image datas according to the MIPI data channel quantity information Packet is converted into rgb signal;
The LVDS transmission links segmentation module is used to the rgb signal being divided into multilink rgb signal;
The LVDS picture signals conversion module is used to the multilink rgb signal being converted into multilink LVDS images letter Number;
The control module for realizing the control instruction of all functional modules in the programmable logic device transmission With issue.
Preferably, in said program, link that the LVDS picture signals conversion module is issued according to the control module Number, transmission coding mode, color range bit, the transmission configuration such as driving capability and preemphasis parameter state multilink LVDS to output Picture signal is configured.
In addition, the present invention also provides a kind of method that MIPI picture signals are converted into LVDS picture signals, including following step Suddenly:
Step 1:Receive 0 channel signals of MIPI lane and MIPI lane data-signals;Parse the MIPI lane 0 Channel signal obtains MIPI data channel physical layer coding informations, parses the MIPI lane data-signals and obtains MIPI data Number of channels information;
Step 2:The MIPI lane data-signals are subjected to object according to the MIPI data channel physical layer coding information Reason layer decoder handles to obtain MIPI image data packets;
Step 3:The MIPI image datas packet is converted into rgb signal according to the MIPI data channel quantity information;
Step 4:The rgb signal is divided into multilink rgb signal according to LVDS configuration orders;
Step 5:The multilink rgb signal is converted into multilink LVDS picture signals.
Preferably, in said program, step 1 is further comprising the steps of:MIPI clock clock signals are received, and parse institute It states MIPI clock clock signals and obtains MIPI message transmission rates, MIPI numbers are recovered according to the MIPI message transmission rates According to the reception clock in channel, and according to the MIPI lane data-signals after the reception clock output calibration.
The present invention has the following advantages:
(1) the MIPI picture signals of input can be converted into the LVDS images letter of a variety of link transmission patterns by the present invention Number.
(2) present invention can support the input of all specifications, the MIPI picture signals of standard, being capable of automatic identification MIPI figures As the data channel number of signal, message transmission rate.
(3) associated control parameters (such as the LVDS link numbers, VESA JEIDA for the LVDS picture signals that the present invention is exported Transmission coding mode, LVDS color ranges bit, transmission driving capability, preemphasis etc.) it can be arranged by upper layer software (applications), and input MIPI picture signals are unrelated, export the electrical parameter of LVDS picture signals and do not influenced by input MIPI picture signals.
Description of the drawings
Fig. 1 is the apparatus structure block diagram that MIPI picture signals of the present invention are converted into LVDS picture signals.
Fig. 2 is the method flow diagram that MIPI picture signals of the present invention are converted into LVDS picture signals.
Specific implementation mode
The following further describes the present invention in detail with reference to the accompanying drawings and specific embodiments.
The programmable logic device of the present embodiment selects FPGA.
As shown in Figure 1, the device that a kind of MIPI picture signals disclosed by the invention are converted into LVDS picture signals includes setting Set control module (1) in a fpga chip, MIPI auxiliary signals parsing module (2), MIPI data-signal parsing modules (3), image data Packet analyzing module (4), rgb signal conversion module (5), LVDS transmission links segmentation module (6) and LVDS figures As signal conversion module (7), transmission sequence synchronization module (8) and MIPI signal detection modules (9), wherein MIPI signal detections Module (9) is connect with outside MIPI image signal sources, and LVDS picture signals conversion module (7) is connect with LVDS modules to be measured, control Molding block (1) is connect with host computer.
In above-described embodiment, MIPI auxiliary signals parsing module (2) include 0 channels MIPI lane termination matching module, Physical layer transmission decoder module and formation-decoding module;MIPI data-signals parsing module (3) includes MIPI data channel termination Matching module, data channel quantity detection module and transmission rate detection module;Image data Packet analyzing module (4) includes data Channel clock recovery module, MIPI signal transfer modes detection module, physical layer transmission decoder module and data transmission descramble mould Block;Rgb signal conversion module (5) includes image data solution module, image header parser module, rgb image data packet decoding mould Block, RGB image sequence generation module, rgb image data cache module, RGB image generation module;LVDS transmission links divide mould Block (6) includes rgb signal cache module, LVDS data link segmentation module and LVDS image transmitting coding modules;LVDS images Signal conversion module (7) includes LVDS image transmitting string modules and LVDS picture signal output modules;Transmit sequence synchronization mould Block (8) includes that image transmitting synchronizing sequence detection module and image receive synchronization module.
The signal conversion process of above-described embodiment is described further with reference to Fig. 2.
In above-described embodiment, host computer after the power is turned on configures LVDS transmission configurations parameter and LVDS sequential in apparatus of the present invention Parameter is handed down to control module (1).
In above-described embodiment, MIPI signal detection modules (9) are used to receive the MIPI of external MIPI image signal sources input 0 channel signals of lane, MIPI lane data-signals and MIPI clock clock signals, and detect 0 channels MIPI lane letter Number, the connection status Real-time Feedback of MIPI lane data-signals and MIPI clock clock signals give control module (1), when The connection shape of 0 channel signals of MIPI lane, MIPI lane data-signals and MIPI clock clock signals is normal, controls mould Block (1) can start other function modules and carry out corresponding signal conversion operation, and the signal that otherwise can stop other function modules turns Operation is changed, leads to the interference to exporting LVDS signals so as to avoid the incoming apparatus of the present invention of external noise signal.
In above-described embodiment, when MIPI signal detection modules (9) receive 0 channel signals of MIPI lane, MIPI lane After data-signal and MIPI clock clock signals, 0 channel signals of MIPI lane are then sent to 0 channels MIPI lane MIPI lane data-signals are sent to MIPI data channel termination matching modules, when by MIPI clock by termination matching module Clock signal is sent to transmission rate detection module.
In above-described embodiment, 0 channel signals of MIPI lane are terminated in 0 channels MIPI LANE termination matching module Matching carries out physics decoding to receive feeding physical layer transmission decoder module after best 0 channel signals of MIPI lane Then data feeding formation-decoding module is parsed, is obtained to restore 0 channel datas of MIPI lane by operation It is sent into control module (1) after MIPI data channel physical layer coding informations and MIPI data channel scrambling scrambling sequence.MIPI Matching, equalization operation is terminated to MIPI lane data-signals in data channel termination matching module, best to receive It is respectively fed in data channel quantity detection module and data channel clock recovery module after MIPI lane data-signals, data Number of channels detection module is detected the data channel quantity for being sent into signal, and testing result is sent into control module (1). Simultaneous transmission rate detection module parses the MIPI clock clock signals and obtains MIPI message transmission rates, and detection is tied Fruit is sent into control module (1).Since different message transmission rates corresponds to different MIPI signal standards, apparatus of the present invention It can be with the MIPI picture signals of automatic identification difference MIPI standards.
In above-described embodiment, data channel clock recovery module receives what MIPI data channel termination matching modules were sent out After MIPI lane data-signals, control module (1) issues transmission rate detection module feedback to data channel clock recovery module Message transmission rate, data channel clock recovery module recovers the reception of each data channel of MIPI according to message transmission rate Clock, each data channel of MIPI receive clock recovery according to it and go out the transmission data in each data channel of MIPI (to overcome Distortion of the data in transmission process) and to the MIPI lane data after MIPI signal transfer mode detection module output calibrations Signal.MIPI signal transfer modes detection module is parsed to obtain high-speed mode to the MIPI lane data-signals received Signal clock or low-power consumption mode conversion timing sequence parameter, when detecting that MIPI signals are in high-speed mode, MIPI signal transmissions High-speed mode signal clock and MIPI lane data-signals can be sent into physical layer transmission decoder module by mode detection module;When When detecting that MIPI signals are in low-power consumption mode, MIPI signal transfer modes detection module send MIPI lane data-signals Enter physical layer transmission decoder module, low-power consumption mode conversion timing sequence parameter is sent into and control module (1).Physical layer transmission decodes The MIPI data channel physical layer coding informations that module is sent according to high-speed mode signal clock and control module (1), Huo Zhegen The low-power consumption mode conversion timing sequence and MIPI data channel physical layer coding informations sent according to control module (1) is to MIPI lane Data-signal carries out physical layer decoding operate, exports MIPI image datas packet and gives data transmission descrambling module.Data transmission descrambles The MIPI data channel scrambling scrambling sequence that module is issued according to control module (1) carries out the MIPI image data packets received Scramble process, MIPI image datas packet after being descrambled simultaneously are sent into image transmitting synchronizing sequence detection module.
In above-described embodiment, transmission sequence of the image transmitting synchronizing sequence detection module to the MIPI image data packets received Row are detected, and the transmission sequence issued with control module (1) is compared, when the transmission sequence of MIPI image data packets accords with When closing the transmission sequence that control module (1) issues, image, which receives synchronization module, to synchronize processing to MIPI image data packets, And the MIPI image data packets after synchronization process are sent into image data solution module.Image data solution module is to the MIPI that receives Image data packet carries out de-packaging operation, obtains the image data in header packet information and packet, and is respectively fed to image packet header solution Analyse module, rgb image data packet decoder module.Image header parser module parses data packet head to obtain data packet head Decoded information and command word are sent into control module (1), and control module (1) is according to these command words, decoded information and MIPI numbers MIPI data decoding operates are completed according to number of channels control rgb image data packet decoder module, to obtain rgb image data, Rgb image data cache module is sent to again to be cached, meanwhile, control module (1) is under RGB image sequence generation module LVDS time sequence parameters are sent out, RGB image sequence generation module generates corresponding RGB clock signals according to LVDS time sequence parameters (VSync, HSync, DE) and it is sent into RGB image generation module.RGB image generation module, will under the control of RGB clock signals The image data of rgb image data cache module caching is taken out, and to which output is at the RGB image signal of standard, and is sent into RGB letters Number cache module is cached.
In above-described embodiment, LVDS data link is divided module and is read according to the LVDS number of links that control module (1) issues The RGB image signal of rgb signal cache module is divided into respectively into line link dividing processing, while by what RGB clock signals synchronized In a data link.LVDS image transmittings coding module transmits coding mode (such as according to the LVDS that control module (1) issues VESA, JEIDA), color range bit (6bit, 8bit, 10bit, 12bit), the multilink rgb signal is encoded, output it is more Link LVDS coded datas.
In above-described embodiment, the LVDS configured transmissions that LVDS image transmitting string modules are issued according to control module (1) are (such as LVDS clock transfer bit patterns, LVDS transmit stringization factor etc.) multilink LVDS coded datas are subjected to stringization processing, output Multilink LVDS picture signals;The LVDS configured transmissions that LVDS picture signals output module is issued according to control module (1) are (such as LVDS driving intensities, LVDS preemphasis, LVDS output impedances, LVDS output delays etc.) multilink LVDS picture signals are carried out Adjustment, to the multilink LVDS picture signals after LVDS modules output adjustment to be measured.
The content that this specification is not described in detail belongs to the prior art well known to professional and technical personnel in the field.This field Technical staff be readily appreciated that the foregoing is merely illustrative of the preferred embodiments of the present invention, be not intended to limit the invention, it is all All any modification, equivalent and improvement made by within the spirit and principles in the present invention etc. should be included in the protection of the present invention Within the scope of.

Claims (10)

1. a kind of MIPI picture signals are converted into the device of LVDS picture signals, which is characterized in that can be compiled including being set to one Control module (1), MIPI auxiliary signals parsing module (2), MIPI data-signals parsing module (3), figure in journey logical device As resolve packet module (4), rgb signal conversion module (5), LVDS transmission links segmentation module (6), LVDS picture signals turn Change the mold block (7) and transmission sequence synchronization module (8);Wherein,
The MIPI auxiliary signals parsing module (2) parses the MIPI for receiving 0 channel signals of MIPI lane 0 channel signals of lane obtain MIPI data channel physical layer coding informations;
The MIPI data-signals parsing module (3) parses the MIPI lane for receiving MIPI lane data-signals Data-signal obtains MIPI data channel quantity informations;And for receiving MIPI clock clock signals, and described in parsing MIPI clock clock signals obtain MIPI message transmission rates;
Described image resolve packet module (4) is used to recover MIPI data channel according to the MIPI message transmission rates Receive clock, the MIPI lane data-signals after output calibration;And for being encoded according to the MIPI data channel physical layer MIPI lane data-signals after correction are parsed into MIPI image data packets by information;
The transmission sequence synchronization module (8) is used to detect the transmission sequence of the MIPI image datas packet, and to the MIPI The transmission sequence of image data packet synchronizes processing;
The rgb signal conversion module (5) is used for the MIPI after synchronization process according to the MIPI data channel quantity information Image data packet is converted into rgb signal;
The LVDS transmission links segmentation module (6) is used to the rgb signal being divided into multilink rgb signal;
The LVDS picture signals conversion module (7) is used to the multilink rgb signal being converted into multilink LVDS images letter Number;
The control module (1) for realizing the transmission of the control instruction of all functional modules in the programmable logic device and It issues.
2. MIPI picture signals according to claim 1 are converted into the device of LVDS picture signals, which is characterized in that described MIPI auxiliary signals parsing module (2) includes 0 channels MIPI lane termination matching module, physical layer transmission decoder module and letter Cease decoder module;Wherein,
0 channels the MIPI lane termination matching module to 0 channel signals of MIPI lane for being terminated matching;
The physical layer transmission decoder module is used to carry out physics decoding, reduction to 0 channel signals of MIPI lane after matching Go out 0 channel datas of MIPI lane;
Described information decoder module is used to carry out data parsing to 0 channel datas of MIPI lane, obtains the MIPI numbers According to channel physical layer coding information.
3. MIPI picture signals according to claim 2 are converted into the device of LVDS picture signals, which is characterized in that described MIPI data-signals parsing module (3) includes MIPI data channel termination matchings module, data channel quantity detection module;Its In,
The MIPI data channel termination matching module to the MIPI lane data-signals for being terminated matching;
The MIPI lane data-signals that the data channel quantity detection module is used to detect after matching obtain the MIPI data Number of channels information.
4. MIPI picture signals according to claim 3 are converted into the device of LVDS picture signals, which is characterized in that described MIPI data-signals parsing module (3) further includes transmission rate detection module, and described image resolve packet module (4) includes number According to channel clock recovery module, MIPI signal transfer modes detection module and physical layer transmission decoder module;Wherein,
The transmission rate detection module parses the MIPI clock clocks letter for receiving MIPI clock clock signals Number obtain MIPI message transmission rates;
The data channel clock recovery module receives the MIPI lane data-signals after matching and is passed according to the MIPI data Defeated rate recovery goes out the reception clock of MIPI data channel, the MIPI lane data-signals after output calibration;
The MIPI lane data-signals that the MIPI signal transfer modes detection module is used to parse after the correction obtain high speed Mode signal clock or low-power consumption mode conversion timing sequence parameter;
The physical layer transmission decoder module is used for according to the MIPI data channel physical layer coding information, and according to the height Fast mode signal clock or low-power consumption mode conversion timing sequence parameter carry out physics to the MIPI lane data-signals after the correction Layer decoder exports the MIPI image datas packet.
5. MIPI picture signals according to claim 4 are converted into the device of LVDS picture signals, which is characterized in that described Formation-decoding module is additionally operable to carry out data parsing to 0 channel signals of MIPI lane, obtains the scrambling of MIPI data channel Scrambling sequence;Described image resolve packet module (4) further includes data transmission descrambling module;Wherein,
The data transmission descrambling module is used to scramble scrambling sequence to the MIPI picture numbers according to the MIPI data channel Scramble process, the MIPI image data packets after being descrambled are carried out according to packet.
6. MIPI picture signals according to claim 5 are converted into the device of LVDS picture signals, which is characterized in that described LVDS transmission links segmentation module (6) includes rgb signal cache module, LVDS data link segmentation module and LVDS image transmittings Coding module;Wherein,
The rgb signal cache module is for caching the rgb signal;
The LVDS data link segmentation module is used to the rgb signal being divided into multilink rgb signal;
For being encoded to the multilink rgb signal, output multilink LVDS is compiled the LVDS image transmittings coding module Code data.
7. MIPI picture signals according to claim 6 are converted into the device of LVDS picture signals, which is characterized in that described LVDS picture signals conversion module (7) includes LVDS image transmitting string modules and LVDS picture signal output modules;Wherein,
The LVDS image transmittings string module is used to carry out stringization processing to the multilink LVDS coded datas, exports multichain Road LVDS picture signals;
The LVDS picture signals output module to the multilink LVDS signals for being transmitted Mass adjust- ment, output adjustment Multilink LVDS picture signals afterwards.
8. MIPI picture signals according to claim 4 are converted into the device of LVDS picture signals, which is characterized in that also wrap The MIPI signal detection modules (9) being set in the programmable logic device are included, the MIPI signal detection modules (9) are used for 0 channel signals of MIPI lane, the MIPI lane data-signals and the MIPI clock clock signals are inputted, and To 0 channel signals of MIPI lane, the MIPI lane data-signals described in the control module (1) Real-time Feedback and described The input state of MIPI clock clock signals.
9. a kind of method that MIPI picture signals are converted into LVDS picture signals, which is characterized in that include the following steps:
Step 1:Receive 0 channel signals of MIPI lane, MIPI lane data-signals and MIPI clock clock signals;Parsing 0 channel signals of MIPI lane obtain MIPI data channel physical layer coding informations, parse the MIPI lane data letter Number MIPI data channel quantity informations are obtained, parses the MIPI clock clock signals and obtain MIPI message transmission rates;
Step 2:The reception clock of MIPI data channel is recovered according to the MIPI message transmission rates, after output calibration MIPI lane data-signals;And according to the MIPI data channel physical layer coding information by the MIPI lane data after correction Signal carries out physical layer decoding process and obtains MIPI image data packets;
The transmission sequence of the MIPI image datas packet is detected, and the transmission sequence of the MIPI image datas packet is synchronized Processing;
Step 3:The MIPI image data packets after synchronization process are converted into RGB letters according to the MIPI data channel quantity information Number;
Step 4:The rgb signal is divided into multilink rgb signal according to LVDS configuration orders;
Step 5:The multilink rgb signal is converted into multilink LVDS picture signals.
10. the method that MIPI picture signals according to claim 9 are converted into LVDS picture signals, which is characterized in that institute It is further comprising the steps of to state step 1:MIPI clock clock signals are received, and parses the MIPI clock clock signals and obtains MIPI message transmission rates, recover the reception clock of MIPI data channel according to the MIPI message transmission rates, and according to The MIPI lane data-signals received after clock output calibration.
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