CN105573924A

CN105573924A - Simulation system

Info

Publication number: CN105573924A
Application number: CN201410528021.0A
Authority: CN
Inventors: 许国泰
Original assignee: Shanghai Huahong Integrated Circuit Co Ltd
Current assignee: Shanghai Huahong Integrated Circuit Co Ltd
Priority date: 2014-10-09
Filing date: 2014-10-09
Publication date: 2016-05-11
Anticipated expiration: 2034-10-09
Also published as: CN105573924B

Abstract

The invention discloses a simulation system. A simulation chip performs reading and writing operation on an SRAM (Static Random Access Memory) through a first standard data/address bus; a management module receives instructions from an integrated development environment through a communication interface; the SRAM is subjected to reading and writing operation through the first standard data/address bus; the simulation chip is controlled to enter or exit a reset state through control signals; a nonvolatile memory is subjected to reading and writing operation through a second standard data/address bus; a user sends a data storage instruction to the management module through the communication interface on the integrated development environment; after the simulation chip enters the reset state, the SRAM cannot be operated through the first standard data/address bus; and after the simulation chip exits the reset state, the simulation chip can operate the SRAM through the first standard data/address bus. The simulation system has the advantages that the SRAM is used for replacing the nonvolatile memory of the chip, and the characteristic that power failure data of the nonvolatile memory cannot be lost is realized through equivalent simulation.

Description

Analogue system

Technical field

The present invention relates to emulator field, particularly relate to a kind of analogue system.

Background technology

Have the user program of User Exploitation in processor chips, in the writing and debug of user program, the instrument used is generally processor chips emulator.The emulation chip comprising product treatment device chip various functions is used in emulator, for the work behavior of analog equipment processor chips, emulation chip and emulator miscellaneous part (deposit the program storage of user program, the data-carrier store of store data, and the Integrated Development Environment etc. on user computer) coordinate and realize the simulation run of user program and every debug function.

Because the memory characteristics of the same family chip product of chip manufacturer and size may be different, consider mainly to pay close attention to function debugging when using emulator debug user program simultaneously, do not pay close attention to the performance of storer, the existing emulator for same family chip is same emulator systems normally, adopt SRAM (StaticRandomAccessMemory, static RAM) carry out to be used as in equivalent substitution product chips the nonvolatile memory of the various characteristics of program storage and data-carrier store, comprise EEPROM (ElectricallyErasableProgrammableRead-OnlyMemory, EEPROM (Electrically Erasable Programmable Read Only Memo)), the nonvolatile memories such as FLASH (flash memory), in reading, perform user program, and write, when reading data, functionally equivalent.Simultaneously, reading-writing life-span due to SRAM is general all much larger than nonvolatile memory, in view of the feature that emulator often will be downloaded and read user program, read and write data, in emulator, use the nonvolatile memory of SRAM equivalent substitution product chips can extend the serviceable life of emulator as program storage and data-carrier store.SRAM read or write speed is generally higher than nonvolatile memory simultaneously, also contribute to improving debugging efficiency (download program speed, execution speed, reading and writing data speed etc.), therefore, all that this way is rational using the nonvolatile memory of SRAM equivalent substitution product chips as program storage and data-carrier store in existing emulator.

But nonvolatile memory, except read-write erasing waits functional characteristic, also has the characteristic that data power down is not lost; And loss of data after SRAM power down, characteristic cannot do not lost by direct modeling power failure data.If under emulator after electricity, make SRAM enter non-slice and select state, and use battery to power to SRAM, although the characteristic of the power down not obliterated data of equivalence can be made it have, but because the existence of SRAM quiescent current, battery makes for a long time have more than is needed, it is not a good solution.If substitute SRAM with nonvolatile memories such as Flash, because read-write sequence is different with operating characteristic, page varies in size, and also must do comparatively complicated interface conversion work, consuming time and affect stability.

Summary of the invention

The technical problem to be solved in the present invention is to provide a kind of analogue system, and use SRAM to substitute the nonvolatile memory of chip, the power failure data that analog equivalent realizes nonvolatile memory is not lost, the characteristic that data when re-powering rear power down last time still exist.

For solving the problems of the technologies described above, analogue system of the present invention, the Integrated Development Environment comprising processor chips emulator and install on computers; Described processor chips emulator comprises emulation chip, SRAM memory, administration module, nonvolatile memory;

Described emulation chip carries out read-write operation by the first normal data/address bus to SRAM memory; Described administration module receives instruction by communication interface from Integrated Development Environment; This administration module carries out read-write operation by the first normal data/address bus to SRAM memory; Described administration module is entered by control signal control imitation chip or is exited reset mode; This administration module carries out read-write operation by the second normal data/address bus to nonvolatile memory;

User sends preservation data command by communication interface to administration module in described Integrated Development Environment; After emulation chip enters reset mode, not by the first normal data/address bus operation SRAM memory; After emulation chip exits reset mode, emulation chip is by the first normal data/address bus operation SRAM memory.

Owing to adopting analogue system of the present invention, while continuation uses SRAM to substitute the nonvolatile memory of chip, the power failure data that analog equivalent achieves nonvolatile memory is not lost, the characteristic that data when re-powering rear power down last time still exist.While the life-span that ensure that emulator entirety, the power failure data simulating again nonvolatile memory does not lose characteristic.Facilitate the exploitation of user program, debugging and test, contribute to improving code development efficiency.

Accompanying drawing explanation

Below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation:

Accompanying drawing is the structural representation of described analogue system.

Embodiment

As shown in the figure, described emulator systems comprises processor chips emulator 1 and installation Integrated Development Environment 6 on computers.Described processor chips emulator 1 comprises emulation chip 2, SRAM memory 3, administration module 4, nonvolatile memory 5.Described SRAM memory 3 is connected with emulation chip 2 and administration module 4 respectively by the first normal data/address bus 7, described administration module 4 carries out communication by communication interface 8 and the Integrated Development Environment 6 of installing on computers, and described administration module 4 is connected with nonvolatile memory 5 by the second normal data/address bus 9.

Emulation chip 2 carries out read-write operation by the first normal data/address bus 7 pairs of SRAM memory 3; Administration module 4 receives instruction by communication interface 8 from Integrated Development Environment 6.Administration module 4 carries out read-write operation by the first normal data/address bus 7 pairs of SRAM memory 3.Administration module 4 is entered by control signal 10 control imitation chip 2 or is exited reset mode.Administration module 4 carries out read-write operation by the second normal data/address bus 9 pairs of nonvolatile memories 5.Administration module 4 can use general processor chip to realize, and nonvolatile memory 5 can select general Flash, EEPROM etc.

Under analogue system before electricity, user sends preservation data command by communication interface 8 to administration module 4 in Integrated Development Environment 6, administration module 4 enters reset mode by control signal 10 control imitation chip 2, after entering reset mode, emulation chip 2 does not operate SRAM memory 3 by the first normal data/address bus 7, administration module 4 reads out all data by the first normal data/address bus 7 from SRAM, then by the second normal data/address bus 9, these data is all write in nonvolatile memory 5.Analogue system re-powers, first administration module 4 enters reset mode by control signal 10 control imitation chip 2, emulation chip 2 is made not operate SRAM memory 3 by the first normal data/address bus 7, then administration module 4 reads out all data by the second normal data/address bus 9 from nonvolatile memory 5, then by the first normal data/address bus 7, these data is all write in SRAM memory 3.Last administration module 4 exits reset mode by control signal 10 control imitation chip 2, and after exiting reset mode, emulation chip 2 operates SRAM memory 3 by the first normal data/address bus 7.

Like this, under analogue system before electricity, the data in the SRAM memory 3 of analog chip nonvolatile memory are all saved in the nonvolatile memory 5 of emulator, can not lose; After analogue system re-powers, first these data are automatically restored in SRAM memory 3, and then emulation chip 2 just starts to operate SRAM memory 3.

The foregoing is only the specific embodiment of the present invention and embodiment, scope is not limited thereto.

Claims

1. an analogue system, is characterized in that: the Integrated Development Environment comprising processor chips emulator and install on computers; Described processor chips emulator comprises emulation chip, SRAM memory, administration module, nonvolatile memory;

2. analogue system as claimed in claim 1, it is characterized in that: under analogue system before electricity, user sends preservation data command by communication interface to administration module in Integrated Development Environment, and administration module enters reset mode by control signal control imitation chip; Administration module reads out all data by the first normal data/address bus from SRAM, then by the second normal data/address bus, these data is all write in nonvolatile memory; Analogue system re-powers, first administration module enters reset mode by control signal control imitation chip, then administration module reads out all data by the second normal data/address bus from nonvolatile memory, then by the first normal data/address bus, these data is all write in SRAM memory; Last administration module exits reset mode by control signal control imitation chip.