CN102117243A - Method for high efficiently debugging by using software breakpoint in Flash memory - Google Patents
Method for high efficiently debugging by using software breakpoint in Flash memory Download PDFInfo
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Abstract
The invention relates to a method for high efficiently debugging by using software breakpoint in a Flash memory. A Flash software breakpoint management controller, a Flash procedure downloader and an instruction resolver are arranged in a debugger; the debugger is connected to a target processing system through an ICE (internet communications engine); the debugger is used for controlling the target processing through the ICE, acquiring and modifying the state of a processor, and reading the data of the Flash memory; and the Flash software breakpoint management controller is used for storing and managing the Flash software breakpoint information, controlling the Flash software breakpoint state transition, controlling the operations of creating, deleting, recovering, shielding, enabling and updating the Flash software breakpoint, and controlling the implement of exchanging instruction sets. By using the method for high efficiently debugging by using software breakpoint in a Flash memory, the debugging time is shortened by reducing the Flash erasing operation; especially, the proceeding running from the Flash software breakpoint is as quick as the operation of arranging the software breakpoint in a RAM (random-access memory); the service life is influenced by the Flash erasing operation, thereby being capable of efficiently increasing the service life of Flash by reducing the Flash erasing operation.
Description
Technical field
The present invention relates to be used for the debug function of Integrated Development Environment of processor program exploitation and a kind of improvement of instrument, especially a kind of method of in the Flash storer, using the software breakpoint debugging efficiently.
Background technology
Debugged program is program development personnel operation by control program in the development sequence process, stop, single step, interrupt and check means such as state, find and the correction program in mistake or fault.On-line debugging is a kind ofly program to be downloaded to a kind of means of debugging on the goal systems by ICE.
Breakpoint is that control program is carried out a kind of important means of interrupting, and can be divided into Hardware Breakpoint and software breakpoint by its principle.Hardware Breakpoint needs the support of processor internal circuit, usually trigger the interruption of processor operation by comparator circuit, this mode need consume a large amount of hardware resources, therefore the number of Hardware Breakpoint is very limited in most of processors, supports two Hardware Breakpoints at most as the ARM7/9 kernel; Realize by the break-poing instruction of processor term of execution that software breakpoint being based on program, when processor is carried out break-poing instruction, or produce and enter debugging mode unusually, or stop processor, thereby reach the effect that interrupt routine is carried out.
The setting of software breakpoint and cancellation operation are what to finish by the mode of replacement instruction.In the time need software breakpoint being set in the somewhere of program, debugger earlier should locate the code preservation of reading back by ICE and back up, and then the break-poing instruction code was write this address, covered original code data; When processor runs to this address, just can produce interruption, reach the purpose of control operation; When needs continue operation, then need to cancel breakpoint, the method for cancellation is exactly to recover this place's instruction code of original backup.The advantage of software breakpoint is that it is not subject to processing the restriction of device hardware resource, and unlimited a plurality of breakpoint can be set, and making does not increase hardware resource under the needs that satisfy the chip on-line debugging, thereby is widely used in on-line debugging.
But, traditional software breakpoint can only be located at this class of RAM simply in the storer of random writing, and along with the system code amount is increasing, chip cost requires more and more lower, just require system directly to carry out commissioning test, therefore the requirement that software breakpoint is set is become very urgent in the Flash storer at nonvolatile memories such as Flash.
The writing mode of Flash storer is different from RAM, before writing, must wipe earlier Flash, and the unit of wiping is not with byte or word usually, but be the unit with sector sector, SST39VF1601 sector-size 4KB is so during setting/cancellation software breakpoint, at first will read the content of whole sector in Flash, revise breakpoint address place content, all the elements are write together after wiping whole sector then.This is the long time of action need of the reading-revise of unit-write by the sector, and influences the Flash life-span.
The technical scheme of existing correlation technique:
1. in order to solve the problem that software breakpoint is difficult to realize is set in nonvolatile memory, a kind of method that is used for the software breakpoint that uses with storage arrangement has been proposed, this method is actually the hardware of software breakpoint and realizes, it need revise the structure of existing processor, judge whether to be breakpoint address by the decoding processor system address, if be breakpoint address, then processor is not got finger from nonvolatile memory, and from the software breakpoint management device, read break-poing instruction, carry out the back and produce interruption.Although this method can solve the problem that software breakpoint is set in nonvolatile memory, but it has revised processor structure, increased complicacy, and each software breakpoint needs all hardware circuit to realize, can only limited software breakpoint be set according to hardware resource.
2. most of at present simulating developer platform of debugging in Flash comprises that Integrated Development Environment and ICE adopt Hardware Breakpoint to realize debugging, as RealView MDK+ULINK; There is the partial simulation development platform to begin to be supported in software breakpoint is set among the Flash, TKScope embedded emulation development platform as IAR J-Link forARM and Guangzhou Zhiyuan Electronics Co., Ltd., they are that to adopt by the sector be that the operation of the reading-revise of unit-write realizes software breakpoint, when after software breakpoint triggers, reruning, all need to the breakpoint place instruction operation of replacement repeatedly, so can feel in the software breakpoint that in carrying out Flash the time of a marked halt is arranged.
The present invention proposes a kind of software breakpoint that in Flash, uses and carry out the system and method for on-line debugging, do not change the cost that has processor structure and processor chips system now and do not increase processor chips, be implemented in the function that software breakpoint is set among the Flash, and when the user is reruned after breakpoint operation stops as in RAM, can not feel tangible pause, improved the efficient of slip-stick artist's exploitation, and reduce in the debugging the erasable operation of Flash, improve serviceable life and the performance of Flash.
Summary of the invention
Purpose of the present invention will overcome the deficiency of above-mentioned technology just, and a kind of method of using the software breakpoint debugging in the Flash storer efficiently is provided.
The present invention solves the technical scheme that its technical matters adopts: this method of using the software breakpoint debugging in the Flash storer efficiently, in debugger, be provided with Flash software breakpoint management controller, Flash program downloader and instruction parser, connect debugger and target processor system by ICE, debugger comes controlled target to handle by ICE, obtain and revise processor state, read-write Flash memory data; By storage of Flash software breakpoint management controller and management Flash software breakpoint information, control Flash software breakpoint state exchange, control Flash software breakpoint newly-built, delete, recover, shield, enable and upgrade operation and the replacement instruction group is carried out in control; The code of controlling after will compiling by Flash program downloader downloads in the Flash storer; Produce the device of replacement instruction group by instruction parser, the breakpoint address that reception is transmitted by Flash software breakpoint management controller, and read the data at breakpoint address place by ICE, analyze the processor instruction at this place, and convert the replacement instruction group of the generation identical result of place, the replacement address execution of transmitting to by Flash software breakpoint management controller; If former instruction is the uncorrelated instruction with programmable counter in address, then the replacement instruction group is that former instruction adds the unconditional jump instruction that jumps to its next bar instruction; If former instruction is address or program counter relative instruction, the new instruction that then needs to be created under the replacement instruction address adds that the unconditional jump of next the bar instruction that jumps to former instruction instructs, if curtailment alignment size, available dummy instruction is filled; Finally, it returns to the preservation of Flash software breakpoint management controller in the lump with former instruction of breakpoint and replacement instruction group.
As preferably, Flash software breakpoint information comprises breakpoint address, place source filename, place source code lines number, breakpoint type, the former instruction code in breakpoint place, sector, breakpoint address place, replacement instruction group code, replaces address, breakpoint original state and breakpoint end-state, and the breakpoint state comprises no breakpoint, newly-built and effective, newly-built and invalid, cancellation, invalid, effective.
As preferably, replacement instruction group code is to be obtained the data at breakpoint address place and replace one group of processor instruction that the address produces by ICE by instruction parser, replaces the position that address information labelling replacement instruction group code is deposited.
As preferably, comprise the replacement address realm, replace the address align size and replace address storage medium by Flash software breakpoint management controller configuration information, replace the memory area that address realm shows replaceable instruction group, replace the address align size and show the byte number that the replacement instruction group takies, Flash software breakpoint management controller is according to replacing alternatively location scope break into portions of the big young pathbreaker of address align, and each part is used for depositing the replacement instruction group of a former instruction.
The effect that the present invention is useful is:
1, improved management and the control method that software breakpoint is set in Flash;
2, reduced erasable operation, made and under the situation of not revising the Flash software breakpoint, Flash is not carried out erasable operation Flash;
3, the erasable operation of Flash is common needed than the long time, and the same effect fast of software breakpoint is accomplished and be provided with to minimizing during particularly from Flash software breakpoint continuation operation, to the erasable debug time that reduces of Flash inside RAM;
4, the erasable operating influence of Flash the serviceable life of Flash, reduce the erasable operation of Flash, the serviceable life that can effectively improve Flash;
5, this mode does not need to change the hardware configuration of existing processor.
Description of drawings
Fig. 1 uses software breakpoint debug system structural drawing for the present invention in flash;
Fig. 2 is the state transition graph of flash software breakpoint management controller of the present invention;
Fig. 3 is the newly-built flash software breakpoint of a present invention command process process flow diagram;
Fig. 4 replaces principle schematic for the non-jump instruction of the present invention;
Fig. 5 replaces principle schematic for jump instruction of the present invention.
Fig. 6 is a Flash software breakpoint management controller principle synoptic diagram of the present invention.
Embodiment
The invention will be further described below in conjunction with drawings and Examples:
System architecture as shown in Figure 1, system of the present invention is by debugger 1, ICE5 and target processor system 6 form, wherein:
Debugger 1 is used to provide the program development personnel to carry out the environment of program debug, it comprises with the relevant Flash software breakpoint management controller 2 of Flash software breakpoint debugging, Flash program downloader 3 and instruction parser 4, and other debugs incoherent module with the Flash software breakpoint, check one-step control or the like as variable.
ICE5 is a hardware unit, is systematically adapter of connection debugger and target processor, and debugger comes controlled target to handle by it, obtains and revise processor state, memory datas such as read-write Flash.
Target processor system 6 is the board level systems that the normal operation of processor can be provided, and it comprises processor 7, Flash storer 8, RAM9, and the periphery of other necessity.
Flash software breakpoint management controller 2, be used for storage and management Flash software breakpoint information, control Flash software breakpoint state exchange, control Flash software breakpoint newly-built, delete, recover, shield, enable and upgrade operation and the replacement instruction group is carried out in control.Flash software breakpoint information also has some specific informations except the general information breakpoint address that comprises the RAM software breakpoint, place source filename, place source code lines number, breakpoint type, the former instruction code in breakpoint place: sector, breakpoint address place, replacement instruction group code, replace address, breakpoint original state and breakpoint end-state.Breakpoint address place sector auxiliary information is used for discerning the breakpoint of common sector, so that when downloading breakpoint, the breakpoint of same sector is done a Flash write operation, avoided when upgrading to Flash repeat erasable.Replacement instruction group code is to be obtained the data at breakpoint address place and replace one group of processor instruction that the address produces by ICE by instruction parser 4, the effect that it is carried out by processor 7 is identical with former instruction code implementation effect, so processor 7 can replace carrying out the former instruction at breakpoint place by carrying out replacement instruction group code.Replace the position that address information labelling replacement instruction group code is deposited, this position can be RAM, also can be Flash or other storage medium.The breakpoint state comprises no breakpoint, newly-built and effective, newly-built and invalid, cancellation, invalid, effective.
Flash software breakpoint management controller 2 also needs some configuration informations: replace address realm, replace the address align size and replace address storage medium.Replace the memory area that address realm shows replaceable instruction group, replace the address align size and show the byte number that the replacement instruction group takies, Flash software breakpoint management controller 2 can be according to replacing alternatively location scope break into portions of the big young pathbreaker of address align, and each part is used for depositing the replacement instruction group of a former instruction.Replace address storage medium and show that the replacement instruction group is to be stored in RAM, Flash or other medium.
Flash program downloader 3, the code that is used for controlling after will compiling downloads to the Flash storer.
Flash storer 8, i.e. flash memory is used to deposit the nonvolatile memory of executable code, and it is inner or be independent of processor 7 to be included in processor 7.
RAM, random access memory can be included in processor 7 inside or be independent of processor 7, is used to deposit the data and the intermediate result of processor operation.
The present invention also provides the method to using software breakpoint to debug according to Fig. 1 system in the Flash storer: Flash software breakpoint management controller 2 breakpoint State Control, newly-built, delete, recover, shield, enable, upgrade basic operation, and continue operation from the Flash software breakpoint.
Flash software breakpoint management controller 2 breakpoint State Control
The breakpoint state comprises: no breakpoint, newly-built and effective, newly-built and invalid, cancellation, invalid, effective.
Operation to breakpoint comprises: newly-built, delete, recover, shield, enable, upgrade, these operations need be done the write operation Flash except that upgrading, and other is operated not to the Flash write operation.
Fig. 2 is a state transition graph, the transformational relation that expression takes place breakpoint end-state after the operation of breakpoint, and all upgrade operation all makes breakpoint original state and end-state be consistent.
State S200: no breakpoint state, promptly breakpoint does not exist.During newly-built breakpoint, the original state and the end-state of breakpoint all is initialized as this value, after the newly-built operation that runs succeeded, end-state is made as newly-built and effective status.
State S201: newly-built and effective status, represent that this breakpoint is newly-built breakpoint, need upgrade operation, break-poing instruction and replacement instruction group are write Flash.Under this state, if carry out deletion action then delete all information of breakpoint, if carry out masking operation then the breakpoint end-state enters newly-built and disarmed state.After newly-built and effective status upgraded, end-state became effective status.
State S202: newly-built and disarmed state, indicate that this breakpoint is newly-built breakpoint, need upgrade operation, the replacement instruction group is write Flash, and not write break point instruction.Under this state, carry out enable operation, can make the breakpoint end-state enter newly-built and effective status; Carry out deletion action, can delete this breakpoint information.
State S203: effective status, expression break-poing instruction and replacement instruction group are present among the Flash.A newly-built breakpoint must just can make the breakpoint end-state enter effective status after upgrading operation.Under effective status, can carry out deletion and masking operation.After carrying out deletion action, the breakpoint end-state is the cancellation state; After carrying out masking operation, the breakpoint end-state is a disarmed state.
State S204: disarmed state, the expression break-poing instruction does not write Flash, and the breakpoint place is former instruction, can not trigger breakpoint and interrupt, and its replacement instruction group has write Flash.A newly-built breakpoint can make the breakpoint end-state enter disarmed state after upgrading under newly-built and the disarmed state.Under disarmed state, can carry out deletion and enable operation.After carrying out deletion action, the breakpoint end-state is the cancellation state; After carrying out enable operation, the breakpoint end-state is an effective status.
State S205: the cancellation state, represent that already present breakpoint need write Flash with former instruction by upgrading operation, upgrades back deletion breakpoint information, so the original state of breakpoint the cancellation state can not occur.
Newly-built
Fig. 3 is a process flow diagram, and expression Flash software breakpoint management controller 2 receives the response of the newly-built Flash software breakpoint order that is sent by debugger 1.
Step S300:Flash software breakpoint management controller 2 increases a breakpoint after receiving and debugging the newly-built Flash software breakpoint order that sends, and join in the breakpoint tabulation information such as the breakpoint of initialization simultaneously state, breakpoint address, place source filename, place source code lines number.
Step S301: replace address realm and replacement address align size and established Flash software breakpoint information according to configuration information then, find out untapped replacement address space, and distribute to and replace the address.
Step S302:Flash software breakpoint management controller 2 call instruction resolvers 4, and with the parameter breakpoint address with replace the address and pass to instruction parser 4.
Step S303: instruction parser 4 obtains breakpoint address place data to Flash storer 8 by ICE2 again to processor 7.In order to reduce the communication number of times, can obtain data by the length of long instruction.
Step S304: instruction parser 4 analyzes former instruction, because the instruction of the order set ground of some processor is not isometric RISC instruction.
Step S305: instruction parser 4 produces the replacement instruction group according to replacing the address.The replacement principle is: if former instruction is address and programmable counter independent instructions, then the replacement instruction group comprises former instruction itself, and immediately following a unconditional jump instruction, jump to next bar instruction of the former location of instruction, if these two the not enough address align sizes of replacing of adding up, then fill with dummy instruction the back; If former instruction is address or program counter relative, as jump instruction, then according to breakpoint address or programmable counter and the new instruction of replacement address relationship generation, and immediately following a unconditional jump instruction, jump to next bar instruction of the former location of instruction, if these two the not enough address align sizes of replacing of adding up, then fill with dummy instruction the back.Instruction parser 4 can return to Flash software breakpoint management controller 2 with former instruction and replacement instruction group.
Step S306: upgrade breakpoint information, comprising the former instruction of store breakpoint, breakpoint replacement instruction group, upgrading the breakpoint end-state is newly-built and effective status.
Deletion
Deletion action produces different results under different breakpoint original states.If original state is no breakpoint state, delete breakpoint information after the executable operations; If when original state was effective or disarmed state, the result of execution changed into the cancellation state with the breakpoint end-state exactly.
Recover
Recovery operation just becomes effective status with the breakpoint end-state by the cancellation state.
Shielding
Masking operation just becomes disarmed state with the breakpoint end-state by effective status.
Enable
Enable operation just becomes effective status with the breakpoint end-state by disarmed state.
Upgrade
The renewal operation is the write operation to Flash, and it decides its update mode according to breakpoint original state and end-state, and its effect is to be used for the content of the state and the Flash storer of synchronous Flash software breakpoint management controller 2.Therefore, getting the finger operation from Flash before, processor needs to judge whether needs execution renewal operation.
Under following condition, need to carry out to upgrade and operate and corresponding update content:
The breakpoint end-state is newly-built and effective: write break point instruction and replacement instruction group;
The breakpoint end-state is newly-built and invalid: write the replacement instruction group;
The breakpoint original state is that effectively end-state is invalid: write former instruction;
The breakpoint original state is effectively, and end-state is cancellation: write former instruction;
The breakpoint original state is invalid, and end-state is effective: the write break point instruction.
This mode makes the user under the situation that does not change the breakpoint state, and the not operation that can occur upgrading just can not write Flash yet, and therefore, this mode can effectively reduce the erasable number of times of Flash, improves debugging efficiency.
Continue to carry out from the Flash software breakpoint
When the user need be when the Flash software breakpoint continues operation, then Flash software breakpoint management controller 2 is revised the programmable counter of current processor to replacing the address, enabling processor then carries out, processor just begins to be taken into the instruction execution from replacing the address so, carries out the replacement instruction group and produces and the same effect of former instruction.
Fig. 4 is a synoptic diagram, has provided the process of processor execution command when former instruction is non-jump instruction under being provided with Flash software breakpoint condition.
Fig. 5 is a synoptic diagram, has provided the process of processor execution command when former instruction is branch instruction under being provided with Flash software breakpoint condition.Former instruction may jump to branch address 1 or branch address 2 after carrying out, the such result of the same generation of replacement instruction group.
Below in conjunction with concrete system the method and apparatus of design is illustrated, makes the those skilled in the art make and to use the present invention, embodiment is described.
7.1 according to the system architecture of Fig. 1,
Device Flash software breakpoint management controller 2 is the assembly that is used for the control of Flash software breakpoint management that ASIDE comprised;
Device Flash program downloader 3 is the assembly that is used for downloading code to Flash that ASIDE comprised;
Device ICE5 is SYARC_USB_JTAG probe, be connected with ASIDE by USB interface, be connected with target processor Cordis 5+ by jtag interface, can receive that the order that ASIDE sends by USB is finished read-write processor cores register, read-write RAM, read-write FLASH, resetted, single step, stop, move and is connected operation such as test, all these are operated all is that realization ASIDE and target processor system interaction are necessary;
Device target processor system 6 is for comprising the system evaluation plate of AS602 microcontroller, and it comprises microcontroller chip AS602 and periphery thereof, as power, reset, necessary circuitry such as clock;
Device RAM9 is the 128KB RAM that is included in AS602 inside, links to each other with the Cordis5+ processor by Cordis 5+ processor bus.
7.2 the design that focuses on device Flash software breakpoint management controller 2 that present embodiment is described, and be implemented in the method for using the software breakpoint debugging in the Flash storer efficiently around it.
As shown in Figure 6, the Flash software breakpoint management controller 2 of embodiment comprises a breakpoint list pointer pSwBpList, point to the data structure of all breakpoints created, all breakpoints in tabulation with the form tissue of chained list, so that increase, search and delete.
The data of each breakpoint list items comprise:
PSwBpNext: point to the pointer of next breakpoint list items, length is 4 bytes;
SwBpAddr: breakpoint place Flash storer specific address, length is 4 bytes;
SwBpSrcFileIndex: breakpoint place original index, be used for preserving breakpoint and be in which source file, length is 4 bytes;
SwBpSrcLineNum: the row in the original of breakpoint place number, length is 4 bytes;
SwBpType: the breakpoint type, the difference of sign breakpoint place storage medium, here with 0 RAM that identifies among the AS602, with 1 serial Flash that identifies among the AS602, length is 2 bytes;
SwBpSrcCode: the former instruction code in breakpoint place, length are 2 bytes, because the break-poing instruction of AS602 is 2 byte longs, in order to guarantee to be equal to replacement, the former instruction code length in the breakpoint place of backup is 2 bytes;
SwBpDestInstIndex: the index of the deposit position in the synchronization map space in the replacement space of breakpoint replacement instruction group in Flash software breakpoint management controller, for AS602, the space size of each index correspondence is 32 bytes;
SwBpDestAddr: breakpoint replacement instruction group operation address, promptly replace the address,, requiring 32 byte-aligned for AS602, length is 4 bytes;
SwBpStatCurr: breakpoint original state, length are 1 byte;
SwBpStatCurr: breakpoint end-state, length are 1 byte;
The Flash software breakpoint management controller 2 of embodiment comprises one group of parameter of moving being used to of distributing the replacement space of replacement instruction group by the user, comprises and replaces space start address DestSpaceStart, replaces spatial alignment size DestSpaceAlign, replaces space size DestSpaceSize and replace space medium DestSpaceMedia.As the user with the 0x9000_0000 of AS602RAM to the 0x9000_0400 space space as an alternative, DestSpaceStart=0x9000_0000 then, DestSpaceAlign=32, DestSpaceSize=1024, DestSpaceMedia=0.
The Flash software breakpoint management controller 2 of embodiment comprises a synchronization map space that is used to deposit the replacement instruction group, and points to its first address with pointer pDestInst.This space size is consistent with replacing the space, and keeps content consistent with the replacement space by more newly arriving.
The Flash software breakpoint management controller 2 of embodiment comprises the function pointer of a directional order resolver, comes the call instruction resolver by it, generates the replacement instruction group, and is written in the corresponding synchronous mapping space.Here independent from Flash software breakpoint management controller 2 instruction parser, be in order to adapt to different order set, so that design different instruction parsers.
7.3 present embodiment designs instruction parser at processor Cordis 5+
Cordis 5+ has comprised 113 instructions altogether, is broadly divided into following a few class: arithmetic logical operation instruction, single-operand instruction, no operand instruction, branch instruction, jump instruction, background register operational order, loading storage instruction.
Cordis 5+ has comprised the register of two and program counter relative: one is kernel register PCL, points to the current instruction that is performed, this register is a read-only register, can only be used to source operand; Another is background register PC, points to the instruction that next bar will be performed, and can only realize by the background register operational order.
The analysis of instruction can identify each instruction and operand thereof by the instruction decode table, and this process is actually the process of a dis-assembling, all can comprise disassembler in the general debugger.Below describe the instruction that will depend on dis-assembling and carry out replacement operation, these replacement operations come classification declaration by instruction type.
7.3.1 arithmetic logical operation instruction
Order format: OP a, b, c
Its implication is: a ← b OP c
The OP instruction has: SUB; SUB_S; AND; AND_S; OR; OR_S; BIC; BIC_S; XOR; XOR_S; ADD1; ADD1_S; ADD2; ADD2_S; ADD3; ADD3_S; ASL; ASL_S; ASR; ASR_S; LSL; LSL_S; ADC; SBC; RSUB; SUB1; SUB2; SUB3; ROR; MIN; MAX
Replace principle:, then b or c are replaced with this software breakpoint address if b or c are PCL; Otherwise former instruction keeps.
Illustrate:
Example 1:b or c are the situation of PCL
The breakpoint place:
Address HEX | Order code HEX | Assembly instruction |
80006b22 | 2740740d | ADD%r13,%pcl,16 |
The replacement instruction group:
Example 2:b or c are not the situation of PCL
The breakpoint place:
Address HEX | Order code HEX | Assembly instruction |
80006c3a | 28000280 | ASL%r0,%r0,%r10 |
The replacement instruction group:
The address | Order code | Assembly instruction |
90000000 | 28000280 | ASL%r0,%r0,%r10 |
90000004 | 20200f8080006c3e | JAL?0x80006c3e |
9000000c | 264a7000 | NOP |
90000010 | 264a7000 | NOP |
90000014 | 264a7000 | NOP |
90000018 | 264a7000 | NOP |
9000001c | 264a7000 | NOP |
7.3.2 single-operand instruction
Order format: OP
Its implication is: a ← OP b
The OP instruction has: MOV; MOV_S; SEX; SEX_S; EXT; EXT_S; NOT; NOT_S; NEG; NEG_S; ABS; ABS_S; FLAG; ASL; ASL_S; RLC; RRC; ASR; ASR_S; LSR; LSR_S; ROR
Replace principle:, then b is replaced with this software breakpoint address if b is PCL; Otherwise former instruction keeps.This is consistent with the arithmetic logical operation instruction.
7.3.3 no operand instruction
Order format: OP
The OP instruction has: NOP; NOP_S; SLEEP; SWI; BRK_S
Replace principle: former instruction keeps, except the BRK_S.
7.3.4 branch instruction
Order format: OPc
Its implication is: if (cc=true) then PC ← c
Branch instruction is divided into conditional branching Bcc, unconditional branch B, and the jump range of conditional branching is ± 1MB that the unconditional branch jump range is ± 16MB.
The OP instruction has: Bcc; Bcc.d; B; B_S; B.d; BLcc; BL; BL_S; BLcc.d; BL.d
Replace principle:
1. branch instruction B is transferred to corresponding jump instruction J, Bcc transfers Jcc to, and B, B_S transfer J to, and BL, BL_S transfer JL to;
2. jump address is represented operand c by counting immediately;
3. if delay slot order tape .d because the jump range of J.d is limited, then needs to do a transfer, can jump to the instruction back at next bar place of rebound breakpoint earlier, and then carry out unconditional jump.
Illustrate:
Example 3:Bcc instruction
The breakpoint place:
Address HEX | Order code HEX | Assembly instruction |
8000539c | f404 | BNZ?S?0x800053a4 |
The replacement instruction group:
The address | Order code | Assembly instruction |
90000000 | 20e00f82800053a4 | JNZ?0x800053a4 |
90000008 | 20200f808000539e | JAL?0x8000539e |
90000010 | 264a7000 | NOP |
90000014 | 264a7000 | NOP |
90000018 | 264a7000 | NOP |
9000001c | 264a7000 | NOP |
Example 4:BLcc instruction
The breakpoint place:
Address HEX | Order code HEX | Assembly instruction |
800053a8 | 0ff20000 | BL?0x80005b98 |
The replacement instruction group:
The address | Order code | Assembly instruction |
90000000 | 20220f8080005b98 | JL?0x80005b98 |
90000008 | 20200f80800053a8 | JAL?0x800053a8 |
90000010 | 264a7000 | NOP |
90000014 | 264a7000 | NOP |
90000018 | 264a7000 | NOP |
9000001c | 264a7000 | NOP |
Example 5:delay slot instruction
The breakpoint place:
Address HEX | Order code HEX | Assembly instruction |
800052c8 | 07ccffeb | BLT.D?0x80005294 |
800052cc | 248a0901 | MOV%r4,100 |
The replacement instruction group:
The address | Order code | Assembly instruction |
90000000 | 0010002b | BLT.D?0x90000010 |
90000004 | 248a0901 | MOV%r4,100 |
90000008 | 20200f80800052d0 | JAL?0x800052d0 |
90000010 | 20200f8080005294 | JAL?0x80005294 |
90000018 | 264a7000 | NOP |
9000001c | 264a7000 | NOP |
7.3.4 jump instruction
Order format: OP c
Its implication is: if (cc=true) then PC ← c
The OP instruction has: Jcc; Jcc.d; J; J_S; J.d; JLcc; JL; JL_S; JLcc.d; JL.d
Replace principle: consistent with branch instruction.
7.3.5 background register operational order
Order format:
Its implication is:
The OP instruction has:
Replace principle:, then b or c are replaced with this software breakpoint address if b or c are PCL; Otherwise former instruction keeps.
Terminological interpretation:
ICE In-Circuit Emulator in-circuit emulator
RAM Random Access Memory random access memory
JTAG Joint Test Action Group combined testing action group boundary scan testing agreement
In addition to the implementation, the present invention can also have other embodiments.All employings are equal to the technical scheme of replacement or equivalent transformation formation, all drop on the protection domain of requirement of the present invention.
Claims (4)
1. method of in the Flash storer, using software breakpoint debugging efficiently, it is characterized in that: in debugger (1), be provided with Flash software breakpoint management controller (2), Flash program downloader (3) and instruction parser (4), connect debugger and target processor system by ICE (5), debugger comes controlled target to handle by ICE (5), obtain and revise processor state, read-write Flash memory data; By Flash software breakpoint management controller (2) storage and management Flash software breakpoint information, control Flash software breakpoint state exchange, control Flash software breakpoint newly-built, delete, recover, shield, enable and upgrade operation and the replacement instruction group is carried out in control; The code of controlling after will compiling by Flash program downloader (3) downloads in the Flash storer (8); Produce the device of replacement instruction group by instruction parser (4), the breakpoint address that reception is transmitted by Flash software breakpoint management controller (2), and read the data at breakpoint address place by ICE, analyze the processor instruction at this place, and convert the replacement instruction group of the generation identical result of place, the replacement address execution of transmitting to by Flash software breakpoint management controller (2); If former instruction is the uncorrelated instruction with programmable counter in address, then the replacement instruction group is that former instruction adds the unconditional jump instruction that jumps to its next bar instruction; If former instruction is address or program counter relative instruction, the new instruction that then needs to be created under the replacement instruction address adds that the unconditional jump of next the bar instruction that jumps to former instruction instructs, if curtailment alignment size, available dummy instruction is filled; Finally, it returns to Flash software breakpoint management controller (2) preservation in the lump with former instruction of breakpoint and replacement instruction group.
2. the method for in the Flash storer, using the software breakpoint debugging efficiently according to claim 1, it is characterized in that: Flash software breakpoint information comprises breakpoint address, place source filename, place source code lines number, breakpoint type, the former instruction code in breakpoint place, sector, breakpoint address place, replacement instruction group code, replaces address, breakpoint original state and breakpoint end-state, and the breakpoint state comprises no breakpoint, newly-built and effective, newly-built and invalid, cancellation, invalid, effective.
3. the method for in the Flash storer, using the software breakpoint debugging efficiently according to claim 1, it is characterized in that: replacement instruction group code is to be obtained the data at breakpoint address place and replace one group of processor instruction that the address produces by ICE by instruction parser (4), replaces the position that address information labelling replacement instruction group code is deposited.
4. the method for in the Flash storer, using the software breakpoint debugging efficiently according to claim 1, it is characterized in that: comprise alternatively location scope by Flash software breakpoint management controller (2) configuration information, replace the address align size and replace address storage medium, replace the memory area that address realm shows replaceable instruction group, replace the address align size and show the byte number that the replacement instruction group takies, Flash software breakpoint management controller (2) is according to replacing alternatively location scope break into portions of the big young pathbreaker of address align, and each part is used for depositing the replacement instruction group of a former instruction.
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