CN104503905A - Debugging method and debugging system for embedded system - Google Patents
Debugging method and debugging system for embedded system Download PDFInfo
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- CN104503905A CN104503905A CN201410776567.8A CN201410776567A CN104503905A CN 104503905 A CN104503905 A CN 104503905A CN 201410776567 A CN201410776567 A CN 201410776567A CN 104503905 A CN104503905 A CN 104503905A
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Abstract
The invention discloses a debugging method and a debugging system for an embedded system. The debugging method comprises the following steps: setting a debugging mode; mapping a download link space for a to-be-debugged program file to a random access storage instead of mapping to a quick flashing storage according to the debugging mode; receiving the to-be-debugged program file and storing the to-be-debugged program file in the random access storage; receiving a debugging instruction, running the debugging instruction and debugging the to-be-debugged program file. According to the debugging method and the debugging system for the embedded system provided by the invention, the speed of downloading the to-be-debugged program file during a debugging process is increased, and the service life of the embedded system is prolonged.
Description
Technical field
The present invention relates to embedded systems debugging field, particularly relate to a kind of adjustment method and debug system of embedded system.
Background technology
At software development and the test phase of embedded system, all can the program of writing be debugged.In debug process, need program file to be debugged to download in embedded system.
In prior art, the download address space of program file to be debugged is the address space that the fast flash memory bank (FLASH) of embedded system maps.Now, existing adjustment method can continually by writing, amended program file downloads in described FLASH.Because erasable FLASH is more time-consuming, if program file is larger, each download may need to expend tens of second.Debug download in addition at every turn, all can erasable FLASH, and FLASH has certain life-span, therefore existing adjustment method can shorten the life-span of FLASH, thus affects the life-span of whole embedded system.
Summary of the invention
The object of the invention is to the adjustment method and the debug system that propose a kind of embedded system, can solve program file speed of download to be debugged in prior art slow and repeatedly FLASH life-span of causing of erasable FLASH short, thus affect the problem in the life-span of whole embedded system.
For reaching this object, the present invention by the following technical solutions:
First aspect, the invention discloses a kind of adjustment method of embedded system, comprising:
Debugging mode is set;
According to described debugging mode, the download address space of program file to be debugged is changed into map to random access memory by mapping to fast flash memory bank;
Receive described program file to be debugged, and described program file to be debugged is stored in described random access memory;
Receive debug command, and run described debug command, described program file to be debugged is debugged.
Further, described debugging mode is set before also comprise:
Send debugging mode change request;
Receive described debugging mode change request,
The described debugging mode that arranges is specially:
According to described debugging mode change request, debugging mode is set.
Further, also comprise before described transmission debugging mode change request:
The download address spatial mappings of described program file to be debugged is set to fast flash memory bank, and has linked described program file to be debugged.
Second aspect, the invention discloses a kind of debug system of embedded system, comprising: main control system, debug circuit and embedded system,
Described main control system is connected with described embedded system by described debug circuit;
Described main control system by described debug circuit to described embedded system sending controling instruction and program file to be debugged;
Described embedded system for receiving described steering order, and performs described steering order.
Further, described steering order comprises debugging mode change request and debug command, and described embedded system comprises: bus, debugging interface, debugging mode register, debugging mode control module, fast flash memory bank, random access memory and controller,
Described debugging interface, described debugging mode register, described debugging mode control module are connected with described bus respectively with described controller, and described debugging mode control module connects described fast flash memory bank or described random access memory by corresponding selectivity link;
Described debugging interface is for receiving described steering order and described program file to be debugged;
Described debugging mode register is used for the value arranging debugging mode according to described debugging mode change request;
Described debugging mode control module is used for selecting to connect described fast flash memory bank or described random access memory according to the value of described debugging mode;
Described controller, for running described debug command, is debugged described program file to be debugged.
Further, described debugging mode register is set to the download address spatial mappings of described program file to be debugged to the debugging mode of random access memory, only can be resetted by cold start-up, described in be reset to the download address spatial mappings of described program file to be debugged to fast flash memory bank.
The adjustment method of embedded system of the present invention and debug system are by changing into by the download address space of program file to be debugged map to random access memory by mapping to fast flash memory bank, eliminate the consuming time of erasable fast flash memory bank, improve program file to be debugged and be downloaded to speed in embedded system, and owing to eliminating erasable fast flash memory bank, improve the life-span of fast flash memory bank, and then improve the life-span of embedded system.
Accompanying drawing explanation
In order to the technical scheme of exemplary embodiment of the present is clearly described, one is done to the accompanying drawing used required for describing in embodiment below and simply introduce.Obviously, the accompanying drawing introduced is the accompanying drawing of a part of embodiment that the present invention will describe, instead of whole accompanying drawings, for those of ordinary skill in the art, under the prerequisite not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the process flow diagram of the adjustment method of the embedded system that the embodiment of the present invention one provides.
Fig. 2 is the structural drawing of the debug system of the embedded system that the embodiment of the present invention two provides.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below with reference to the accompanying drawing in the embodiment of the present invention, by embodiment, technical scheme of the present invention is intactly described.Obviously; described embodiment is a part of embodiment of the present invention, instead of whole embodiments, based on embodiments of the invention; the every other embodiment that those of ordinary skill in the art obtain under the prerequisite not making creative work, all falls within protection scope of the present invention.
Embodiment one:
Fig. 1 is the process flow diagram of the adjustment method of the embedded system that the embodiment of the present invention one provides.As shown in Figure 1, the method comprises:
Step 101, debugging mode is set.
In this step, the object arranging debugging mode is set to map in random access memory the download address of the program file to be debugged downloaded in embedded system.Random access memory can carry out reading and writing at any time, read or write speed is very fast, and the speed of read-write is irrelevant with its position.Although random access memory can abandon the content of storage when power-off, in whole debug process, it is the state be always energized.Even if due to uncontrollable extraneous factor power-off, because its read or write speed is very fast, again re-writes program file to be debugged and also can not expend the too many time.
Step 102, according to debugging mode, the download address space of program file to be debugged is changed into map to random access memory by mapping to fast flash memory bank.
In this step, the download address of program file to be debugged is set to map to random access memory by embedded system, thus avoids erasable fast flash memory bank.The read or write speed of fast flash memory bank is comparatively slow, and frequently carry out erasable after can affect its life-span, and then affect the life-span of whole embedded system.The download address space of program file to be debugged changes into map to random access memory by mapping to fast flash memory bank by this step, what avoid fast flash memory bank is erasable, thus improve program file to be debugged and be downloaded to speed in embedded system, and improve the life-span of fast flash memory bank, and then improve the life-span of embedded system.
Step 103, receive program file to be debugged, and program file to be debugged is stored in random access memory.
In this step, embedded system receives program file to be debugged, and according to the setting of step 102, is stored in random access memory by the program file to be debugged received.
Step 104, reception debug command, and run debug command, treat debugger file and debug.In this step, embedded system receives debug command, and runs debug command, debugs the program file to be debugged stored in random access memory.
Preferably, before step 101 arranges debugging mode, described method also comprises:
Step 111, the download address spatial mappings of program file to be debugged is set to fast flash memory bank, and has linked program file to be debugged.
In this step, be the fast flash memory bank mapping to embedded system by the download address spatial placement of the program file to be debugged downloaded in embedded system.
Step 121, transmission debugging mode change request.
In this step, to embedded system sending mode change request, pattern change request maps to random access memory for being changed into by the download address Space Revision of program file to be debugged.
Step 131, reception debugging mode change request.
In this step, embedded system receives debugging mode change request.Debugging mode change request is changed into map to random access memory by mapping to fast flash memory bank the download address of program file to be debugged.Arranging debugging mode in step 101 is carry out arranging according to the pattern change request in this step.
The adjustment method of the embedded system that the embodiment of the present invention one provides is by changing into by the download address space of program file to be debugged map to random access memory by mapping to fast flash memory bank, eliminate the consuming time of erasable fast flash memory bank, improve program file to be debugged and be downloaded to speed in embedded system, and owing to eliminating erasable fast flash memory bank, improve the life-span of fast flash memory bank, and then improve the life-span of embedded system.
Embodiment two:
Fig. 2 is the structural drawing of the debug system of the embedded system that the embodiment of the present invention two provides.As shown in Figure 2, this debug system comprises the main control system 201, debug circuit 202 and the embedded system 203 that connect successively.Main control system 201 passes through debug circuit 202 to embedded system 203 sending controling instruction and program file to be debugged.Embedded system 203 performs steering order after receiving the steering order of main control system 201 transmission.
In the present embodiment, main control system comprises debugging mode change request and debug command to the steering order that embedded system sends.
As shown in Figure 2, embedded system 203 comprises:
Bus 213.
Debugging interface 223, is connected with bus 213, for receiving the steering order of main control system 201 transmission and program file to be debugged.
Debugging mode register 233, is connected with bus 213, and the steering order debugging mode change request for receiving according to debugging interface 223 arranges the value of debugging mode.
In the present embodiment, debugging mode has two values, and one of them value corresponds to the download address spatial mappings of program file to be debugged to fast flash memory bank, and another value corresponds to the download address spatial mappings of program file to be debugged to random access memory.When the value of debugging mode register is set to the download address spatial mappings of program file to be debugged to the debugging mode of random access memory, only can be resetted by cold start-up, be reset to the download address spatial mappings of program file to be debugged to fast flash memory bank.
Debugging mode control module 243, be connected with bus 213, and connecting fast flash memory bank 253 or random access memory 263 by corresponding selectivity link, the value for the debugging mode arranged according to debugging mode register 233 is selected to connect fast flash memory bank 253 or random access memory 263.
Controller 273, is connected with bus 213, for the debug command received according to debugging interface 223, debugs the program file to be debugged be stored in fast flash memory bank 253 or random access memory 263.
The debug system of the embedded system that the embodiment of the present invention two provides is by when treating debugger file and debugging, the download address space of program file to be debugged is changed into map to random access memory by mapping to fast flash memory bank, eliminate the consuming time of erasable fast flash memory bank, improve program file to be debugged and be downloaded to speed in embedded system, and owing to eliminating erasable fast flash memory bank, improve the life-span of fast flash memory bank, and then improve the life-span of embedded system.
The know-why that above are only preferred embodiment of the present invention and use.The invention is not restricted to specific embodiment described here, the various significant changes can carried out for a person skilled in the art, readjust and substitute all can not depart from protection scope of the present invention.Therefore, although be described in further detail invention has been by above embodiment, the present invention is not limited only to above embodiment, when not departing from the present invention's design, can also comprise other Equivalent embodiments more, and scope of the present invention is determined by the scope of claim.
Claims (6)
1. an adjustment method for embedded system, is characterized in that, comprising:
Debugging mode is set;
According to described debugging mode, the download address space of program file to be debugged is changed into map to random access memory by mapping to fast flash memory bank;
Receive described program file to be debugged, and described program file to be debugged is stored in described random access memory;
Receive debug command, and run described debug command, described program file to be debugged is debugged.
2. the adjustment method of embedded system according to claim 1, is characterized in that, described debugging mode is set before also comprise:
Send debugging mode change request;
Receive described debugging mode change request,
The described debugging mode that arranges is specially:
According to described debugging mode change request, debugging mode is set.
3. the adjustment method of embedded system according to claim 2, is characterized in that, also comprises before described transmission debugging mode change request:
The download address spatial mappings of described program file to be debugged is set to fast flash memory bank, and has linked described program file to be debugged.
4. a debug system for embedded system, is characterized in that, comprising: main control system, debug circuit and embedded system,
Described main control system is connected with described embedded system by described debug circuit;
Described main control system by described debug circuit to described embedded system sending controling instruction and program file to be debugged;
Described embedded system for receiving described steering order, and performs described steering order.
5. the debug system of embedded system according to claim 4, described steering order comprises debugging mode change request and debug command, it is characterized in that, described embedded system comprises: bus, debugging interface, debugging mode register, debugging mode control module, fast flash memory bank, random access memory and controller
Described debugging interface, described debugging mode register, described debugging mode control module are connected with described bus respectively with described controller, and described debugging mode control module connects described fast flash memory bank or described random access memory by corresponding selectivity link;
Described debugging interface is for receiving described steering order and described program file to be debugged;
Described debugging mode register is used for the value arranging debugging mode according to described debugging mode change request;
Described debugging mode control module is used for selecting to connect described fast flash memory bank or described random access memory according to the value of described debugging mode;
Described controller, for running described debug command, is debugged described program file to be debugged.
6. the debug system of embedded system according to claim 5, it is characterized in that, described debugging mode register is set to the download address spatial mappings of described program file to be debugged to the debugging mode of random access memory, only can be resetted by cold start-up, described in be reset to the download address spatial mappings of described program file to be debugged to fast flash memory bank.
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| CN105573910A (en) * | 2015-12-11 | 2016-05-11 | 北京元心科技有限公司 | Application program debugging method of protected system and intelligent terminal |
| CN106485894A (en) * | 2015-08-31 | 2017-03-08 | 霍尼韦尔国际公司 | Security system, the method and apparatus for debugging security system |
| CN113661451A (en) * | 2019-04-16 | 2021-11-16 | 三菱电机株式会社 | Program creation support device, program creation support method, and program |
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| CN104503905B (en) | 2018-05-25 |
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Address after: Room 101, Floor 1-5, Building 8, Yard 9, Fenghao East Road, Haidian District, Beijing 100094 Patentee after: Zhaoyi Innovation Technology Group Co.,Ltd. Address before: 100083 12 Floors, Block A, Tiangong Building, Science and Technology University, 30 College Road, Haidian District, Beijing Patentee before: GIGADEVICE SEMICONDUCTOR(BEIJING) Inc. |