CN105514030A - Forming method of semiconductor structure - Google Patents
Forming method of semiconductor structure Download PDFInfo
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- CN105514030A CN105514030A CN201610041504.7A CN201610041504A CN105514030A CN 105514030 A CN105514030 A CN 105514030A CN 201610041504 A CN201610041504 A CN 201610041504A CN 105514030 A CN105514030 A CN 105514030A
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- Prior art keywords
- photoresist layer
- antireflective coating
- bottom antireflective
- metal nitride
- semiconductor structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76868—Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
- H01L2221/1073—Barrier, adhesion or liner layers
- H01L2221/1078—Multiple stacked thin films not being formed in openings in dielectrics
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Materials For Photolithography (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
A forming method of a semiconductor structure includes the steps that a substrate is provided; a metal nitride layer is formed on the substrate; a bottom anti-reflection coating is formed on the metal nitride; a graphical photoresist layer is formed on the bottom anti-reflection coating. The forming method is characterized in that the method further includes the steps that before the graphical photoresist layer is formed, the bottom anti-reflection coating is thermally treated. The method is applied in the local interconnection technology of metal nitride, and the size stability of a formed photo-etched pattern is guaranteed.
Description
Technical field
The present invention relates to field of semiconductor fabrication, particularly a kind of formation method of semiconductor structure.
Background technology
In the manufacturing process of semiconductor device, photoetching as an important technique by the Graphic transitions in mask plate in photoresist layer.Along with the continuous reduction of characteristic size, the degree of difficulty of photoetching is constantly increased, when defining figure in photoresist layer, because the semiconductor base (comprising metal level and dielectric layer) below photoresist has higher reflection coefficient, exposure light source is easily reflected at semiconductor substrate surface, cause distortion or the dimensional discrepancy of photoetching offset plate figure, cause the incorrect transfer of mask plate figure, in order to eliminate the reflex of light source, usual needs bottom photoresist layer or surface form one deck antireflecting coating (anti-reflectivecoating, ARC), be formed in and be commonly referred to as bottom antireflective coating bottom photoresist layer, what be formed in photoresist layer surface is reflection coating provided.
In local interconnect process, metal nitride is conventional material, after usually forming metal nitride layer in substrate, metal nitride layer forms bottom antireflective coating; Bottom antireflective coating forms photoresist layer; Photoresist layer is carried out graphically (exposure and development), forms litho pattern; With patterned photoresist layer for metal level described in mask etching forms local interlinkage structure.
But the stability of existing local interconnect process still has to be hoisted.
Summary of the invention
The problem that the present invention solves is in local interconnect process, how to ensure the stability of the size of the litho pattern formed.
For solving the problem, the invention provides a kind of formation method of semiconductor structure, comprising:
Substrate is provided; Form metal nitride layer on the substrate; Described metal nitride layer forms bottom antireflective coating; Described bottom antireflective coating forms patterned photoresist layer; It is characterized in that, also comprise: before the patterned photoresist layer of formation, described bottom antireflective coating is heat-treated.
Optionally, described metal nitride layer is TiN or TaN, and the thickness of metal nitride is 800 ~ 1200 dusts.
Optionally, to heat treatment temperature >=120 degree Celsius of described bottom antireflective coating.
Optionally, be 120 ~ 180 degrees Celsius to the heat treated temperature of described bottom antireflective coating, heat treatment time is 10 ~ 60 seconds.
Optionally, the patterned photoresist layer of described formation to formation bottom antireflective coating between there is the first time of delay, described first time of delay >=10 hours.
Optionally, after heat-treating, carry out the first cooling processing.
Optionally, the forming process of described bottom antireflective coating is: carry out first to substrate and cure process; Second cooling processing is carried out to substrate; Spin coating proceeding is adopted to form bottom antireflective coating in described metal nitride layer; Soft baking process is carried out to described bottom antireflective coating; The 3rd cooling processing is carried out after soft baking process.
Optionally, the forming process of described patterned photoresist layer is: adopt spin coating proceeding to form photoresist layer on described bottom antireflective coating; Soft baking process is carried out to photoresist layer; After soft baking process, the 4th cooling processing is carried out to substrate; Exposure-processed is carried out to photoresist layer; Post exposure bake is carried out to described photoresist layer; Development treatment is carried out to the photoresist layer of post exposure bake, forms photoetching offset plate figure; Firmly process is dried to the patterned photoresist layer after development; 5th cooling processing is carried out to the patterned photoresist layer after hard baking process.
Optionally, also comprise: with described patterned photoresist layer for mask, etch described metal nitride layer, form local interlinkage structure.
Optionally, also comprise: before formation metal nitride, substrate forms metal level; Form metal nitride layer on the metal layer.
Compared with prior art, technical scheme of the present invention has the following advantages:
The formation method of semiconductor structure of the present invention, forms metal nitride layer on the substrate; After described metal nitride layer forms bottom antireflective coating, before described bottom antireflective coating forms patterned photoresist layer, also comprise: described bottom antireflective coating is heat-treated, when heat-treating, make diffuse into the alkaline matter volatilization of bottom antireflective coating from metal nitride layer or decompose, after heat treatment, then on bottom antireflective coating, form patterned photoresist layer, thus make the size of the litho pattern formed in photoresist layer keep stable.
Further, it is 120 ~ 180 degrees Celsius to the heat treated temperature of described bottom antireflective coating, heat treatment time is 10 ~ 60 seconds, effectively and fully volatilize making the alkaline matter in bottom antireflective coating 204 or while decomposition, ensure that the characteristic of bottom antireflective coating 204 can not be changed.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the formation method of embodiment of the present invention semiconductor structure;
Fig. 2 ~ Fig. 7 is the structural representation of the forming process of embodiment of the present invention semiconductor structure.
Embodiment
As background technology sayed, the stability of existing local interconnect process still has to be hoisted, such as in local interconnect process, the size fluctuation of litho pattern is larger, in a such as wafer, the size of the litho pattern that zones of different is identical is different, or the size of identical lithographic images on different wafer is also different.
Research finds; in the production process of reality; due to the restriction of manufacture craft board quantity and production capacity; after metal nitride layer upper bottom portion antireflecting coating; usual meeting stay longer just can carry out the step of follow-up formation photoresist layer, and the fluctuation of the size of the litho pattern in this case formed is larger.Further research finds, after metal nitride layer upper bottom portion antireflecting coating, and partial alkaline material (the such as NH that metal nitride layer surface exists
2or NH
3group) can diffuse in bottom antireflective coating, when forming photoresist layer in bottom anti-reflective layer, this alkaline matter can diffuse in photoresist layer from bottom antireflective coating, thus there is neutralization reaction with the light acid in the rear photoresist layer of exposure, the size of the litho pattern exposing and formed after development is affected, the size fluctuation of litho pattern is larger, particularly when forming the overstand after bottom anti-reflection layer, alkaline matter can have the more time to be diffused in bottom antireflective coating, thus the amount be diffused in bottom antireflective coating is larger, when forming photoresist layer in bottom anti-reflective layer, the light acid that more alkaline matter can be diffused in photoresist layer with exposure in rear photoresist layer produces neutralization reaction, make the size fluctuation of the litho pattern exposing and formed after development larger.
For this reason, embodiments provide a kind of formation method of semiconductor structure, form metal nitride layer on the substrate; After described metal nitride layer forms bottom antireflective coating, before described bottom antireflective coating forms patterned photoresist layer, also comprise: described bottom antireflective coating is heat-treated, when heat-treating, make diffuse into the alkaline matter volatilization of bottom antireflective coating from metal nitride layer or decompose, after heat treatment, then on bottom antireflective coating, form patterned photoresist layer, thus make the size of the litho pattern formed in photoresist layer keep stable.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.When describing the embodiment of the present invention in detail, for ease of illustrating, schematic diagram can be disobeyed general ratio and be made partial enlargement, and described schematic diagram is example, and it should not limit the scope of the invention at this.In addition, the three-dimensional space of length, width and the degree of depth should be comprised in actual fabrication.
Fig. 1 is the schematic flow sheet of the formation method of embodiment of the present invention semiconductor structure; Fig. 2 ~ Fig. 7 is the structural representation of the forming process of embodiment of the present invention semiconductor structure.
With reference to figure 1, the formation method of described semiconductor structure comprises step:
S101, provides substrate;
S102, forms metal nitride layer on the substrate
S103, described metal nitride layer forms bottom antireflective coating
S104, stopped for the first time of delay
S105, heat-treats described bottom antireflective coating
S106, after heat treatment, described bottom antireflective coating forms patterned photoresist layer
Below in conjunction with accompanying drawing, said process is described in detail.
With reference to figure 1, provide substrate 201; Described substrate 201 forms metal nitride layer 203.
Described substrate 201 is the carrier of subsequent technique.In one embodiment, described substrate 201 can be Semiconductor substrate, and the material of Semiconductor substrate is silicon, germanium or SiGe.
In another embodiment, described substrate can comprise Semiconductor substrate and be positioned at the dielectric layer in Semiconductor substrate.Be formed with semiconductor device in described Semiconductor substrate, such as transistor etc., can be formed with the metal plug be electrically connected with semiconductor device in described dielectric layer, the local interlinkage structure of follow-up formation is electrically connected with metal plug.
Described metal nitride layer 203 is follow-up for the formation of local interlinkage structure.In one embodiment, the material of described metal nitride 203 is TiN or TaN, and the thickness of metal nitride is 800 ~ 1200 dusts.
In one embodiment, before substrate 201 is formed metal nitride layer 203, first can form metal level 202 in described substrate 201, then on metal level 202, form metal nitride layer 203, subsequent etching metal nitride layer 203 and metal level 202 form local interlinkage structure.
The material of described metal level 202 is tungsten, aluminium or copper.
With reference to figure 3, described metal nitride layer 203 forms bottom antireflective coating 204.
Described bottom antireflective coating 204 is organic bottom antireflective coating.In one embodiment, the thickness of described bottom antireflective coating 204 is 600 ~ 1000 dusts.
The forming process of described bottom antireflective coating 204 is: carry out first to substrate 201 and cure process, and carrying out the first object of curing process is dry the moisture in substrate 201; Second cooling processing is carried out to substrate 201; Spin coating proceeding is adopted to form bottom antireflective coating 204 in described metal nitride layer 203; Carry out soft baking process to described bottom antireflective coating 204, carrying out soft object of drying process is evaporate the partial solvent in bottom antireflective coating; The 3rd cooling processing is carried out after soft baking process.
In the manufacture craft of reality, due to restrictions such as number of devices and technique bottlenecks, after formation bottom antireflective coating, the technique of follow-up formation photoresist layer can not be carried out at once, namely after forming bottom antireflective coating, substrate will stop the step that one end time just carries out being formed photoresist layer, and patterned for described formation photoresist layer was defined as the first time of delay to the time of staying formed between bottom antireflective coating.
With reference to figure 4, before the patterned photoresist layer of formation, 21 are heat-treated to described bottom antireflective coating 204.
Research finds, during the first time of delay shorter (being less than 10 hours), because diffusion time is shorter, the alkaline matter be diffused into bottom antireflective coating 204 from metal nitride layer 203 can be seldom, thus from bottom antireflective coating 204, alkaline matter in photoresist layer is diffused into considerably less or almost do not have, now alkaline matter does not almost affect the size forming litho pattern in photoresist layer or affects negligible, and when described first time of delay >=10 hours, owing to there being sufficient diffusion time, the alkaline matter be diffused into bottom antireflective coating 204 from metal nitride layer 203 can be relatively many, when forming photoresist layer on bottom antireflective coating, alkaline matter can be easier to and from bottom antireflective coating 204, be diffused in photoresist layer that (soft baking process when forming photoresist layer can accelerate the diffusion of alkaline matter fast, and also want certain hour to be also beneficial to the diffusion of alkaline matter from coating photoresist layer to exposure), be diffused into photoresist layer neutral and alkali material, with the light acid in the rear photoresist layer of exposure, neutralization reaction occur, thus make the size of the litho pattern exposing and formed after development become large, thus in the embodiment of the present invention, when the first time of delay after formation bottom antireflective coating is longer, before formation photoresist layer, need to heat-treat 21 to described bottom antireflective coating 204, to remove from nitride surface diffusion and through the alkaline matter of bottom antireflective coating 204.
Further research finds, the temperature of described heat treatment 21 can not be too low, too low words, the alkaline matter in bottom antireflective coating 204 is made effectively not volatilize or to decompose, or make to still have partial alkaline material to remain in bottom antireflective coating 204, the temperature of heat treatment 21 can not be too high, and the words raised easily make the characteristic of bottom antireflective coating change.To the heat treatment temperature of described bottom antireflective coating 204 at least need >=120 degrees Celsius.
And, time of described heat treatment 21 can not be too short, too short words, the alkaline matter in bottom antireflective coating 204 is made not volatilize fully or to decompose, or make to still have partial alkaline material to remain in bottom antireflective coating 204, the time of heat treatment 21 can not be oversize, lifts long words and easily make bottom antireflective coating 204 easily be changed by the time rising characteristic heated, and cost of manufacture increases.
Therefore, in one embodiment, it is 120 ~ 180 degrees Celsius to the heat treated temperature of described bottom antireflective coating, it can be 120 degrees Celsius, 130 degrees Celsius, 140 degrees Celsius, 150 degrees Celsius, 160 degrees Celsius, 170 degrees Celsius, 180 degrees Celsius, heat treatment time is 10 ~ 60 seconds, it can be 10 seconds, 20 seconds, 30 seconds, 40 seconds, 50 seconds, 60 seconds, effectively and fully volatilize making the alkaline matter in bottom antireflective coating 204 or while decomposition, ensure that the characteristic of bottom antireflective coating 204 can not be changed.
After heat-treating 21, carry out the first cooling processing.In one embodiment, the temperature of described first cooling processing is 22 ~ 24 degrees Celsius, and the time is 50 seconds ~ 2 minutes.
In conjunction with reference to figure 5 and Fig. 6, after heat-treating 21 (with reference to figure 4), described bottom antireflective coating 204 forms patterned photoresist layer 205.
In one embodiment, after carrying out the first cooling processing, spin coating proceeding is adopted to form photoresist layer 205 on described bottom antireflective coating 204; Soft baking process is carried out, to evaporate the partial solvent in photoresist layer 205 to photoresist layer 205; After soft baking process, the 4th cooling processing is carried out to substrate; After 4th cooling processing, exposure-processed is carried out to photoresist layer 205; Post exposure bake is carried out to described photoresist layer 205; Development treatment is carried out to the photoresist layer 205 of post exposure bake, forms photoetching offset plate figure; Firmly process is dried to the patterned photoresist layer 205 after development; 5th cooling processing is carried out to the patterned photoresist layer after hard baking process.
In one embodiment, described photoresist layer 205 thickness be 3000 ~ 6000 dusts.
With reference to figure 7, with described patterned photoresist 205 for mask, etch described metal nitride layer 203, form local interlinkage structure 206.
In the present embodiment, continue etching sheet metal 202 after etching metal nitride layer 203, form local interlinkage structure 206.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (10)
1. a formation method for semiconductor structure, comprising:
Substrate is provided;
Form metal nitride layer on the substrate;
Described metal nitride layer forms bottom antireflective coating;
Described bottom antireflective coating forms patterned photoresist layer;
It is characterized in that, also comprise: before the patterned photoresist layer of formation, described bottom antireflective coating is heat-treated.
2. the formation method of semiconductor structure as claimed in claim 1, it is characterized in that, described metal nitride layer is TiN or TaN, and the thickness of metal nitride is 800 ~ 1200 dusts.
3. the formation method of semiconductor structure as claimed in claim 1, is characterized in that, to heat treatment temperature >=120 degree Celsius of described bottom antireflective coating.
4. the formation method of semiconductor structure as claimed in claim 3, it is characterized in that, be 120 ~ 180 degrees Celsius to the heat treated temperature of described bottom antireflective coating, and heat treatment time is 10 ~ 60 seconds.
5. the formation method of the semiconductor structure as described in claim 1 or 4, is characterized in that, the patterned photoresist layer of described formation to formation bottom antireflective coating between there is the first time of delay, described first time of delay >=10 hours.
6. the formation method of semiconductor structure as claimed in claim 1, is characterized in that, after heat-treating, carry out the first cooling processing.
7. the formation method of semiconductor structure as claimed in claim 1, it is characterized in that, the forming process of described bottom antireflective coating is: carry out first to substrate and cure process; Second cooling processing is carried out to substrate; Spin coating proceeding is adopted to form bottom antireflective coating in described metal nitride layer; Soft baking process is carried out to described bottom antireflective coating; The 3rd cooling processing is carried out after soft baking process.
8. the formation method of semiconductor structure as claimed in claim 1, it is characterized in that, the forming process of described patterned photoresist layer is: adopt spin coating proceeding to form photoresist layer on described bottom antireflective coating; Soft baking process is carried out to photoresist layer; After soft baking process, the 4th cooling processing is carried out to substrate; Exposure-processed is carried out to photoresist layer; Post exposure bake is carried out to described photoresist layer; Development treatment is carried out to the photoresist layer of post exposure bake, forms photoetching offset plate figure; Firmly process is dried to the patterned photoresist layer after development; 5th cooling processing is carried out to the patterned photoresist layer after hard baking process.
9. the formation method of semiconductor structure as claimed in claim 1, is characterized in that, also comprise: with described patterned photoresist layer for mask, etch described metal nitride layer, forms local interlinkage structure.
10. the formation method of semiconductor structure as claimed in claim 1, is characterized in that, also comprise: before formation metal nitride, substrate forms metal level; Form metal nitride layer on the metal layer.
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| CN201610041504.7A CN105514030B (en) | 2016-01-21 | 2016-01-21 | The forming method of semiconductor structure |
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|---|---|---|---|
| CN201610041504.7A CN105514030B (en) | 2016-01-21 | 2016-01-21 | The forming method of semiconductor structure |
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| CN105514030A true CN105514030A (en) | 2016-04-20 |
| CN105514030B CN105514030B (en) | 2018-11-16 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109427541A (en) * | 2017-08-29 | 2019-03-05 | 中芯国际集成电路制造(北京)有限公司 | The forming method of semiconductor devices |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6130155A (en) * | 1999-07-02 | 2000-10-10 | Promos Technologies, Inc. | Method of forming metal lines in an integrated circuit having reduced reaction with an anti-reflection coating |
| CN102087993A (en) * | 2009-12-04 | 2011-06-08 | 中芯国际集成电路制造(上海)有限公司 | Groove forming method |
| CN102569168A (en) * | 2010-12-23 | 2012-07-11 | 无锡华润上华半导体有限公司 | Manufacturing method of metal interconnection line |
-
2016
- 2016-01-21 CN CN201610041504.7A patent/CN105514030B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6130155A (en) * | 1999-07-02 | 2000-10-10 | Promos Technologies, Inc. | Method of forming metal lines in an integrated circuit having reduced reaction with an anti-reflection coating |
| CN102087993A (en) * | 2009-12-04 | 2011-06-08 | 中芯国际集成电路制造(上海)有限公司 | Groove forming method |
| CN102569168A (en) * | 2010-12-23 | 2012-07-11 | 无锡华润上华半导体有限公司 | Manufacturing method of metal interconnection line |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109427541A (en) * | 2017-08-29 | 2019-03-05 | 中芯国际集成电路制造(北京)有限公司 | The forming method of semiconductor devices |
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