CN105514030B - The forming method of semiconductor structure - Google Patents
The forming method of semiconductor structure Download PDFInfo
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- CN105514030B CN105514030B CN201610041504.7A CN201610041504A CN105514030B CN 105514030 B CN105514030 B CN 105514030B CN 201610041504 A CN201610041504 A CN 201610041504A CN 105514030 B CN105514030 B CN 105514030B
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- photoresist layer
- antireflective coating
- bottom antireflective
- layer
- semiconductor structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76868—Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
- H01L2221/1073—Barrier, adhesion or liner layers
- H01L2221/1078—Multiple stacked thin films not being formed in openings in dielectrics
Abstract
A kind of forming method of semiconductor structure, including：Substrate is provided；Metal nitride layer is formed on the substrate；Bottom antireflective coating is formed in the metal nitride layer；Patterned photoresist layer is formed on the bottom antireflective coating；It is characterized in that, further including：Before forming patterned photoresist layer, the bottom antireflective coating is heat-treated.Method of the invention guarantees the stability of the size for the litho pattern to be formed in the local interconnection process of applied metal nitride.
Description
Technical field
The present invention relates to field of semiconductor fabrication, in particular to a kind of forming method of semiconductor structure.
Background technique
In the manufacturing process of semiconductor devices, the photoetching technique important as one arrives the pattern transfer in mask plate
In photoresist layer.With the continuous reduction of characteristic size, so that the degree of difficulty of photoetching is continuously increased, figure is defined in photoresist layer
When shape, due to semiconductor base (including metal layer and dielectric layer) reflection coefficient with higher below photoresist, so that exposing
Radiant is easy to reflect in semiconductor substrate surface, causes the deformation or dimensional discrepancy of photoetching offset plate figure, leads to mask plate
The incorrect transfer of figure, in order to eliminate the reflex of light source, it usually needs form one layer in photoresist layer bottom or surface
Anti-reflection coating (anti-reflective coating, ARC) is formed in the commonly referred to as bottom anti-reflective of photoresist layer bottom
Coating is penetrated, being formed in photoresist layer surface is reflection coating provided.
In local interconnection process, metal nitride is common material, and metal nitride layer is usually formed on the substrate
Afterwards, bottom antireflective coating is formed in metal nitride layer；Photoresist layer is formed on bottom antireflective coating；To photoresist
Layer is patterned (exposure and imaging), forms litho pattern；Using patterned photoresist layer as metal layer described in mask etching
Form local interlinkage structure.
But the stability of existing local interconnection process still have it is to be hoisted.
Summary of the invention
Problems solved by the invention is how to guarantee the stabilization of the size for the litho pattern to be formed in local interconnection process
Property.
To solve the above problems, the present invention provides a kind of forming method of semiconductor structure, including：
Substrate is provided；Metal nitride layer is formed on the substrate；It is anti-that bottom is formed in the metal nitride layer
Reflectance coating；Patterned photoresist layer is formed on the bottom antireflective coating；It is characterized in that, further including：It is being formed
Before patterned photoresist layer, the bottom antireflective coating is heat-treated.
Optionally, the metal nitride layer be TiN or TaN, metal nitride with a thickness of 800~1200 angstroms.
Optionally, to heat treatment temperature >=120 degree Celsius of the bottom antireflective coating.
It optionally, is 120~180 degrees Celsius to the temperature of the heat treatment of the bottom antireflective coating, heat treatment time
It is 10~60 seconds.
Optionally, described to form patterned photoresist layer to when being formed between bottom antireflective coating with the first delay
Between, first delay time >=10 hour.
Optionally, after being heat-treated, the first cooling treatment is carried out.
Optionally, the forming process of the bottom antireflective coating is：First baking processing is carried out to substrate；To substrate into
The second cooling treatment of row；Bottom antireflective coating is formed in the metal nitride layer using spin coating proceeding；To the bottom
Anti-reflection coating carries out soft baking processing；Third cooling treatment is carried out after soft baking processing.
Optionally, the forming process of the patterned photoresist layer is：Using spin coating proceeding in the bottom anti-reflective
Photoresist layer is formed on coating；Soft baking processing is carried out to photoresist layer；The 4th cooling treatment is carried out to substrate after soft baking processing；It is right
Photoresist layer is exposed processing；It is baked after being exposed to the photoresist layer；The photoresist layer baked after exposure is carried out
Development treatment forms photoetching offset plate figure；Hard baking processing is carried out to the patterned photoresist layer after development；To hard baking, treated
Patterned photoresist layer carries out the 5th cooling treatment.
Optionally, further include：Using the patterned photoresist layer as exposure mask, the metal nitride layer is etched, is formed
Local interlinkage structure.
Optionally, further include：Before forming metal nitride, metal layer is formed on the substrate；It is formed on the metal layer
Metal nitride layer.
Compared with prior art, technical solution of the present invention has the following advantages that：
The forming method of semiconductor structure of the invention, forms metal nitride layer on the substrate；In the metal
On nitride layer formed bottom antireflective coating after, formed on the bottom antireflective coating patterned photoresist layer it
Before, further include：The bottom antireflective coating is heat-treated, when being heat-treated, so that being spread from metal nitride layer
It enters the alkaline matter volatilization of bottom antireflective coating or decomposes, after heat treatment, the then shape on bottom antireflective coating
At patterned photoresist layer, so that the size of the litho pattern formed in photoresist layer keeps stablizing.
It further, is 120~180 degrees Celsius to the temperature of the heat treatment of the bottom antireflective coating, heat treatment time
It is 10~60 seconds, while making the alkaline matter in bottom antireflective coating 204 effectively and adequately volatilize or decompose, protects
The characteristic of card bottom antireflective coating 204 will not be changed.
Detailed description of the invention
Fig. 1 is the flow diagram of the forming method of semiconductor structure of the embodiment of the present invention；
Fig. 2~Fig. 7 is the structural schematic diagram of the forming process of semiconductor structure of the embodiment of the present invention.
Specific embodiment
As described in the background art, the stability of existing local interconnection process still has to be hoisted, such as in local interconnection process
In, the size fluctuation of litho pattern is larger, such as on wafer the identical litho pattern of different zones size it is different, or
The size of identical lithographic images on different wafers is also different.
The study found that in actual production process, due to the limitation of manufacture craft board quantity and production capacity, in metal nitrogen
After compound layer upper bottom portion anti-reflection coating, it will usually stay longer just will do it the step of being subsequently formed photoresist layer,
In this case the fluctuation of the size of the litho pattern formed is bigger.Further study show that in metal nitride layer upper bottom portion
After anti-reflection coating, partial alkaline substance existing for metal nitride layer surface (such as NH2Or NH3Group) it can diffuse into
In bottom antireflective coating, when forming photoresist layer in bottom anti-reflective figure layer, which can be from bottom anti-reflective
Diffused into photoresist layer in coating, thus in photoresist layer after exposure light acid occur neutralization reaction so that exposure and
The size of the litho pattern formed after development is affected, and the size fluctuation of litho pattern is larger, especially anti-in formation bottom
When residence time behind reflecting layer is too long, alkaline matter can have more times to be diffused into bottom antireflective coating, thus
The amount being diffused into bottom antireflective coating is bigger, when forming photoresist layer in bottom anti-reflective figure layer, more alkalinity
Substance can be diffused into photoresist layer and generate neutralization reaction with the light acid in photoresist layer after exposure, so that shape after exposure and imaging
At litho pattern size fluctuation it is bigger.
For this purpose, forming metal on the substrate the embodiment of the invention provides a kind of forming method of semiconductor structure
Nitride layer；After forming bottom antireflective coating in the metal nitride layer, formed on the bottom antireflective coating
Before patterned photoresist layer, further include：The bottom antireflective coating is heat-treated, when being heat-treated, so that
The alkaline matter volatilization of bottom antireflective coating is diffused into from metal nitride layer or is decomposed, and after heat treatment, is then existed
Patterned photoresist layer is formed on bottom antireflective coating, so that the size of the litho pattern formed in photoresist layer is protected
It is fixed to keep steady.
To make the above purposes, features and advantages of the invention more obvious and understandable, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.When describing the embodiments of the present invention, for purposes of illustration only, schematic diagram can disobey general proportion
Make partial enlargement, and the schematic diagram is example, should not limit the scope of the invention herein.In addition, in reality
It should include the three-dimensional space of length, width and depth in production.
Fig. 1 is the flow diagram of the forming method of semiconductor structure of the embodiment of the present invention；Fig. 2~Fig. 7 is that the present invention is real
Apply the structural schematic diagram of the forming process of a semiconductor structure.
With reference to Fig. 1, the forming method of the semiconductor structure includes step：
S101 provides substrate；
S102 forms metal nitride layer on the substrate
S103 forms bottom antireflective coating in the metal nitride layer
S104 stopped for the first delay time
S105 is heat-treated the bottom antireflective coating
S106 after heat treatment, forms patterned photoresist layer on the bottom antireflective coating
The above process is described in detail with reference to the accompanying drawing.
With reference to Fig. 1, substrate 201 is provided；Metal nitride layer 203 is formed in the substrate 201.
The substrate 201 is the carrier of subsequent technique.In one embodiment, the substrate 201 can be semiconductor substrate,
The material of semiconductor substrate is silicon, germanium or SiGe.
In another embodiment, the substrate may include semiconductor substrate and the dielectric layer in semiconductor substrate.
It is formed with semiconductor devices, such as transistor etc. in the semiconductor substrate, could be formed in the dielectric layer and semiconductor
The metal plug of device electrical connection, the local interlinkage structure being subsequently formed are electrically connected with metal plug.
The metal nitride layer 203 is subsequently used for forming local interlinkage structure.In one embodiment, the nitride metal
The material of object 203 be TiN or TaN, metal nitride with a thickness of 800~1200 angstroms.
In one embodiment, it is formed before metal nitride layer 203 in substrate 201, it can be first in the substrate 201
Metal layer 202 is formed, then forms metal nitride layer 203,203 He of subsequent etching metal nitride layer on metal layer 202
Metal layer 202 forms local interlinkage structure.
The material of the metal layer 202 is tungsten, aluminium or copper.
With reference to Fig. 3, bottom antireflective coating 204 is formed in the metal nitride layer 203.
The bottom antireflective coating 204 is organic bottom antireflective coating.In one embodiment, the bottom anti-reflective
Coating 204 with a thickness of 600~1000 angstroms.
The forming process of the bottom antireflective coating 204 is：First baking processing is carried out to substrate 201, carries out first
The purpose for baking processing is the moisture dried in substrate 201；Second cooling treatment is carried out to substrate 201；Existed using spin coating proceeding
Bottom antireflective coating 204 is formed in the metal nitride layer 203；The bottom antireflective coating 204 is carried out at soft baking
Reason, carrying out the soft purpose for drying processing is the partial solvent evaporated in bottom antireflective coating；It is cooling that third is carried out after soft baking processing
Processing.
In actual manufacture craft, since number of devices and technique bottleneck etc. limit, bottom antireflective coating is being formed
Later, the technique for being subsequently formed photoresist layer can not be carried out at once, that is, is formed after bottom antireflective coating, substrate will stop
The step of one end time just carries out forming photoresist layer applies the patterned photoresist layer of formation to bottom anti-reflective is formed
Residence time between layer was defined as the first delay time.
The bottom antireflective coating 204 is heat-treated before forming patterned photoresist layer with reference to Fig. 4
21。
The study found that when the first delay time shorter (less than 10 hours), since diffusion time is shorter, from metal nitride
Layer 203, which is diffused into the alkaline matter in bottom antireflective coating 204, seldom, thus to spread from bottom antireflective coating 204
Alkaline matter into photoresist layer is considerably less or almost without alkaline matter is to formation litho pattern in photoresist layer at this time
Size has little effect or influences can be ignored, and when first delay time >=10 are small, because of filling
The diffusion time of foot, being diffused into the alkaline matter in bottom antireflective coating 204 from metal nitride layer 203 can be relatively more,
When forming photoresist layer on bottom antireflective coating, alkaline matter can be easier to and quickly apply from bottom anti-reflective
It is diffused into photoresist layer that (soft baking processing when forming photoresist layer can accelerate the diffusion of alkaline matter, and from painting in layer 204
Cover photoresist layer to exposure also want certain time to be also conducive to alkaline matter diffusion), be diffused into photoresist layer neutral and alkali substance with
Neutralization reaction occurs for the light acid after exposure in photoresist layer, so that the size of the litho pattern formed after exposure and imaging becomes
Greatly, thus in the embodiment of the present invention, when formed the first delay time after bottom antireflective coating it is longer when, formed photoresist
It before layer, needs to carry out heat treatment 21 to the bottom antireflective coating 204, spreads and pass through from nitride surface with removal
The alkaline matter of bottom antireflective coating 204.
Further study show that the temperature of the heat treatment 21 cannot be too low, if too low, so that bottom anti-reflective applies
Alkaline matter in layer 204 effectively cannot volatilize or decompose, or make still have partial alkaline substance to remain in bottom anti-reflective
It penetrates in coating 204, the temperature for being heat-treated 21 can not be too high, is easy if raising so that the characteristic of bottom antireflective coating occurs
Change.>=120 degrees Celsius are at least needed to the heat treatment temperature of the bottom antireflective coating 204.
Also, time of the heat treatment 21 cannot be too short, if too short, so that in bottom antireflective coating 204
Alkaline matter adequately cannot volatilize or decompose, or make still have partial alkaline substance to remain in bottom antireflective coating 204
In, the time for being heat-treated 21 can not be too long, is easy if lift is long so that the time that bottom antireflective coating 204 is heated increases
Characteristic is easy to happen change, and cost of manufacture increases.
It therefore, in one embodiment, is 120~180 degrees Celsius to the temperature of the heat treatment of the bottom antireflective coating,
Can be 120 degrees Celsius, 130 degrees Celsius, 140 degrees Celsius, 150 degrees Celsius, 160 degrees Celsius, 170 degrees Celsius, 180 degrees Celsius,
Heat treatment time is 10~60 seconds, can be 10 seconds, 20 seconds, 30 seconds, 40 seconds, 50 seconds, 60 seconds, make bottom antireflective coating
Alkaline matter in 204 effectively and adequately volatilization or while decompose, guarantees that the characteristic of bottom antireflective coating 204 will not be by
Change.
After carrying out heat treatment 21, the first cooling treatment is carried out.In one embodiment, the temperature of first cooling treatment
It is 22~24 degrees Celsius, the time is 50 seconds~2 minutes.
In conjunction with reference Fig. 5 and Fig. 6, after carrying out heat treatment 21 (with reference to Fig. 4), the shape on the bottom antireflective coating 204
At patterned photoresist layer 205.
In one embodiment, after carrying out the first cooling treatment, using spin coating proceeding in the bottom antireflective coating 204
Upper formation photoresist layer 205；Soft baking processing is carried out to photoresist layer 205, to evaporate the partial solvent in photoresist layer 205；It is soft
The 4th cooling treatment is carried out to substrate after baking processing；After 4th cooling treatment, processing is exposed to photoresist layer 205；To institute
It states after photoresist layer 205 is exposed and bakes；Development treatment is carried out to the photoresist layer 205 baked after exposure, forms photoresist
Figure；Hard baking processing is carried out to the patterned photoresist layer 205 after development；To hard baking treated patterned photoresist layer
Carry out the 5th cooling treatment.
In one embodiment, the 205 of the photoresist layer with a thickness of 3000~6000 angstroms.
With reference to Fig. 7, it is exposure mask with the patterned photoresist 205, etches the metal nitride layer 203, formation office
Portion's interconnection structure 206.
In the present embodiment, continues etching sheet metal 202 after etching metal nitride layer 203, form local interlinkage structure
206。
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (10)
1. a kind of forming method of semiconductor structure, including：
Substrate is provided；
Metal nitride layer is formed on the substrate；
Bottom antireflective coating is formed in the metal nitride layer surface；
Patterned photoresist layer is formed on the bottom antireflective coating surface；
It is characterized in that, further including：Before forming patterned photoresist layer, hot place is carried out to the bottom antireflective coating
Reason so that diffuse into the alkaline matter volatilization of bottom antireflective coating from metal nitride layer or decompose.
2. the forming method of semiconductor structure as described in claim 1, which is characterized in that the metal nitride layer is TiN
Or TaN, metal nitride with a thickness of 800~1200 angstroms.
3. the forming method of semiconductor structure as described in claim 1, which is characterized in that the bottom antireflective coating
Heat treatment temperature >=120 degree Celsius.
4. the forming method of semiconductor structure as claimed in claim 3, which is characterized in that the bottom antireflective coating
The temperature of heat treatment is 120~180 degrees Celsius, and heat treatment time is 10~60 seconds.
5. the forming method of semiconductor structure as described in claim 1 or 4, which is characterized in that described to form patterned light
Photoresist layer to formed between bottom antireflective coating have the first delay time, first delay time >=10 hour.
6. the forming method of semiconductor structure as described in claim 1, which is characterized in that after being heat-treated, carry out first
Cooling treatment.
7. the forming method of semiconductor structure as described in claim 1, which is characterized in that the shape of the bottom antireflective coating
It is at process：First baking processing is carried out to substrate；Second cooling treatment is carried out to substrate；Using spin coating proceeding in the metal
Bottom antireflective coating is formed on nitride layer；Soft baking processing is carried out to the bottom antireflective coating；It is carried out after soft baking processing
Third cooling treatment.
8. the forming method of semiconductor structure as described in claim 1, which is characterized in that the patterned photoresist layer
Forming process is：Photoresist layer is formed on the bottom antireflective coating using spin coating proceeding；Soft baking is carried out to photoresist layer
Processing；The 4th cooling treatment is carried out to substrate after soft baking processing；Processing is exposed to photoresist layer；To the photoresist layer into
It is baked after row exposure；Development treatment is carried out to the photoresist layer baked after exposure, forms photoetching offset plate figure；To the figure after development
The photoresist layer of change carries out hard baking processing；To hard baking, treated that patterned photoresist layer carries out the 5th cooling treatment.
9. the forming method of semiconductor structure as described in claim 1, which is characterized in that further include：With described patterned
Photoresist layer is exposure mask, etches the metal nitride layer, forms local interlinkage structure.
10. the forming method of semiconductor structure as described in claim 1, which is characterized in that further include：Forming nitride metal
Before object, metal layer is formed on the substrate；Metal nitride layer is formed on the metal layer.
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| CN201610041504.7A CN105514030B (en) | 2016-01-21 | 2016-01-21 | The forming method of semiconductor structure |
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| CN201610041504.7A CN105514030B (en) | 2016-01-21 | 2016-01-21 | The forming method of semiconductor structure |
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| CN105514030B true CN105514030B (en) | 2018-11-16 |
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| CN109427541A (en) * | 2017-08-29 | 2019-03-05 | 中芯国际集成电路制造(北京)有限公司 | The forming method of semiconductor devices |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6130155A (en) * | 1999-07-02 | 2000-10-10 | Promos Technologies, Inc. | Method of forming metal lines in an integrated circuit having reduced reaction with an anti-reflection coating |
| CN102087993A (en) * | 2009-12-04 | 2011-06-08 | 中芯国际集成电路制造(上海)有限公司 | Groove forming method |
| CN102569168A (en) * | 2010-12-23 | 2012-07-11 | 无锡华润上华半导体有限公司 | Manufacturing method of metal interconnection line |
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2016
- 2016-01-21 CN CN201610041504.7A patent/CN105514030B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6130155A (en) * | 1999-07-02 | 2000-10-10 | Promos Technologies, Inc. | Method of forming metal lines in an integrated circuit having reduced reaction with an anti-reflection coating |
| CN102087993A (en) * | 2009-12-04 | 2011-06-08 | 中芯国际集成电路制造(上海)有限公司 | Groove forming method |
| CN102569168A (en) * | 2010-12-23 | 2012-07-11 | 无锡华润上华半导体有限公司 | Manufacturing method of metal interconnection line |
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