CN105510523A

CN105510523A - Failure analysis method for triode transistor

Info

Publication number: CN105510523A
Application number: CN201410493808.8A
Authority: CN
Inventors: 黄武
Original assignee: Individual
Current assignee: Market Supervision And Administration Bureau Of Babu District Hezhou City
Priority date: 2014-09-25
Filing date: 2014-09-25
Publication date: 2016-04-20
Anticipated expiration: 2034-09-25
Also published as: CN105510523B

Abstract

The invention provides a failure analysis method for triode transistors, which includes the following steps: (A) performing visual inspection to triode transistor samples required to be analyzed to determine whether the samples are damaged or like or not; (B) performing electrical property detection to the triode transistor samples and analyzing possible failure reasons; (C) performing X-ray perspective detection to the triode transistor samples to determine the internal structures of the triode transistor samples; (D) preparing metallographic cross-section samples from the triode transistor samples and grinding the metallographic cross-section samples to the positions of gold wires one-by-one according to the internal structures of the triode transistor samples, and observing and analyzing the metallographic cross-section samples under a metallographic microscope; and (E) determining the failure reasons of the triode transistors with comprehensive consideration about the results in the above steps. Compared with the prior art, the method allows the structure and connection status of internal gold wires in the triode transistors to be observed, thereby finding the failure reasons of the triode transistors more deeply.

Description

A kind of failure analysis method of transistor

[technical field]

The present invention relates to a kind of failure analysis method, espespecially a kind of failure analysis method of transistor.

[background technology]

Transistor, be one of the most frequently used basic components and parts, the effect mainly Current amplifier of transistor, it is the core parts of electronic circuit, the element of present large scale integrated circuit i.e. transistor.

Transistor basic structure is the PN junction making two close proximity on a block semiconductor substrate, two PN junctions are divided into three parts bulk semiconductor, center section is base, two side portions is launch site and collecting zone, arrangement mode has PNP and NPN two kinds, three districts are connected by metal wire (gold thread or aluminum steel) and are drawn corresponding electrode each other, are respectively base stage b emitter e and collector c.PN junction between launch site and base is emitter junction, and the PN junction between collecting zone and base is on collector.Base is very thin, and launch site is thicker, and impurity concentration is large, and what positive-negative-positive transistor launch site was launched is hole, and its moving direction is consistent with direction of current; What negative-positive-negative transistor launch site was launched is free electron, and its moving direction is contrary with direction of current.Silicon crystal triode and germnium transistor have PNP and NPN type two type.

Owing to often there will be the Problem of Failure of transistor in the actual production and use of transistor, thus affect the overall performance of product, therefore, failure analysis is carried out to inefficacy product there is very positive realistic meaning.Existing transistor failure analysis method analyzes reason by electrical detection, but this detection method often have ignored structure and the connection thereof of its inner gold thread, does not therefore have actual directive significance.

Therefore, the failure analysis method that a kind of transistor is provided is necessary, to overcome the problems referred to above.

[summary of the invention]

The object of the present invention is to provide a kind of failure analysis method that can be interconnected the transistor of situation between the structure Ji Sange district of the inner gold thread of analyzing crystal triode.

The failure analysis method of a kind of transistor of the present invention, the technical scheme of employing comprises the following steps:

Step 1: to needing the transistor sample analyzed to carry out visual inspection, confirms that whether it is damaged and so on;

Step 2: carry out electrical detection to transistor sample, analyzes possible actual effect reason;

Step 3: carry out X-Ray fluoroscopic examination to transistor sample, confirms the inner structure of transistor;

Step 4: transistor sample making is become metallographic microsection sample;

Step 5: according to the inner structure of transistor, is ground to gold thread position one by one by metallographic microsection sample, and carries out observation analysis under metaloscope;

Step 6: the result that comprehensive above-mentioned steps draws, determines the failure cause of transistor.

Further, in step 4, pour into a mould, thus make metallographic microsection sample to the outside of transistor sample to be analyzed, described cast is poured into a mould by epoxy resin.

Further, in step 5, polisher lapper is utilized to carry out mechanical lapping to metallographic microsection sample, described grinding comprises: be first ground to the position close to gold thread with 120-800 order emery paper, then at metallography microscope Microscopic observation, whether it is about to put in place, carry out fine grinding with the emery paper of 800 orders or more again, more whether it puts at metallography microscope Microscopic observation in place, finally stick on polishing cloth with diamond polishing liquid and carry out polishing.

The present invention compared with prior art unlike, The inventive process provides the structure and connection of observing the inner gold thread of transistor, thus more in depth find out the reason that transistor lost efficacy.

[accompanying drawing explanation]

Fig. 1 is the non-defective unit figure of transistor gold thread;

Fig. 2 is the defective products schematic diagram of transistor gold thread.

[embodiment]

The failure analysis method of a kind of transistor of the present invention, concrete steps are as follows:

Step 4: the outside of transistor sample to be analyzed is poured into a mould, thus makes metallographic microsection sample, described cast is poured into a mould by epoxy resin;

Step 5: according to the inner structure of transistor, polisher lapper is utilized by metallographic microsection sample to carry out mechanical lapping to metallographic microsection sample, described grinding comprises: be first ground to the position close to gold thread with 120-800 order emery paper, then at metallography microscope Microscopic observation, whether it is about to put in place, fine grinding is carried out again with the emery paper of 800 orders or more, at metallography microscope Microscopic observation, whether it puts in place again, finally stick on polishing cloth with diamond polishing liquid and carry out polishing, then carry out observation analysis under metaloscope;

Step 6: the result that comprehensive above-mentioned steps draws, determine the failure cause of transistor, refer to Fig. 1 and Fig. 2, Fig. 1 is non-defective unit figure, Fig. 2 is defective products figure, can contrast from figure, in Fig. 2, the place of red arrow mark is asymmetric position, gold thread right and left shoulders asymmetric, thus affect the resistance value of transistor, and then the quality of transistor can be affected.

In sum, The inventive process provides the structure and connection of observing the inner gold thread of transistor, thus more in depth find out the reason of transistor inefficacy.

Claims

1. a failure analysis method for transistor, is characterized in that comprising the following steps:

Step 4: transistor sample making is become metallographic microsection sample;

2. the failure analysis method of a kind of transistor as claimed in claim 1, is characterized in that: in step 4, pours into a mould, thus make metallographic microsection sample to the outside of transistor sample to be analyzed.

3. the failure analysis method of a kind of transistor as claimed in claim 2, is characterized in that: described cast is poured into a mould by epoxy resin.

4. the failure analysis method of a kind of transistor as claimed in claim 1, is characterized in that: in step 5, utilizes polisher lapper to carry out mechanical lapping to metallographic microsection sample.

5. the failure analysis method of a kind of transistor as claimed in claim 4, it is characterized in that: described grinding comprises: be first ground to the position close to gold thread with 120-800 order emery paper, then at metallography microscope Microscopic observation, whether it is about to put in place, fine grinding is carried out again with the emery paper of 800 orders or more, at metallography microscope Microscopic observation, whether it puts in place again, finally sticks on polishing cloth with diamond polishing liquid and carries out polishing.