CN104425302B - The defect inspection method and device of semiconductor devices - Google Patents
The defect inspection method and device of semiconductor devices Download PDFInfo
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- CN104425302B CN104425302B CN201310398712.9A CN201310398712A CN104425302B CN 104425302 B CN104425302 B CN 104425302B CN 201310398712 A CN201310398712 A CN 201310398712A CN 104425302 B CN104425302 B CN 104425302B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Abstract
The defect inspection method and device of a kind of semiconductor devices, wherein, the defect inspection method of semiconductor devices includes：Wafer to be detected is provided；Obtain the defective locations on the wafer to be detected；Being generated according to the defective locations at least has a defect in some Region Of Interests, each Region Of Interest；Obtain the defective locations data in Region Of Interest；The defect of the Region Of Interest is detected according to the defective locations data in the Region Of Interest, the defect parameters in Region Of Interest are obtained.Defect inspection method efficiency high, the accuracy of the semiconductor devices are high, testing result accurate stable.
Description
Technical field
The present invention relates to the defect inspection method and dress of technical field of manufacturing semiconductors, more particularly to a kind of semiconductor devices
Put.
Background technology
Semiconductor integrated circuit chip is made by batch processing, can form a large amount of various types of half on the same substrate
Conductor device, and interconnected with complete electric function.Wherein, defect produced in either step, all may be used
The failure of circuit production can be caused.Therefore, in manufacture craft, often need to carry out defects detection to the making structure of each step process
And analysis, the reason for defect occurs is found out, and excluded.However, with super large-scale integration（ULSI, Ultra
Large Scale Integration）Develop rapidly, the integrated level more and more higher of chip, the size of device is less and less, phase
Answer, technique making in produce be enough influence device also less and less into the flaw size of flat rate, to semiconductor devices
Defects detection proposes higher requirement.
Existing defect inspection method includes：Wafer to be detected is provided；The detection wafer is detected, obtained to be checked
The defective locations surveyed on wafer；According to the defective locations on wafer to be measured, manually correspond to all kinds of devices for being used to detect and treat
The defective locations on wafer are detected, and detect the actual conditions of corresponding defect.Finally, made according to the actual conditions of defect
Handle the corresponding judgement of the defect.
However, existing defect inspection method takes, longer, workload is big and accuracy is low.
The content of the invention
The problem of present invention is solved is to provide the defect inspection method and device of a kind of semiconductor devices,.
To solve the above problems, the present invention provides a kind of defect inspection method of semiconductor devices, including：There is provided to be detected
Wafer；Obtain the defective locations on the wafer to be detected；Some Region Of Interests, each care are generated according to the defective locations
At least there is a defect in region；Obtain the defective locations data in Region Of Interest；According to the defect in the Region Of Interest
Position data is detected to the defect of the Region Of Interest, obtains the defect parameters in Region Of Interest.
Optionally, the size of the Region Of Interest is more than or equal to 8 microns.
Optionally, the resolving range of the Region Of Interest is 0.12 micron~0.20 micron.
Optionally, the method that the defect to the Region Of Interest is detected includes：According to the defective bit in Region Of Interest
Put data generation Region Of Interest defect map；Defect is scanned according to Region Of Interest defect map, to obtain defect
Parameter.
Optionally, the defect parameters include defective locations parameter and flaw size parameter.
Optionally, in addition to：The defect of Region Of Interest is checked according to the defect parameters.
Optionally, obtaining the method for the defective locations on the wafer to be detected includes：Using focus specification and design drawing
Shape standard criterion is detected to the detection wafer, marks the position not being inconsistent with focus specification or design configuration mark specification, with
Obtain the defective locations on wafer to be detected.
Accordingly, the present invention also provides a kind of defect detecting device of semiconductor devices, including：Defect location unit, is used
According to determining defects rule, the defective locations on the wafer to be detected are obtained；Region Of Interest positioning unit, for according to institute
Stating defective locations and generating at least has a defect in some Region Of Interests, each Region Of Interest；Position data extraction unit, is used
Defective locations data in acquisition Region Of Interest；Detection unit, for according to the defective locations data in the Region Of Interest
Defect to the Region Of Interest is detected, obtains the defect parameters in Region Of Interest.
Optionally, unit is checked, for being checked according to the defect parameters the defect of Region Of Interest.
Optionally, the detection unit includes：Date Conversion Unit, for using the defective locations data in Region Of Interest
Generate Region Of Interest defect map；Scanning element, for being scanned according to Region Of Interest defect map to defect, to obtain
Take defect parameters.
Compared with prior art, technical scheme has advantages below：
In the defect inspection method of the semiconductor devices, because the Region Of Interest is given birth to automatically according to defective locations
Into its accuracy is higher, and each Region Of Interest can be made accurately to cover at least one defect, therefore identified Region Of Interest
The problem of being not susceptible to mistakes and omissions defect；Secondly, detection efficiency can also be improved by generating Region Of Interest according to the defective locations, and
Reduce workload.And the detection of defect parameters is carried out subsequently through the Region Of Interest, the defect parameters obtained are accurate, it is ensured that
The accuracy and stability of defects detection result.
, can be according to lacking due to Region Of Interest positioning unit in the defect detecting device of the semiconductor devices
Sunken position automatically generates some Region Of Interests, and makes at least have a defect in each Region Of Interest, therefore identified pass
Heart district domain accuracy is high, and the problem of be not susceptible to mistakes and omissions defect.It is additionally, since with Region Of Interest positioning unit, makes care
The location efficiency in region is improved, therefore, it is possible to improve the detection efficiency of device.Therefore, the defect inspection of the semiconductor devices
The defect parameters that survey device is obtained are accurate, and defects detection result accurate stable.
Brief description of the drawings
Fig. 1 is a kind of schematic flow sheet of defect inspection method；
Fig. 2 is the schematic flow sheet of the defect inspection method of the semiconductor devices of the embodiment of the present invention；
Fig. 3 to Fig. 7 is the schematic diagram of the defect inspection process embodiment of the semiconductor devices of the present invention；
Fig. 8 is the schematic diagram of the defect detecting device embodiment of the semiconductor devices of the present invention.
Embodiment
As stated in the Background Art, the time-consuming longer, workload of existing defect inspection method is big and accuracy is low.
Fig. 1 specifically is refer to, is a kind of schematic flow sheet of defect inspection method, including：
There is provided wafer to be detected by step S11；
Step S12, detects to the detection wafer, marks the defective locations on wafer to be detected；
Step S13, according to the defective locations marked, obtains all defective locations numbers on the wafer to be detected
According to；
After step s 13, step S14 or S15 are performed, wherein：
Step S14, according to the defective locations data, makes checking device（Such as microscope）Found on wafer to be detected
Defect position, and check by the detection means actual conditions of the defect, the semiconductor structure of such as fault location
Position, structure and size and design standard between difference；
Step S15, by the defective locations data input detection means（Inspection Tool）, according to the defect
Position data delimit Region Of Interest in the detection means, the detection means is scanned detection to Region Of Interest, if
Detection means is scanned to the defect in Region Of Interest, then obtains defect parameters（Including position, structure and size）；
After the step s 15, step S16 is performed, according to the defect parameters, using reviewing means（Review Tool）
Defect on wafer to be measured is checked, to determine the actual conditions of defect.
No matter from said process, step S14 or step S15 is performed after step s 13, be required to according to defect
Position data, manual positioning checking device or detection means.Specifically, when performing step S14, obtaining lacking for wafer to be measured
Fall into after position data, according to the defective locations data, mobile checking device is checked to corresponding fault location, and one by one manually
The actual conditions of each defect, so that the processing made to these defects judges.And when performing step S15, by defective locations
, it is necessary to delimit some care areas manually in detection means according to the defective locations data after data input detection means
Domain, makes at least have a defect in each Region Of Interest, then detection means is scanned successively to these Region Of Interests, from
And obtain the defect parameters in each Region Of Interest.
Wherein, when by manualling locate checking device, the difficulty for being accurately positioned the checking device to fault location is larger,
And the situation of each defect is checked one by one, and huge workload is caused, and it is time-consuming tediously long.Secondly, according to the defective bit
When putting data and delimiting some Region Of Interests manually in detection means, it is difficult to ensure that the Region Of Interest can accurately cover defect
Position, the defect parameters for easily causing scanning acquisition are inaccurate；Can equally workload be caused to increase moreover, delimiting Region Of Interest manually
Plus.Therefore, the time-consuming longer, workload of the method for drawbacks described above detection is big and accuracy is low.
In order to solve the above problems, the present invention proposes a kind of defect inspection method of semiconductor devices, including：Obtain to be checked
The defective locations surveyed on wafer；Generated according to the defective locations scarce with least one in Region Of Interest, the Region Of Interest
Fall into；Obtain the defective locations data in Region Of Interest；According to the defective locations data in the Region Of Interest to the care area
The defect in domain is detected, obtains the defect parameters in Region Of Interest.Wherein, due to the Region Of Interest by defective locations from
Dynamic generation, its accuracy is higher, and each Region Of Interest can be made accurately to cover at least one defect, therefore identified care area
The problem of mistakes and omissions defect is not susceptible in domain；Secondly, detection effect can also be improved by generating Region Of Interest according to the defective locations
Rate, and reduce workload.And the detection of defect parameters is carried out subsequently through the Region Of Interest, the defect parameters essence obtained
Really, it is ensured that the accuracy and stability of defects detection result.
It is understandable to enable the above objects, features and advantages of the present invention to become apparent, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
Fig. 2 is the schematic flow sheet of the defect inspection method of the semiconductor devices of the embodiment of the present invention, including：
There is provided wafer to be detected by step S101；
Step S102, is detected using focus specification and design configuration standard criterion to the detection wafer, mark and
The position that focus specification or design configuration mark specification are not inconsistent, to obtain the defective locations on wafer to be detected；
Step S103, being generated according to the defective locations at least has one in some Region Of Interests, each Region Of Interest
Defect；
Step S104, obtains the defective locations data in Region Of Interest；
Step S105, Region Of Interest defect map is generated according to the defective locations data in Region Of Interest；
Step S106, is scanned according to Region Of Interest defect map to defect, to obtain the defect in Region Of Interest
Parameter；
Step S107, is checked the defect of Region Of Interest according to the defect parameters.
Fig. 3 to Fig. 7 is the schematic diagram of the defect inspection process of the semiconductor devices of the embodiment of the present invention.
Refer to Fig. 3, there is provided wafer 200 to be detected；Using focus specification and design configuration standard criterion to the detection
Wafer is detected, marks the position not being inconsistent with focus specification or design configuration mark specification, to obtain on wafer 200 to be detected
Defective locations 201.
The wafer to be detected 200 include substrate and be formed in the substrate or substrate surface semiconductor structure,
And the semiconductor structure can be used in constituting chip circuit, to realize specific chip functions；Wherein, the substrate includes silicon
Substrate, germanium substrate, silicon carbide substrates, germanium silicon substrate, silicon-on-insulator substrate, germanium substrate on insulator；The semiconductor structure
Formation process include photoetching, deposition, etching and ion implanting etc., the semiconductor structure formed includes etching through hole, metal
Interconnection line, polysilicon structure etc..
For the technique of existing formation semiconductor structure, it is difficult to can have formed semiconductor structure with avoiding
Defect, and defect produced in either step in technical process is all easily caused formed chip circuit failure.Moreover,
Improved constantly with the integrated level of chip, the size of the semiconductor structure in chip constantly reduces so that produced in technical process
Influence of the raw defect to chip into flat rate is also bigger, and the following defect found early in technical process reduces defect as far as possible
The influence that chip is made is, it is necessary to which the defect produced by technical process is detected, and defect is judged, to find out
The method for eliminating defect.
The wafer to be detected 200 is the substrate for having been formed with the semiconductor structure in segment chip, the wafer to be measured
200 have some unit areas arranged in array（shot）, and the semiconductor structure at least two unit areas is identical.When
When semiconductor structure in unit area is identical, the identical semiconductor structure is formed by identical technique, therefore, in tool
In the unit area for having identical semiconductor structure, the position of defect is identical.As shown in figure 3, showing a unit area 210.
The wafer 200 to be detected is loaded to detection device, the wafer 200 to be detected is detected, obtained
Obtain the figure Butut of the semiconductor structure on the surface of wafer 200 to be detected.By the semiconductor on the surface of wafer 200 to be detected
The figure Butut of structure is inputted into defect location unit, to determine the wafer to be detected 200 for the figure Butut
Defective locations.
There is focus specification in the defect location unit（Hotspot Spec）With design configuration mark specification（Design
Pattern Spec）, inputted by the figure Butut of wafer 200 to be measured after defect location unit, the defect location unit
The figure Butut of the wafer 200 to be measured can be compared with focus specification, design configuration mark specification, when the crystalline substance to be measured
When the figure Butut of circle 200 is with focus specification or inconsistent design configuration mark specification, that is, the inconsistent position is marked, from
And obtain the defective locations 201 on wafer 200 to be measured.
Wherein, the focus specification is that the surface of wafer 200 to be measured easily occurs at the position of defect, semiconductor structure
Test pattern.Specifically, there is provided some wafers before the wafer 200 to be measured is detected, and some crystal column surfaces
It is semiconductor figure and formation process, identical with the figure and formation process of the semiconductor structure on the surface of wafer 200 to be measured；Examine successively
The defect of the semiconductor structure of some crystal column surfaces is surveyed, records in some wafers and the hotspot location of defect occurred and described
The test pattern of semiconductor structure at hotspot location, forms focus specification.When detecting the wafer 200 to be measured, to be measured
Find hotspot location on the figure Butut of wafer 200, and detect the semiconductor structure figure at the hotspot location of wafer 200 to be measured
Whether it is consistent with test pattern.
Test pattern when the design configuration mark specification is the semiconductor structural designs on the surface of wafer 200 to be measured.
When detecting the wafer 200 to be measured, the figure Butut of wafer 200 to be measured is compared with test pattern and match, if not
It is consistent, then inconsistent position is marked.
Fig. 4 is refer to, Fig. 4 is the enlarged drawing of unit area 210 in Fig. 3, and some passes are generated according to the defective locations 201
At least there is a defect in heart district domain 202, each Region Of Interest 202；Obtain the defective locations data in Region Of Interest 202.
Obtaining wafer 200 to be detected（As shown in Figure 3）On some defective locations 201 after, Region Of Interest positioning is single
Member can automatically generate a Region Of Interest 202 for defective locations 201, and the Region Of Interest 202 is i.e. follow-up to be needed using inspection
Survey the region that unit carries out defects detection；A defective locations 201 are at least completely covered in each Region Of Interest 202；Moreover, described close
The size in heart district domain 202 needs to be more than or equal to pre-set dimension；In the present embodiment, the pre-set dimension is 8 microns.Due to described
Region Of Interest 202 is automatically generated by Region Of Interest positioning unit according to defective locations 201, can shorten detection time, improves inspection
Efficiency is surveyed, and reduces the workload of testing staff, moreover, resulting Region Of Interest 202 is also more accurate, so that after
Continuous when being scanned with scanning element to defect, it is more rapidly accurate to position, and resulting defect parameters are also more accurate.Therefore,
The defects detection efficiency of the semiconductor devices is improved and accuracy is improved.
Specifically, the figure of the Region Of Interest 202 can be circle, rectangle, triangle or polygon；It is concerned about when described
When the figure in region 202 is circle, circular diameter is more than or equal to 8 microns；When the figure of the Region Of Interest 202 is rectangle
Or during triangle, the length of side of the rectangle or triangle is more than or equal to 8 microns；When the figure of Region Of Interest 202 is polygon
When, it is more than or equal to 8 microns through the polygonal full-size.In the present embodiment, the figure of the Region Of Interest 202 is
Rectangle, the length of side of the rectangle is more than 8 microns.
After generation Region Of Interest 202, position data extraction unit can be by the defective locations in Region Of Interest 202
201 are converted into data and export, so as to obtain the defective locations data in Region Of Interest 202, the defective locations data are used for
Follow up scan defect is to obtain during defect parameters, for positioning scanning element.
Specifically, the position data extraction unit makes the figure Butut of Region Of Interest 202 have high-resolution first, then
In the high-resolution Region Of Interest 202, defective locations 201 can accurately be shown, then the defective locations number extracted
According to more accurate；The resolution ratio of the Region Of Interest 202 is in the range of 0.12 micron~0.20 micron；Improving Region Of Interest
After the resolution ratio of 202 figure Butut, the position data extraction unit can be by the defective locations in Region Of Interest 202
201 are converted into defective locations data output.For example with any in the wafer 200 to be detected for origin, in the crystalline substance to be measured
Justify 200 surface construction vertical coordinate systems, then the defective locations 201 in Region Of Interest 202 can be exported with coordinate data, that is, lack
Fall into position data.
Fig. 5 is refer to, Region Of Interest defect map is generated according to the defective locations data in Region Of Interest 202；According to
Region Of Interest defect map is scanned to defect, to obtain the defect parameters in Region Of Interest 202.
After defective locations data are obtained, detection unit can be used（Inspection Tool）It is concerned about according to described
Defective locations data in region are detected to the defect of the Region Of Interest.Wherein, the detection unit turns including data
Change unit and scanning element.
First, after position data extracting unit outputs defective locations data, the Date Conversion Unit obtains institute
Defective locations data are stated, and the defect unknown data is converted into defect map（As shown in Figure 5）.Afterwards, the data
Conversion is single to input scanning element by defect map, and the scanning element can be according to the defect distribution unit to be detected
Crystal column surface is positioned, and the scanning element is scanned the defect in Region Of Interest 202, to obtain wafer to be detected
The specific defect parameter of each defect in 200, the defect parameters include defective locations parameter and flaw size parameter, i.e. defect
The actual size of semiconductor structure at position, position, structural parameters.And testing staff can be according to the wafer to be detected
200 defect parameters, are judged, or checked to each defect.
It should be noted that in the present embodiment, after the Region Of Interest defect map is formed, being carried out to defect
Before scanning, the Region Of Interest defect map is verified.Specifically, as shown in fig. 6, will lack in Date Conversion Unit
Sunken position data is converted to after defect map, and the defect map and simulated defect figure are carried out into matching is compared, with core
Whether the defect map for looking into the Date Conversion Unit output is correct；Wherein, the simulated defect figure is obtained by analogue unit
Take after defective locations data, the defective locations data are converted into figure and obtained.
Fig. 7 is refer to, the defect of Region Of Interest 202 is checked according to the defect parameters.
After the defect parameters are obtained, testing staff can carry out analysis judgement to the defect parameters, with decision pair
The processing of the defect., can be according to the defective bit of the defect when testing staff thinks to need to check a certain defect
Putting parameter makes check unit（Review Tool）In wafer 200 to be detected（As shown in Figure 3）Surface is positioned, to check this
The actual conditions of defect；Wherein, the review tool can be electron microscope.As shown in fig. 7, for review tool according to defect
The actual conditions for the defect that parameter is viewed, wherein, bridged between adjacent metal interconnection line, as shown in region 220, institute
Chip circuit short circuit can be caused by stating the bridge joint between metal interconnection wire, make chip circuit failure.According to the defect viewed
Actual conditions, can be adjusted to the technique for the semiconductor structure for forming the surface of wafer 200 to be detected, realize and eliminate institute
State the purpose of defect.
In the defect inspection method of the semiconductor devices of the present embodiment, because the Region Of Interest is automatic according to defective locations
Generation, its accuracy is higher, and each Region Of Interest can be made accurately to cover at least one defect, therefore identified Region Of Interest
The problem of being inside not susceptible to mistakes and omissions defect；Secondly, detection efficiency can also be improved by generating Region Of Interest according to the defective locations,
And reduce workload.And the detection of defect parameters is carried out subsequently through the Region Of Interest, the defect parameters obtained are accurate, protect
The accuracy and stability of defects detection result are demonstrate,proved.
Accordingly, embodiments of the invention also provide a kind of defect detecting device of semiconductor devices, refer to Fig. 8, bag
Include：Defect location unit 300, for according to determining defects rule, obtaining the defective locations on the wafer to be detected；It is concerned about area
Domain positioning unit 301, at least has one for being generated according to the defective locations in some Region Of Interests, each Region Of Interest
Defect；Position data extraction unit 302, for obtaining the defective locations data in Region Of Interest；Detection unit 303, for root
The defect of the Region Of Interest is detected according to the defective locations data in the Region Of Interest, lacking in Region Of Interest is obtained
Fall into parameter.
Wherein, the detection unit 303 includes：Date Conversion Unit 330, for using the defective locations in Region Of Interest
Data generate Region Of Interest defect map；Scanning element 331, for being swept according to Region Of Interest defect map to defect
Retouch, to obtain defect parameters.
The defect detecting device of semiconductor devices also includes：Check unit 304, for according to the defect parameters to be concerned about
The defect in region is checked.
In addition, the defect detecting device of the semiconductor devices also includes analogue unit 305, for obtaining defective locations number
Simulated defect figure is converted to after, and by the defective locations data；The simulated defect figure is used for and defect map
It is whether correct with the defect map for verifying Date Conversion Unit output with comparing.
In the present embodiment, in the defect detecting device of semiconductor devices, due to Region Of Interest positioning unit, Neng Gougen
Some Region Of Interests are automatically generated according to defective locations, and make that at least there is a defect in each Region Of Interest, therefore are determined
Region Of Interest accuracy it is high, and the problem of be not susceptible to mistakes and omissions defect.It is additionally, since with Region Of Interest positioning unit, makes
The location efficiency of Region Of Interest is improved, therefore, it is possible to improve the detection efficiency of device.Therefore, the semiconductor devices is scarce
The defect parameters that sunken detection means is obtained are accurate, and defects detection result accurate stable.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, are not departing from this
In the spirit and scope of invention, it can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
The scope of restriction is defined.
Claims (9)
1. a kind of defect inspection method of semiconductor devices, it is characterised in that including：
Wafer to be detected is provided；
The wafer to be detected is detected using focus specification and design configuration standard criterion, marks and focus specification or sets
The position that meter figure mark specification is not inconsistent, to obtain the defective locations on the wafer to be detected；
Being generated according to the defective locations at least has a defect in some Region Of Interests, each Region Of Interest；
Obtain the defective locations data in Region Of Interest；
The defect of the Region Of Interest is detected according to the defective locations data in the Region Of Interest, Region Of Interest is obtained
Interior defect parameters.
2. the defect inspection method of semiconductor devices as claimed in claim 1, it is characterised in that the size of the Region Of Interest is big
In or equal to 8 microns.
3. the defect inspection method of semiconductor devices as claimed in claim 1, it is characterised in that the resolution ratio of the Region Of Interest
Scope is 0.12 micron~0.20 micron.
4. the defect inspection method of semiconductor devices as claimed in claim 1, it is characterised in that to the defect of the Region Of Interest
The method detected includes：Region Of Interest defect map is generated according to the defective locations data in Region Of Interest；According to pass
Heart district domain defect map is scanned to defect, to obtain defect parameters.
5. the defect inspection method of semiconductor devices as claimed in claim 1, it is characterised in that the defect parameters include defect
Location parameter and flaw size parameter.
6. the defect inspection method of semiconductor devices as claimed in claim 1, it is characterised in that also include：According to the defect
Parameter is checked the defect of Region Of Interest.
7. a kind of defect detecting device of semiconductor devices, for detecting wafer to be measured, it is characterised in that including：
Defect location unit, for being detected according to focus specification and design configuration standard criterion to the wafer to be detected,
The position not being inconsistent with focus specification or design configuration mark specification is marked, to obtain the defective locations on the wafer to be detected；
Region Of Interest positioning unit, for being generated according to the defective locations in some Region Of Interests, each Region Of Interest at least
With a defect；
Position data extraction unit, for obtaining the defective locations data in Region Of Interest；
Detection unit, for being examined according to the defective locations data in the Region Of Interest to the defect of the Region Of Interest
Survey, obtain the defect parameters in Region Of Interest.
8. the defect detecting device of semiconductor devices as claimed in claim 7, it is characterised in that also include：Unit is checked, is used for
The defect of Region Of Interest is checked according to the defect parameters.
9. the defect detecting device of semiconductor devices as claimed in claim 7, it is characterised in that the detection unit includes：Number
According to converting unit, for generating Region Of Interest defect map using the defective locations data in Region Of Interest；Scanning element, is used
Defect is scanned according to Region Of Interest defect map, to obtain defect parameters.
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|---|---|---|---|---|
| CN106935528A (en) * | 2017-05-08 | 2017-07-07 | 合肥市华达半导体有限公司 | A kind of defect inspection method of semiconductor components and devices |
| CN108346592B (en) * | 2018-01-17 | 2020-06-23 | 武汉新芯集成电路制造有限公司 | Method and device for simulating defects on back of wafer |
| CN108461371B (en) * | 2018-05-08 | 2020-08-25 | 德淮半导体有限公司 | Electron beam scanning apparatus, defect detection system and method |
| CN110261270B (en) * | 2019-07-18 | 2023-02-21 | 西安奕斯伟材料科技有限公司 | Method and device for analyzing silicon wafer defects |
| CN112417191B (en) * | 2019-08-20 | 2023-09-26 | 华润微电子（重庆）有限公司 | Defect scanning result processing method, device, system and storage medium |
| US11231376B2 (en) * | 2019-08-29 | 2022-01-25 | Taiwan Semiconductor Manufacturing Company Ltd. | Method for semiconductor wafer inspection and system thereof |
| CN110690136A (en) * | 2019-10-12 | 2020-01-14 | 上海华力微电子有限公司 | Defect detection method and system |
| CN111341686B (en) * | 2020-03-10 | 2022-04-19 | 上海华力微电子有限公司 | Method and device for detecting wafer defects |
| CN111816599B (en) * | 2020-07-14 | 2021-05-18 | 长江存储科技有限责任公司 | Die locator and die locating method |
| CN113241310B (en) * | 2021-05-28 | 2022-07-15 | 长江存储科技有限责任公司 | Wafer defect detection method, detection device, detection equipment and readable storage medium |
| CN115994882A (en) * | 2021-10-18 | 2023-04-21 | 长鑫存储技术有限公司 | Defect detection method, device, equipment and storage medium |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1276577A (en) * | 1999-06-02 | 2000-12-13 | 松下电器产业株式会社 | Pattern defect testing method |
| CN102789999A (en) * | 2012-08-16 | 2012-11-21 | 上海华力微电子有限公司 | Defect detecting method for utilizing graphic features to scan and manufacturing method of semiconductor chip |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6785617B2 (en) * | 2001-07-13 | 2004-08-31 | Promos Technologies Inc. | Method and apparatus for wafer analysis |
-
2013
- 2013-09-04 CN CN201310398712.9A patent/CN104425302B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1276577A (en) * | 1999-06-02 | 2000-12-13 | 松下电器产业株式会社 | Pattern defect testing method |
| CN102789999A (en) * | 2012-08-16 | 2012-11-21 | 上海华力微电子有限公司 | Defect detecting method for utilizing graphic features to scan and manufacturing method of semiconductor chip |
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