CN105489615A - 用于amoled的薄膜晶体管阵列基板及其制造方法 - Google Patents

用于amoled的薄膜晶体管阵列基板及其制造方法 Download PDF

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CN105489615A
CN105489615A CN201610022428.5A CN201610022428A CN105489615A CN 105489615 A CN105489615 A CN 105489615A CN 201610022428 A CN201610022428 A CN 201610022428A CN 105489615 A CN105489615 A CN 105489615A
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CN105489615B (zh
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张合静
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Abstract

本发明提供一种用于AMOLED的薄膜晶体管阵列基板及其制造方法，所述薄膜晶体管阵列基板包括：一基板；数个薄膜晶体管像素单元，设置在所述基板上，每一薄膜晶体管像素单元包括至少一驱动薄膜晶体管及至少一开关薄膜晶体管；一第一电极图案层，设置在所述基板上；一绝缘层，设置于所述基板上，并覆盖所述驱动薄膜晶体管及开关薄膜晶体管的栅极及所述第一电极图案层；以及一第二电极图案层，设置在所述绝缘层上，并与所述第一电极图案层部分重叠，其中所述绝缘层在所述重叠处具有较大的厚度，在非重叠处具有较小的厚度。

Description

用于AMOLED的薄膜晶体管阵列基板及其制造方法
【技术领域】
本发明涉及平面显示领域，尤其涉及一种用于AMOLED的薄膜晶体管阵列基板及其制造方法。
【背景技术】
现有的有源矩阵有机发光二极管(Active-matrixorganiclightemittingdiode，AMOLED)显示装置一般包括：基板、形成于基板上的薄膜晶体管(ThinFilmTransistor，TFT)及形成于薄膜晶体管上的有机发光二极管本体。具体地说，所述有源矩阵有机发光二极管显示装置在一个像素中具有开关薄膜晶体管和驱动薄膜晶体管。开关薄膜晶体管用于对像素电压也就是栅极驱动电压寻址，而驱动薄膜晶体管用来控制有机发光二极管本体的驱动电流。
在制备有源矩阵有机发光二极管显示装置时，所述驱动薄膜晶体管和开关薄膜晶体管的栅极绝缘层(GateInsulator)同时形成，厚度相同，这就使得所述驱动薄膜晶体管和开关薄膜晶体管的栅极电容的大小相等，而薄膜晶体管的亚阈值摆幅(sub-thresholdswing，S.S.)取决于栅极电容大小，又栅极电容大小取决于栅极绝缘层的厚度，因此当驱动薄膜晶体管和开关薄膜晶体管的栅极绝缘层的厚度相等时，就导致驱动薄膜晶体管和开关薄膜晶体管的亚阈值摆幅也相等。
开关薄膜晶体管需要有较小的亚阈值摆幅以达到快速充放电的目的；驱动薄膜晶体管需要相对较大一点的亚阈值摆幅以利于灰阶的显示。因此，在所述驱动薄膜晶体管和开关薄膜晶体管的亚阈值摆幅的大小相等的情况下，相对较小的亚阈值摆幅会不利于有源矩阵有机发光二极管显示装置的灰阶显示；相对较大的亚阈值摆幅则会降低充放电速度，从而影响显示电路的操作速度。可见，驱动薄膜晶体管亚阈值摆幅与开关薄膜晶体管的亚阈值摆幅之间存在矛盾。
再者，在所述有源矩阵有机发光二极管显示装置中，垂直跨线的电极在制程不稳定的情况下容易发生短路，且电极与它们之间的绝缘层形成的寄生电容不利于高阶显示。
故，有必要提供一种用于AMOLED的薄膜晶体管阵列基板及其制造方法，以解决现有技术所存在的问题。
【发明内容】
有鉴于现有技术的缺点，本发明的主要目的在于提供一种用于AMOLED的薄膜晶体管阵列基板，其结构有利于灰阶定义并维持较佳的电路操作速度。
本发明的另一目的在于提供一种用于AMOLED的薄膜晶体管阵列基板的制造方法，能在保持开关薄膜晶体管的亚阈值摆幅较小的前提下有效提高驱动薄膜晶体管的亚阈值摆幅，进而在不影响操作电压及电路操作速度的情况下，可以很好的定义灰阶，从而提升面板的显示品质；同时所述制造方法可以减少制程不稳定导致的电极短路概率，提高良率，还能有效减少寄生电容。
为实现上述目的，本发明提供一种用于AMOLED的薄膜晶体管阵列基板，包括：一基板；数个薄膜晶体管像素单元，设置在所述基板上，每一薄膜晶体管像素单元包括至少一驱动薄膜晶体管及至少一开关薄膜晶体管；一第一电极图案层，设置在所述基板上；一绝缘层，设置于所述基板上，并覆盖所述驱动薄膜晶体管及开关薄膜晶体管的栅极及所述第一电极图案层；以及一第二电极图案层，设置在所述绝缘层上，并与所述第一电极图案层部分重叠，其中所述绝缘层在所述重叠处具有较大的厚度，在非重叠处具有较小的厚度。
在本发明的一实施例中，所述绝缘层在对应所述驱动薄膜晶体管的栅极位置也具有较大的厚度；在对应所述开关薄膜晶体管的栅极位置具有较小的厚度。
在本发明的一实施例中，所述绝缘层在所述第二电极图案层与所述第一电极图案层的重叠处的厚度大致等于所述绝缘层在对应所述驱动薄膜晶体管的栅极位置的厚度。
在本发明的一实施例中，所述第一电极图案层构成一储存电容的下电极、数个扫描线；所述第二电极图案层构成所述储存电容的上电极、数个数据线。
在本发明的一实施例中，所述第一电极图案层还构成所述驱动薄膜晶体管的栅极和所述开关薄膜晶体管的栅极；所述第二电极图案层还构成所述驱动薄膜晶体管的源极和漏极、所述开关薄膜晶体管的源极和漏极。
在本发明的一实施例中，所述储存电容的下电极连接所述驱动薄膜晶体管的栅极；所述储存电容的上电极连接所述驱动薄膜晶体管的源极。
在本发明的一实施例中，所述绝缘层包括氧化硅层、氮化硅层之一或其组合。
本发明还提供一种用于AMOLED的薄膜晶体管阵列基板的制造方法，包括以下步骤：步骤1、提供一基板；步骤2、在所述基板上形成一第一电极图案层、数个驱动薄膜晶体管的栅极及数个开关薄膜晶体管的栅极；步骤3、在所述基板上形成一绝缘层，以覆盖所述第一电极图案层、所述驱动薄膜晶体管的栅极和所述开关薄膜晶体管的栅极；步骤4、对所述绝缘层进行图案化及局部薄化处理，使得所述绝缘层被图案化并具有不同的厚度；步骤5、在所述绝缘层上对应所述开关薄膜晶体管的栅极与驱动薄膜晶体管的栅极的位置形成一半导体层；以及步骤6、在所述绝缘层上形成一第二电极图案层、所述开关薄膜晶体管的源极和漏极和驱动薄膜晶体管的源极和漏极，其中所述第二电极图案层与所述第一电极图案层部分重叠，其中所述绝缘层在所述重叠处具有较大的厚度，在非重叠处具有较小的厚度。
在本发明的一实施例中，所述绝缘层在对应所述驱动薄膜晶体管的栅极位置也具有较大的厚度；在对应所述开关薄膜晶体管的栅极位置具有较小的厚度。
在本发明的一实施例中，所述第一电极图案层构成一储存电容的下电极、数个扫描线、所述驱动薄膜晶体管的栅极和所述开关薄膜晶体管的栅极；所述第二电极图案层构成所述储存电容的上电极、数个数据线、所述驱动薄膜晶体管的源极和漏极、所述开关薄膜晶体管的源极和漏极；其中所述绝缘层在扫描线与数据线的交错处也具有较大的厚度。
本发明主要是通过图案化处理使得绝缘层在驱动薄膜晶体管的栅极上以及电极垂直跨线的重叠部位都具有较大的厚度，除了可以降低驱动薄膜晶体管的栅极电容，进而增大了驱动薄膜晶体管的亚阈值摆幅，以利于灰阶显示，同时也保持绝缘层在开关薄膜晶体管的栅极上具有较小的厚度，使得开关薄膜晶体管的亚阈值摆幅保持较小，以增加电路操作速度，电极垂直跨线的重叠部位都具有较大的厚度还可以有效减少寄生电容，故本发明可有效提高AMOLED显示装置的品质。
【附图说明】
图1是本发明用于AMOLED的薄膜晶体管阵列基板的结构示意图。
图2是本发明用于AMOLED的薄膜晶体管阵列基板的电极跨线结构示意图。
图3是本发明用于AMOLED的薄膜晶体管阵列基板的制造方法的流程图。
【具体实施方式】
为让本发明上述目的、特征及优点更明显易懂，下文特举本发明较佳实施例，并配合附图，作详细说明如下。再者，本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
本发明的薄膜晶体管阵列基板主要是应用于AMOLED显示装置，即有源矩阵有机发光二极管显示装置，主要是通过在所述薄膜晶体管阵列基板上设置有机发光二极管器件，利用所述薄膜晶体管阵列基板的驱动电路对每个有机发光二极管器件构成的像素的发光进行独立控制。请参阅图1，本发明提供的用于AMOLED的薄膜晶体管阵列基板主要包括一基板10、数个薄膜晶体管像素单元11、一第一电极图案层12、一绝缘层13及一第二电极图案层14。
所述基板100为一透明基板，可以例如是一玻璃基板或是一塑胶基板。
所述薄膜晶体管像素单元11排列成矩阵而设置在所述基板10上，每一薄膜晶体管像素单元11包括至少一驱动薄膜晶体管11A及至少一开关薄膜晶体管11B，其中所述开关薄膜晶体管11A是用于对像素电压寻址，而所述驱动薄膜晶体管11B用来控制有机发光二极管本体的驱动电流。
所述第一电极图案层12设置在所述基板上10，其可以例如是通过沉积一层金属层并将其图案化后而形成。所述第一电极图案层12构成一储存电容Cst的下电极120、数个扫描线；本实施例中，所述第一电极图案层12还构成所述驱动薄膜晶体管11A的栅极110A和所述开关薄膜晶体管11B的栅极110B；所述储存电容Cst的下电极120连接所述驱动薄膜晶体管11A的栅极110A。
所述绝缘层13设置于所述基板10上，并覆盖所述驱动薄膜晶体管11A及开关薄膜晶体管11B的栅极110A,110B，以作为栅极绝缘层；并覆盖所述第一电极图案层12。所述绝缘层13可以是包括氧化硅、氮化硅或其组合，但不在此限。
所述第二电极图案层14设置在所述绝缘层13上，其可以例如是通过沉积一层金属层并将其图案化后而形成。所述第二电极图案层14并且与所述第一电极图案层12部分重叠，其中所述绝缘层13在所述重叠处具有较大的厚度，在非重叠处具有较小的厚度。具体而言，所述第二电极图案层14可构成所述储存电容Cst的上电极140、数个数据线，其中所述数据线垂直跨过所述第一电极图案层12构成的扫描线，因此，如图2所示，扫描线与数据线的垂直跨线处即为所述第二电极图案层14与所述第一电极图案层12部分重叠处，故所述绝缘层13在扫描线与数据线的垂直跨线处具有较大的厚度d1，在非垂直跨线处则具有较小的厚度d2。所述绝缘层13在电极图案的重叠处具有较大的厚度，特别是让电极垂直跨线处的绝缘层13具有较大的厚度，不仅可以减少由于制程不稳定导致的电极短路概率，提高产品的良率，还能有效减少电极垂直跨线处的寄生电容。
此外，如图1所示，所述第二电极图案层14还可构成所述驱动薄膜晶体管11A的源极111A和漏极112A、所述开关薄膜晶体管11B的源极111B和漏极112B，其中所述驱动薄膜晶体管11A的漏极112A可连接至一有机发光二极管器件；所述开关薄膜晶体管11B的漏极111B则连接所述驱动薄膜晶体管11A的栅极110A。所述储存电容Cst的上电极140连接所述驱动薄膜晶体管11A的源极111A。如图1所示，本实施例中，所述绝缘层13在对应所述驱动薄膜晶体管11A的栅极110A位置也具有较大的厚度D1；在对应所述开关薄膜晶体管11B的栅极110B位置具有较小的厚度D2，如此一来，所述驱动薄膜晶体管11A的栅极110A具有较厚的绝缘层将可以降低驱动薄膜晶体管11A的栅极电容，进而增大了驱动薄膜晶体管11A的亚阈值摆幅，以利于灰阶显示，同时绝缘层13在开关薄膜晶体管11B的栅极110B上具有较小的厚度，可使得开关薄膜晶体管11B的亚阈值摆幅保持较小，以增加电路操作速度。在本实施例中，所述绝缘层13在所述第二电极图案层14与所述第一电极图案层12的重叠处的厚度优选大致等于所述绝缘层13在对应所述驱动薄膜晶体管11A的栅极110A位置的厚度，例如所述绝缘层13在扫描线与数据线的垂直跨线处具有的厚度d1大致等于所述绝缘层13在对应所述驱动薄膜晶体管11A的栅极110A位置的厚度D1。
配合图1并进一步参考图3所示，图3是本发明用于AMOLED的薄膜晶体管阵列基板的制造方法的流程图。上述的薄膜晶体管阵列基板的制造方法主要包含下列步骤：
步骤1、提供一基板10。
步骤2、在所述基板10上形成一第一电极图案层12、数个驱动薄膜晶体管11A的栅极110A及数个开关薄膜晶体管11B的栅极110B，在一实施例中，所述第一电极图案层12可以是通过沉积一层金属层并将其图案化后而形成，其可构成一储存电容Cst的下电极120、数个扫描线，并同时构成所述驱动薄膜晶体管11A的栅极110A和所述开关薄膜晶体管11B的栅极110B。
步骤3、在所述基板10上形成一绝缘层13，以覆盖所述第一电极图案层12、所述驱动薄膜晶体管11A的栅极110A和所述开关薄膜晶体管11B的栅极110B。
步骤4、对所述绝缘层13进行图案化及局部薄化处理，使得所述绝缘层13被图案化并具有不同的厚度；其具体的黄光工艺可为：在未经图案化的绝缘层上先形成一光阻层，然后通过灰色调掩膜(graytonemask)或半色调掩膜(half-tonemask)对光阻层曝光，使得光阻层受到的曝光程度具有选择性，并同时将掩膜图案完整的复印至光阻上。然后，再通过合适的显影液剂(developer)除去部分光阻，使得光阻层显现所需要的图案及厚度。
步骤5、在所述绝缘层13上对应所述开关薄膜晶体管11B的栅极110B与驱动薄膜晶体管11A的栅极110A的位置形成一半导体层15。
步骤6、在所述绝缘层13上形成一第二电极图案层14、所述开关薄膜晶体管11B的源极111B和漏极112B和驱动薄膜晶体管11A的源极111A和漏极112A，其中所述第二电极图案层14可以是通过沉积一层金属层并将其图案化后而形成，并可构成所述储存电容的上电极、数个数据线、所述驱动薄膜晶体管11A的源极111A和漏极112A、所述开关薄膜晶体管11B的源极111B和漏极112B。所述第二电极图案层14与所述第一电极图案层12部分重叠，其中所述绝缘层13经过上述的黄光工艺图案化后，在所述重叠处具有较大的厚度，在非重叠处具有较小的厚度。优选地，所述绝缘层13在对应所述驱动薄膜晶体管11A的栅极110A位置也具有较大的厚度；在对应所述开关薄膜晶体管11B的栅极110B位置具有较小的厚度，又所述绝缘层13在扫描线与数据线的垂直跨线处也具有较大的厚度。
通过上述步骤便完成了本发明的薄膜晶体管阵列基板的制作。
相较于现有技术，本发明的薄膜晶体管阵列基板的制造方法通过图案化处理使得绝缘层在驱动薄膜晶体管的栅极上以及电极垂直跨线的重叠部位都具有较大的厚度，除了可以降低驱动薄膜晶体管的栅极电容，进而增大了驱动薄膜晶体管的亚阈值摆幅，以利于灰阶显示，同时也保持绝缘层在开关薄膜晶体管的栅极上具有较小的厚度，使得开关薄膜晶体管的亚阈值摆幅保持较小，以增加电路操作速度，电极垂直跨线的重叠部位都具有较大的厚度还可以有效减少寄生电容，故本发明可有效提高AMOLED显示装置的品质。
本发明已由上述相关实施例加以描述，然而上述实施例仅为实施本发明的范例。必需指出的是，已公开的实施例并未限制本发明的范围。相反地，包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。

Claims (10)

1.一种用于AMOLED的薄膜晶体管阵列基板，其特征在于，包括：
一基板；
数个薄膜晶体管像素单元，设置在所述基板上，每一薄膜晶体管像素单元包括至少一驱动薄膜晶体管及至少一开关薄膜晶体管；
一第一电极图案层，设置在所述基板上；
一绝缘层，设置于所述基板上，并覆盖所述驱动薄膜晶体管及开关薄膜晶体管的栅极及所述第一电极图案层；以及
一第二电极图案层，设置在所述绝缘层上，并与所述第一电极图案层部分重叠，其中所述绝缘层在所述重叠处具有较大的厚度，在非重叠处具有较小的厚度。
2.如权利要求1所述的用于AMOLED的薄膜晶体管阵列基板，其特征在于：所述绝缘层在对应所述驱动薄膜晶体管的栅极位置也具有较大的厚度；在对应所述开关薄膜晶体管的栅极位置具有较小的厚度。
3.如权利要求2所述的用于AMOLED的薄膜晶体管阵列基板，其特征在于：所述绝缘层在所述第二电极图案层与所述第一电极图案层的重叠处的厚度大致等于所述绝缘层在对应所述驱动薄膜晶体管的栅极位置的厚度。
4.如权利要求1所述的用于AMOLED的薄膜晶体管阵列基板，其特征在于：所述第一电极图案层构成一储存电容的下电极、数个扫描线；所述第二电极图案层构成所述储存电容的上电极、数个数据线；其中所述绝缘层在扫描线与数据线的垂直跨线处也具有较大的厚度。
5.如权利要求4所述的用于AMOLED的薄膜晶体管阵列基板，其特征在于：所述第一电极图案层还构成所述驱动薄膜晶体管的栅极和所述开关薄膜晶体管的栅极；所述第二电极图案层还构成所述驱动薄膜晶体管的源极和漏极、所述开关薄膜晶体管的源极和漏极。
6.如权利要求5所述的用于AMOLED的薄膜晶体管阵列基板，其特征在于：所述储存电容的下电极连接所述驱动薄膜晶体管的栅极；所述储存电容的上电极连接所述驱动薄膜晶体管的源极。
7.如权利要求1所述的液晶显示器，其特征在于：所述绝缘层包括氧化硅层、氮化硅层之一或其组合。
8.一种用于AMOLED的薄膜晶体管阵列基板的制造方法，其特征在于，包括以下步骤：
步骤1、提供一基板；
步骤2、在所述基板上形成一第一电极图案层、数个驱动薄膜晶体管的栅极及数个开关薄膜晶体管的栅极；
步骤3、在所述基板上形成一绝缘层，以覆盖所述第一电极图案层、所述驱动薄膜晶体管的栅极和所述开关薄膜晶体管的栅极；
步骤4、对所述绝缘层进行图案化及局部薄化处理，使得所述绝缘层被图案化并具有不同的厚度；
步骤5、在所述绝缘层上对应所述开关薄膜晶体管的栅极与驱动薄膜晶体管的栅极的位置形成一半导体层；以及
步骤6、在所述绝缘层上形成一第二电极图案层、所述开关薄膜晶体管的源极和漏极和驱动薄膜晶体管的源极和漏极，其中所述第二电极图案层与所述第一电极图案层部分重叠，其中所述绝缘层在所述重叠处具有较大的厚度，在非重叠处具有较小的厚度。
9.如权利要求8所述的用于AMOLED的薄膜晶体管阵列基板的制造方法，其特征在于：所述绝缘层在对应所述驱动薄膜晶体管的栅极位置也具有较大的厚度；在对应所述开关薄膜晶体管的栅极位置具有较小的厚度。
10.如权利要求9所述的用于AMOLED的薄膜晶体管阵列基板的制造方法，其特征在于：所述第一电极图案层构成一储存电容的下电极、数个扫描线、所述驱动薄膜晶体管的栅极和所述开关薄膜晶体管的栅极；所述第二电极图案层构成所述储存电容的上电极、数个数据线、所述驱动薄膜晶体管的源极和漏极、所述开关薄膜晶体管的源极和漏极；其中所述绝缘层在扫描线与数据线的垂直跨线处也具有较大的厚度。
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