CN105487404A - DSP emulator based on magnetic isolation technology - Google Patents

DSP emulator based on magnetic isolation technology Download PDF

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Publication number
CN105487404A
CN105487404A CN201510847143.0A CN201510847143A CN105487404A CN 105487404 A CN105487404 A CN 105487404A CN 201510847143 A CN201510847143 A CN 201510847143A CN 105487404 A CN105487404 A CN 105487404A
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CN
China
Prior art keywords
chip
magnetic isolation
cpld
jtag
emulator
Prior art date
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Pending
Application number
CN201510847143.0A
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Chinese (zh)
Inventor
郭巍
骆皓
曹阳
朱剑峰
朱泓
詹熙
周红永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIANGSU HONGBAO INFINITY POWER CO Ltd
Nanjing Institute of Technology
Original Assignee
JIANGSU HONGBAO INFINITY POWER CO Ltd
Nanjing Institute of Technology
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Application filed by JIANGSU HONGBAO INFINITY POWER CO Ltd, Nanjing Institute of Technology filed Critical JIANGSU HONGBAO INFINITY POWER CO Ltd
Priority to CN201510847143.0A priority Critical patent/CN105487404A/en
Publication of CN105487404A publication Critical patent/CN105487404A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B17/00Systems involving the use of models or simulators of said systems
    • G05B17/02Systems involving the use of models or simulators of said systems electric

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

The invention relates to the field of transformer electric manufacture and especially relates to a DSP emulator based on magnetic isolation technology. The DSP emulator comprises a USB chip, a complex programmable logic device (CPLD) chip, a digital isolator based on the magnetic isolation technology, an isolation power supply module, a JTAG connector and a TVS voltage-stabilizing circuit. The DSP emulator is characterized in that an upper computer is connected with the USB chip; the USB chip is connected with the CPLD chip; and the CPLD chip is connected with an interface of the JTAG connector through the digital isolator. The designed isolation-type emulator can carry out emulation and program download on a DSP chip, an ARM chip and an MP430 single-chip microcomputer of TI, supports 2500 V isolation voltage for target board JTAG signals, can play an isolation protection role for the upper PC, can be widely applied to application occasions of the chips above, especially for simulation debugging of the chips above in a high-voltage electric power automation device control system, and has the advantages of being safe and reliable and convenient to use.

Description

A kind of DSP emulator based on Magnetic isolation technology
Technical field
The present invention relates to transformer electric power and manufacture field, particularly relate to a kind of DSP emulator based on Magnetic isolation technology.
Background technology
JTAG:JTAG is writing a Chinese character in simplified form of the prefix letter of English " JointTestActionGroup (joint test behavior tissue) ", is mainly used in: the boundary scan testing of circuit and the on-line system programming of programmable chip.Standard JTAG mainly comprises:
TCK---test clock inputs;
TDI---test data inputs, and data input JTAG mouth by TDI;
TDO---test data exports, and data are exported from JTAG mouth by TDO;
TMS---test pattern is selected, and TMS is used for arranging JTAG mouth and is in certain specific test pattern.
TRST---test reset, input pin, Low level effective.
The 14-PinJTAG interface of TI company with the addition of the privately owned pin of some TI companies on the JTAG basis of standard:
PD (Vcc)---electro-detection input on Target Board;
TCK_Ret---tck clock returns input;
EMU0---model selection input 1;
EMU1---model selection input 2.
DSP:DigitalSignalProcessor, digital signal processor, a class is used for the processor of high-speed figure computing.
Magnetic isolation: be the isolation technology based on chip-scale transformer.ICoupler magnetic coupling isolator is the magnetic coupler based on chip size transformer, different with photodiode from the light emitting diode (LED) adopted in traditional photo-coupler, iCoupler Magnetic isolation technology directly makes transformer by adopting wafer scale technique on sheet.ICoupler Magnetic isolation can realize hyperchannel and other function i ntegration under low cost condition.
Host computer PC is connected with emulator by USB interface, emulator is connected with Target Board, serious conditions is compared because Target Board may be in electromagnetic interference (EMI), Target Board may with a large amount of static charge, because emulator is connected with Target Board, both altogether, the electrostatic therefore on equipment can be delivered to the USB interface of host computer by JTAG cable, and host computer USB is burnt out, make Target Board can not continue emulation or program burn writing.
With the Target Board of dsp chip, can be widely used in the power electronic equipment such as frequency converter, photovoltaic DC-to-AC converter, these devices are in debug process, high voltage on major loop is likely delivered to JTAG emulator by Target Board, and then emulate the USB interface over-voltage breakdown of the host computer linked altogether by with JTAG, make Target Board can not continue emulation or program burn writing.
Using the Target Board of early model dsp chip, PD (Vcc)---on Target Board, electro-detection input pin can access 5V power supply, therefore by the IO over-voltage breakdown of the CPLD chip of the 3.3V Power supply in emulator, can damage emulator.
Summary of the invention
Object of the present invention is exactly for above technical matters, design a kind of DSP emulator based on Magnetic isolation technology, for host computer, the Target Board comprising TI company DSP, ARM and MP430 single-chip microcomputer is carried out to the isolation JTAG emulator of artificial debugging and download program.
Technical matters of the present invention is solved mainly through following technical proposals:
A kind of DSP emulator based on Magnetic isolation technology, comprise USB interface chip, complex programmable logic device (CPLD), based on Magnetic isolation technology digital isolator, insulating power supply module, JTAG connector and TVS mu balanced circuit composition, it is characterized in that host computer is connected with USB chip, USB chip is connected with CPLD chip, and CPLD chip is connected with jtag interface by digital isolator.
Further, DSP emulator of the present invention passes through insulating power supply module by USB input voltage after isolation, then to Magnetic isolation chip power supply, choose reasonable insulating power supply module, exporting isolation voltage can reach 3000VDC.
Further, DSP emulator of the present invention is communicated with upper computer software by USB interface chip, USB converting serial data streams that host computer sends over by USB interface chip, that pass through encapsulation is that macro instruction exports to CPLD, according to the analysis protocol preset in CPLD, resolve macro instruction and produce JTAG control signal.
Further, DSP emulator of the present invention is isolated by the JTAG signal that exported by CPLD based on the digital isolator of Magnetic isolation technology and the JTAG signal outputted between Target Board, and the digital isolator of choose reasonable Magnetic isolation, its isolation voltage can reach 2500Vrms.
Further, the Target Board power on signal that DSP emulator of the present invention falls jtag interface by TVS voltage of voltage regulation carries out voltage stabilizing, and is limited in 3.3V, and anti-signal is here by the I/O port excessive pressure damages of Magnetic isolation chip.
The invention has the beneficial effects as follows: the isolated form emulator of the present invention's design can emulate and download program the dsp chip of TI, ARM chip and MP430 single-chip microcomputer; Target Board JTAG signal is supported to the isolation voltage of 2500V; the insulation blocking effect to upper PC can be played; the application scenario of said chip can be widely used in; particularly for the artificial debugging of said chip in high-tension electricity automation equipment control system, there is feature safe and reliable, easy to use.
Accompanying drawing explanation
Fig. 1 is the DSP emulator systems block diagram that the present invention is based on Magnetic isolation technology.
Embodiment
Below by embodiment, and by reference to the accompanying drawings 1, technical scheme of the present invention is described in further detail.
Based on a DSP emulator for Magnetic isolation technology, mainly comprise:
USB interface chip, for being connected host computer with the complex programmable logic device (CPLD) chip in this isolation emulator.Citing hypothetical target chip is certain TIDSP chip, the target downloading file serial data stream that CCS programming software produces by host computer, be converted into the parallel data stream of 8 by USB interface chip, this 8 bit parallel data stream is the macro instruction finally producing dsp control signal.Model can be adopted to be the USB interface chip of FT2232HIL.
Complex programmable logic device (CPLD), by presetting specific analysis protocol in CPLD chip, the parallel data stream of 8 is converted to I/O signal, and this signal is DSPJTAG interface control signal.Model can be adopted to be the CPLD chip of X2C32AVQ44.
Based on the digital isolator of Magnetic isolation technology, digital isolator can according to the input and output attribute of different jtag interface, the JTAG signal export CPLD and the JTAG signal outputted between Target Board are isolated, and the digital isolator of choose reasonable Magnetic isolation, its isolation voltage can reach 2500Vrms.Model can be adopted to be the Magnetic isolation chip of ADUM1400CRWZ.
Insulating power supply module, by USB input voltage after isolation, then to Magnetic isolation chip power supply, choose reasonable insulating power supply module, exporting isolation voltage can reach 3000VDC.Model can be adopted to be the insulating power supply module of IB0503XT-1WR2.
The Target Board power on signal of jtag interface is carried out voltage stabilizing by TVS stabilivolt, and is limited in 3.3V, prevents that signal is by the I/O port of Magnetic isolation chip here, excessive pressure damages.TVS pipe is set herein when also considering in early days as TMS320F2812 chip application; the 5pin of standard 14pinJTAG interface is electro-detection input PD signal on Target Board; this signal can access 5V power supply usually; the I/O port over-voltage breakdown of easily CPLD chip 3.3V in emulator being powered, thus damage emulator.Adding TVS stabilivolt can prevent emulator from damaging in Target Board moment that powers on.
The present embodiment is the embodiment of example of the present invention; for those skilled in the art; on the basis that the invention discloses application process and principle; be easy to make various types of improvement or distortion; and the method be not limited only to described by the above-mentioned embodiment of the present invention or structure; therefore previously described mode is preferred version; and not there is restrictive meaning; every equivalence done according to the present invention changes and amendment, all in the scope protection domain of claims of the present invention.

Claims (5)

1. the DSP emulator based on Magnetic isolation technology, comprise USB chip, complex programmable logic device (CPLD) chip, based on Magnetic isolation technology digital isolator, insulating power supply module, JTAG connector and TVS mu balanced circuit composition, it is characterized in that: host computer is connected with USB chip, USB chip is connected with CPLD chip, and CPLD chip is connected with its interface of JTAG connector by digital isolator.
2. a kind of DSP emulator based on Magnetic isolation technology according to claim 1, is characterized in that: described DSP emulator is by insulating power supply module to Magnetic isolation chip power supply, and its isolation voltage is 3000VDC.
3. a kind of DSP emulator based on Magnetic isolation technology according to claim 1, it is characterized in that: described DSP emulator is communicated with upper computer software by USB chip, host computer is sent instruction and comes, passes through the USB converting serial data streams encapsulated to be that macro instruction exports to CPLD by USB chip, CPLD is then used for reading the macro instruction that USB chip exports, and resolves macro instruction and produces JTAG control signal.
4. a kind of DSP emulator based on Magnetic isolation technology according to claim 1, it is characterized in that: described DSP emulator is isolated by the JTAG signal that exported by CPLD based on the digital isolator of Magnetic isolation technology and the JTAG signal outputted between Target Board, and its isolation voltage is 2500Vrms.
5. a kind of DSP emulator based on Magnetic isolation technology according to claim 1, it is characterized in that: the Target Board power on signal that described DSP emulator falls jtag interface by TVS voltage of voltage regulation carries out voltage stabilizing, and being limited in 3.3V, anti-signal is here by the I/O port excessive pressure damages of Magnetic isolation chip.
CN201510847143.0A 2015-11-28 2015-11-28 DSP emulator based on magnetic isolation technology Pending CN105487404A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110633243A (en) * 2019-09-19 2019-12-31 江西精骏电控技术有限公司 Isolated form DSP emulation ware

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0862116A2 (en) * 1997-02-28 1998-09-02 Vlsi Technology, Inc. A smart debug interface circuit
CN201017277Y (en) * 2006-12-22 2008-02-06 杭州华三通信技术有限公司 Action testing combine group buffer of embedded system
CN101183314A (en) * 2007-12-11 2008-05-21 中国科学院长春光学精密机械与物理研究所 Method for realizing digital signal processor program online programming
CN101419440A (en) * 2008-11-03 2009-04-29 天津理工大学 Multilayer cycling stereo garage control circuit based on DSP and working method thereof
CN201853223U (en) * 2009-11-25 2011-06-01 北京合众达电子技术有限责任公司 XDS (Extended Development System) 510-based low-cost general digital signal emulator
CN102355053A (en) * 2011-08-10 2012-02-15 西安金源电气股份有限公司 Transformer air-cooled control ied
EP2448121A1 (en) * 2009-07-23 2012-05-02 ZTE Corporation Jtag apparatus and method for implementing jtag data transmission
CN102590604A (en) * 2012-03-21 2012-07-18 西北工业大学 Wide voltage data collection device based on complex programmable logic device (CPLD)
CN103019139A (en) * 2012-12-04 2013-04-03 中国北方车辆研究所 JTAG (Joint Test Action Group) isolation circuit used for DSP (Digital Signal Processor)
CN104536779A (en) * 2014-12-08 2015-04-22 河北汉光重工有限责任公司 DSP serial port programming method easy to operate in project and based on CPLD
CN204808308U (en) * 2015-04-24 2015-11-25 南京锆石光电科技有限公司 FPGACPLD procedure downloader based on programmable logic chip
CN204808307U (en) * 2015-04-24 2015-11-25 南京锆石光电科技有限公司 FPGACPLD procedure downloader based on USB singlechip

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0862116A2 (en) * 1997-02-28 1998-09-02 Vlsi Technology, Inc. A smart debug interface circuit
CN201017277Y (en) * 2006-12-22 2008-02-06 杭州华三通信技术有限公司 Action testing combine group buffer of embedded system
CN101183314A (en) * 2007-12-11 2008-05-21 中国科学院长春光学精密机械与物理研究所 Method for realizing digital signal processor program online programming
CN101419440A (en) * 2008-11-03 2009-04-29 天津理工大学 Multilayer cycling stereo garage control circuit based on DSP and working method thereof
EP2448121A1 (en) * 2009-07-23 2012-05-02 ZTE Corporation Jtag apparatus and method for implementing jtag data transmission
CN201853223U (en) * 2009-11-25 2011-06-01 北京合众达电子技术有限责任公司 XDS (Extended Development System) 510-based low-cost general digital signal emulator
CN102355053A (en) * 2011-08-10 2012-02-15 西安金源电气股份有限公司 Transformer air-cooled control ied
CN102590604A (en) * 2012-03-21 2012-07-18 西北工业大学 Wide voltage data collection device based on complex programmable logic device (CPLD)
CN103019139A (en) * 2012-12-04 2013-04-03 中国北方车辆研究所 JTAG (Joint Test Action Group) isolation circuit used for DSP (Digital Signal Processor)
CN104536779A (en) * 2014-12-08 2015-04-22 河北汉光重工有限责任公司 DSP serial port programming method easy to operate in project and based on CPLD
CN204808308U (en) * 2015-04-24 2015-11-25 南京锆石光电科技有限公司 FPGACPLD procedure downloader based on programmable logic chip
CN204808307U (en) * 2015-04-24 2015-11-25 南京锆石光电科技有限公司 FPGACPLD procedure downloader based on USB singlechip

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
展桂荣等: "TIG焊电弧参数数据采集器防护设计", 《电焊机》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110633243A (en) * 2019-09-19 2019-12-31 江西精骏电控技术有限公司 Isolated form DSP emulation ware

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