CN205375034U - DSP emulation ware based on magnetism isolation technique - Google Patents
DSP emulation ware based on magnetism isolation technique Download PDFInfo
- Publication number
- CN205375034U CN205375034U CN201620126874.6U CN201620126874U CN205375034U CN 205375034 U CN205375034 U CN 205375034U CN 201620126874 U CN201620126874 U CN 201620126874U CN 205375034 U CN205375034 U CN 205375034U
- Authority
- CN
- China
- Prior art keywords
- chip
- cpld
- jtag
- magnetic isolation
- host computer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The utility model provides a DSP emulation ware based on magnetism isolation technique, including PC host computer, USB interface chips, CPLD complex programmable logic device, magnetism isolation chip, keep apart power module, JTAG interface and TVS voltage stabilizing circuit, PC host computer, USB interface chips, CPLD complex programmable logic device, magnetism isolation chip and JTAG interface are consecutive, keep apart power module and keep apart the chip power supply to magnetism, the signal of telecommunication carries out the steady voltage on the target board of TVS voltage stabilizing circuit on to the JTAG interface, emulation and procedure download are carried out to TI's DSP chip, ARM chip and MP430 singlechip to the realization, to target board JTAG signal support 2500V's isolation voltage, play the insulation blocking effect to the host computer, especially to the emulation debugging of above -mentioned chip among the high voltage electricity automation equipment control system, have safe and reliable, the convenient characteristics of use.
Description
Technical field
This utility model relates to a kind of DSP emulator based on Magnetic isolation technology, particularly to a kind of for PC host computer to comprising TI company DSP, the Target Board of ARM and MP430 single-chip microcomputer carry out the isolation JTAG emulator of artificial debugging and download program.
Background technology
JTAG:JTAG is writing a Chinese character in simplified form of the prefix letter of English " JointTestActionGroup (joint test behavior tissue) ", is mainly used in: the boundary scan testing of circuit and the on-line system programming of programmable chip.Standard JTAG specifically includes that
TCK test clock inputs；
TDI tests data input, and data input JTAG mouth by TDI；
TDO tests data output, and data are exported from JTAG mouth by TDO；
TMS test pattern selects, and TMS is used for arranging JTAG mouth and is in certain specific test pattern.
TRST test reset, input pin, Low level effective.
The 14-PinJTAG interface of TI company with the addition of the pin that some TI companies are privately owned on the JTAG basis of standard:
PD(Vcc) electro-detection input on Target Board；
TCK_Ret tck clock returns input；
EMU0 model selection input 1；
EMU1 model selection input 2.
DSP:DigitalSignalProcessor, digital signal processor, a class is for the processor of high-speed figure computing.
Magnetic isolation: be based on the isolation technology of chip-scale transformator.ICoupler magnetic coupling isolator is based on the magnetic coupler of chip size transformator, different from the light emitting diode (LED) adopted in tradition photo-coupler and photodiode, iCoupler Magnetic isolation technology directly makes transformator by adopting wafer scale technique on sheet.ICoupler Magnetic isolation can realize multichannel when low cost and other functions are integrated.
PC host computer is connected with emulator by USB interface chip, emulator is connected with Target Board, serious conditions is compared owing to Target Board is likely to be at electromagnetic interference, Target Board is with a large amount of electrostatic charges, owing to emulator is connected with Target Board, both altogether, therefore the electrostatic on equipment is delivered to the USB interface chip of PC host computer possibly through JTAG cable, and USB interface chip is burnt out, make Target Board can not continue emulation or program burn writing.
Target Board with dsp chip, can be widely used in the power electronic equipment such as converter, photovoltaic DC-to-AC converter, these devices are in debugging process, high voltage on major loop is delivered to emulator possibly through Target Board, and then the USB interface chip over-voltage breakdown of the host computer linked altogether will be emulated with JTAG, make Target Board can not continue emulation or program burn writing.
At the Target Board using early model dsp chip, PD(Vcc) electro-detection input pin can access 5V power supply on Target Board, the IO over-voltage breakdown of the CPLD CPLD chip therefore also can powered by the 3.3V power supply in emulator, damages emulator.
Utility model content
The purpose of this utility model is to design a kind of DSP emulator based on Magnetic isolation technology, solves the problem that USB interface chip, Magnetic isolation chip and CPLD CPLD are easily burnt and damaged.
Technical solution of the present utility model is:
A kind of DSP emulator based on Magnetic isolation technology, including PC host computer, USB interface chip, CPLD CPLD, Magnetic isolation chip, insulating power supply module, jtag interface and TVS mu balanced circuit, PC host computer, USB interface chip, CPLD CPLD, Magnetic isolation chip and jtag interface are sequentially connected, insulating power supply module is to Magnetic isolation chip power supply, and the Target Board power on signal on jtag interface is carried out voltage stabilizing by TVS mu balanced circuit.
Isolation voltage is that the insulating power supply module of 3000VDC is to Magnetic isolation chip power supply.
USB interface chip and PC host computer communicate, USB interface chip receives PC host computer and sends over the USB data stream signal of encapsulation output macro command signal to CPLD CPLD, and CPLD CPLD outputs a control signal to jtag interface.
The JTAG signal isolation that isolation voltage is the JTAG signal that CPLD CPLD exported of the Magnetic isolation chip of 2500Vrms and jtag interface exports between Target Board.
By the TVS mu balanced circuit that voltage stabilizing value is 3.3V, the Target Board power on signal on jtag interface is carried out voltage stabilizing.
The beneficial effects of the utility model are that the dsp chip of TI, ARM chip and MP430 single-chip microcomputer can be emulated and download program by this emulator; Target Board JTAG signal is supported the isolation voltage of 2500V; the insulation blocking effect to host computer can be played; can be widely used for the application scenario of said chip; especially for the artificial debugging of said chip in high-tension electricity automation equipment control system, there is feature safe and reliable, easy to use.
Accompanying drawing explanation
Fig. 1 is a kind of DSP emulator systems block diagram based on Magnetic isolation technology of this utility model.
Detailed description of the invention
Preferred embodiment of the present utility model is described in detail below in conjunction with accompanying drawing.
Embodiment, as it is shown in figure 1, select a kind of DSP emulator based on Magnetic isolation technology, specifically includes that
USB interface chip, for being connected with the CPLD CPLD chip in this isolation emulator by host computer, the present embodiment host computer adopts PC host computer.Citing hypothetical target chip is certain TIDSP chip, the target downloading file serial data stream that CCS programming software is produced by host computer, be converted into the parallel data stream of 8 by USB interface chip, this 8 bit parallel data stream is the macro-instruction finally producing dsp control signal.The USB interface chip that model can be adopted to be FT2232HIL.
The parallel data streams of 8, by presetting specific analysis protocol in CPLD CPLD, are converted to I/O signal by CPLD CPLD and CPLD chip, and this signal is DSPJTAG interface control signal.The CPLD chip that the present embodiment selects model to be X2C32AVQ44.
Digital isolator based on Magnetic isolation technology is Magnetic isolation chip, Magnetic isolation chip can according to the input and output attribute of different jtag interfaces, the JTAG signal export CPLD chip and output are isolated to the JTAG signal between Target Board, rationally selecting the digital isolator of Magnetic isolation, its isolation voltage is up to 2500Vrms.The Magnetic isolation chip that the present embodiment selects model to be ADUM1400CRWZ.
Insulating power supply module, by USB interface chip input voltage after isolation, then to Magnetic isolation chip power supply, rationally selects insulating power supply module, and output isolation voltage is up to 3000VDC.The insulating power supply module that the present embodiment selects model to be IB0503XT-1WR2.
TVS mu balanced circuit adopts TVS stabilivolt, and the Target Board power on signal of jtag interface is carried out voltage stabilizing by TVS stabilivolt, and is limited in 3.3V, it is prevented that this signal is by the I/O port excessive pressure damages of Magnetic isolation chip.TVS stabilivolt is set herein when being additionally contemplates that in early days such as TMS320F2812 chip application; the 5pin of standard 14pinJTAG interface is electro-detection input PD signal on Target Board; this signal would generally access 5V power supply; easily by the I/O port over-voltage breakdown powered of CPLD chip 3.3V in emulator, thus damaging emulator.Adding TVS stabilivolt can prevent emulator damaged in Target Board moment of powering.
Claims (5)
1. the DSP emulator based on Magnetic isolation technology, it is characterized in that: include PC host computer, USB interface chip, CPLD CPLD, Magnetic isolation chip, insulating power supply module, jtag interface and TVS mu balanced circuit, PC host computer, USB interface chip, CPLD CPLD, Magnetic isolation chip and jtag interface are sequentially connected, insulating power supply module is to Magnetic isolation chip power supply, and the Target Board power on signal on jtag interface is carried out voltage stabilizing by TVS mu balanced circuit.
2. a kind of DSP emulator based on Magnetic isolation technology according to claim 1, it is characterised in that: isolation voltage is that the insulating power supply module of 3000VDC is to Magnetic isolation chip power supply.
3. a kind of DSP emulator based on Magnetic isolation technology according to claim 1, it is characterized in that: USB interface chip and PC host computer communicate, USB interface chip receives PC host computer and sends over the USB data stream signal of encapsulation output macro command signal to CPLD CPLD, and CPLD CPLD outputs a control signal to jtag interface.
4. a kind of DSP emulator based on Magnetic isolation technology according to claim 1, it is characterised in that: the JTAG signal isolation that isolation voltage is the JTAG signal that CPLD CPLD exported of the Magnetic isolation chip of 2500Vrms and jtag interface exports between Target Board.
5. a kind of DSP emulator based on Magnetic isolation technology according to claim 1, it is characterised in that: by the TVS mu balanced circuit that voltage stabilizing value is 3.3V, the Target Board power on signal on jtag interface is carried out voltage stabilizing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620126874.6U CN205375034U (en) | 2016-02-18 | 2016-02-18 | DSP emulation ware based on magnetism isolation technique |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620126874.6U CN205375034U (en) | 2016-02-18 | 2016-02-18 | DSP emulation ware based on magnetism isolation technique |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205375034U true CN205375034U (en) | 2016-07-06 |
Family
ID=56270750
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620126874.6U Expired - Fee Related CN205375034U (en) | 2016-02-18 | 2016-02-18 | DSP emulation ware based on magnetism isolation technique |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205375034U (en) |
-
2016
- 2016-02-18 CN CN201620126874.6U patent/CN205375034U/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8689063B2 (en) | JTAG apparatus and method for implementing JTAG data transmission | |
| CN102820061B (en) | Embedded remote device program programming device and method | |
| CN103699112B (en) | Based on avionics Autonomous test Authentication devices and the verification method thereof of I/O signal fault simulation | |
| CN207337388U (en) | A kind of server serial port function test board | |
| CN202735445U (en) | Test system for intelligent transformer station secondary equipment scene | |
| CN102750243B (en) | Easily-debugged embedded system of complex SD (secure digital) interface | |
| CN104133171A (en) | Simple boundary scan test system and method based on single-chip microcomputer | |
| CN101102566B (en) | A design method and debugging method for mobile phone JTAG debugging interface signals | |
| CN208818807U (en) | Exit relay performance test apparatus and test macro | |
| CN204945293U (en) | A kind of serial port detection circuit of access device and test fixture | |
| CN102854856A (en) | Controller based on scenario test of secondary equipment of intelligent substation | |
| CN105372619A (en) | Safe chip power-down testing equipment | |
| CN104572442A (en) | In-chip program checking system for programmable logic chip | |
| CN104239176A (en) | Multi-user multi-target remote JTAG debugging system based on Internet | |
| CN111913841A (en) | Low-cost chip function test platform | |
| CN202217264U (en) | Entire machine debugging system | |
| CN216901630U (en) | Interface conversion circuit and chip burning device | |
| CN110618397A (en) | Module power-on detection device based on ubiquitous power Internet of things intelligent electric energy meter | |
| CN208689572U (en) | A kind of multifunctional comprehensive debug circuit board | |
| CN205375034U (en) | DSP emulation ware based on magnetism isolation technique | |
| US6349392B1 (en) | Devices, systems and methods for mode driven stops | |
| CN203191963U (en) | JTAG port safety auxiliary circuit when external watchdog mechanism is used | |
| CN105487404A (en) | DSP emulator based on magnetic isolation technology | |
| CN204808308U (en) | FPGACPLD procedure downloader based on programmable logic chip | |
| CN209102828U (en) | A kind of portable distribution network terminal tester |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160706 Termination date: 20180218 |