CN203191963U

CN203191963U - JTAG port safety auxiliary circuit when external watchdog mechanism is used

Info

Publication number: CN203191963U
Application number: CN 201220727854
Authority: CN
Inventors: 杨文生
Original assignee: Shanghai Aviation Electric Co Ltd
Current assignee: Shanghai Aviation Electric Co Ltd
Priority date: 2012-12-26
Filing date: 2012-12-26
Publication date: 2013-09-11
Anticipated expiration: 2022-12-26

Abstract

The utility model discloses a JTAG port safety auxiliary circuit when an external watchdog mechanism is used. The JTAG port safety auxiliary circuit comprises a JTAG port, a processor and a watchdog circuit, and is characterized in that a TCK pin of the JTAG port is connected with one input end of a door, an IO port of the processor is connected with the other input end of the door, the output end of the door is connected with the input end of the watchdog circuit, and the reset output end of the watchdog circuit is connected with a reset pin of the processor. A self-signal TCK of the JTAG port is effectively utilized, the purpose that the function of automatically shielding the external watchdog is achieved, and abnormal chip debugging programming or chip damage due to the existence of the external watchdog circuit cannot happen when the processor of the product is in the JTAG port debugging programming state.

Description

The safe auxiliary circuit of JTAG mouth when containing outer watchdog mechanism

Technical field

The utility model belongs to electronic circuit design field, is specially a kind of outer watchdog safe auxiliary circuit of JTAG mouth in when mechanism that contains.

Background technology

In electronic information technical field, the use of processor is ordinary day by day, ARM, DSP, PowerPC, single-chip microcomputer etc. are because its performance and reliable dirigibility efficiently, become one of widely used device of numerous engineering technical personnel, and in the above-mentioned processor, account for the overwhelming majority with the JTAG mouth again as main debugging and DLL (dynamic link library). JTAG(Joint Test Action Group; Combined testing action group) is a kind of international standard test protocol, is mainly used in the chip internal test.Table 1 is classified the relevant pin of general JTAG mouth as and corresponding function is described:

Table 1

TCK	The jtag test clock.
		TMS	The jtag test mode selection terminal.
TDI	The jtag test data input pin.At the rising edge of TCK, TDI is latched in mask register, order register or the data register.
		TDO	JTAG scans output, test data output.Remove from TDO in the negative edge of the TCK content with mask register.

In the use of processor, for avoiding the influence because of program design defective or other X factors, cause processor program to run and fly, product deadlock phenomenon, the introducing of house dog mechanism has effectively solved above-mentioned technical barrier.

The principle of work of house dog mechanism is: an I/O pin of watchdog circuit and processor links to each other, it periodically sends into high-low level (be called for short and feed dog) to this I/O pin on this pin of house dog by programmed control, and this program statement is placed in the middle of other control statements of processor dispersedly; In case processor is absorbed in a certain program segment behind the program fleet, when entering the endless loop state, feeds the dog program and just can not be performed owing to disturbing to cause.This time, watchdog circuit will just be sent reset signal at it with the pin that the processor reset pin links to each other owing to can not get feeding-dog signal, processor is produced reset, be that program begins to carry out from the code section start, so just realized automatically reseting of processor.

The reliability service that is introduced as product of house dog mechanism provides favourable guarantee, but has simultaneously also brought inconvenience for the on-line debugging of product and program burn writing, even can cause the expendable consequence of processor.Because processor is after connecting the success of JTAG emulator, outside the debug exception operation, program stays cool; cause dog feeding operation to carry out; the watchdog circuit cycle provides reset signal, and most processor is not done protection to this reset signal, causes the unusual or programming of debugging to make mistakes.

Be example with the DSP in field widespread uses such as Aeronautics and Astronautics, boats and ships, weapons; the TMS320F28XX series of products of TI company are the main forces in the above-mentioned field; and this DSP product is not introduced protection mechanism at the problems referred to above; in JTAG mouth program burn writing process; if introduce reset signal; just can cause chip locked, cause irreversible consequence.At this problem, our way in the past is a lot, as in the program debug stage, does not use outer watchdog, treat that program state is determined after, just enable this function; Or adding some logic by outside lead, control is opened and is closed outer watchdog function etc.Summary is got off, and all is to close the outer watchdog function by opening artificially, reaches the normal purpose of using of processor JTAG mouth.Figure 1 shows that universal external watchdog circuit theory diagram, the IO mouth of processor is directly exported to watchdog chip with feeding-dog signal, the output that resets of watchdog chip is connected to the processor reset pin by switch (the contact pin * 2 of being commonly used), when enabling watchdog function, connect with jumper cap or scolding tin at the switch place, connect otherwise disconnect herein, to reach the purpose of normal use JTAG function.

Because human factor, can not guarantee to connect the JTAG mouth at every turn and all remember to shield the outer watchdog function, cause that deadlock phenomenon still exists in the TMS320F28XX programming process.For this reason, I design this auxiliary circuit, reach the function that addresses the above problem automatically, and require simply efficiently, and have certain versatility.

The utility model content

The utility model provides a kind of outer watchdog safe auxiliary circuit of JTAG mouth in when mechanism that contains, realize enabling automatically to shield the outer watchdog functional purpose, can effectively avoid because of the outer watchdog circuit cycle reset phenomenon such as cause that the on-line debugging inconvenience of product treatment device and program burn writing are made mistakes.

To achieve these goals, the technical solution of the utility model is as follows: a kind of outer watchdog safe auxiliary circuit of JTAG mouth in when mechanism that contains, comprise JTAG mouth, processor and watchdog circuit, the TCK pin that it is characterized in that described JTAG mouth be connected with an input end of door, the IO mouth of processor be connected with another input end of door, be connected with the input end of watchdog circuit with the output terminal of door, the reset output terminal of watchdog circuit is connected with the reset pin of processor.

The utility model is by the effective utilization to JTAG mouth self signal TCK; realize enabling automatically to shield the outer watchdog functional purpose; thereby make the product treatment device in the JTAG mouth debugging programming stage, can not cause the unusual or damage of chip debugging programming because of the existence of outer watchdog circuit.

Description of drawings

Fig. 1 is outer watchdog design concept block diagram commonly used.

Fig. 2 is the utility model outer watchdog design concept block diagram.

Fig. 3 is the specific embodiments design drawing.

Below in conjunction with drawings and Examples the utility model is elaborated.

Embodiment

Fig. 2 is core technology of the present utility model, as shown in the figure, a kind of outer watchdog safe auxiliary circuit of JTAG mouth in when mechanism that contains, comprise JTAG mouth 1, processor 2 and watchdog circuit 3, the TCK pin that it is characterized in that described JTAG mouth 1 be connected with an input end of door 4, the IO mouth of processor 2 be connected with another input end of door 4, be connected with the input end of watchdog circuit 3 with the output terminal of door 4, the output terminal of watchdog circuit 3 is connected with the reset pin of processor 2.

By utilizing the JTAG mouth after successfully connecting processor, the TCK pin of JTAG mouth 1 can be from this characteristic of emulator clock signal, the feeding-dog signal of the tck signal that JTAG mouth 1 is sent and the IO mouth of processor 2 with after export to outer watchdog circuit 3.So just, reach under JTAG mouth connection status, have the tck clock signal to feed dog always, outer watchdog circuit is no longer exported reset signal, the purpose that the JTAG mouth can normally use; In case the JTAG mouth disconnects, the TCK pin of JTAG mouth is that high level is (in the JTAG mouth interface circuit chips, tck signal is high level when not connecting JTAG, namely at chip internal weak drawing, therefore need not external pull-up resistor), the input signal of watchdog circuit is the feeding-dog signal of the IO mouth of processor, and product reverts to again has only the IO mouth to feed dog, the complete outer watchdog mechanism that kept.

Fig. 3 is to be the specific embodiments design drawing of processor 2 with TMS320F2812, because that TMS320F2812 takes up room is excessive, only needs an one IO mouth (WATCHDOG_IN signal) in the utility model, so does not draw among the figure.Among the figure with the GPIOF8(WATCHDOG_IN of TMS320F2812) output IO feeding-dog signal gives CPLD, in addition the DSP_TCK signal of JTAG mouth 1 is exported to the CPLD(CPLD), in CPLD, hold to the dog that feeds of outer watchdog circuit above-mentioned two signals and back output WATCHDOG_OUT signal, simultaneously the reset output signal of outer watchdog circuit is directly exported to the reset pin (DSP_RST) of DSP and located.Wherein watchdog circuit adopts TPS3823-33.By the simulation waveform analysis, this scheme has realized feeding dog (shielding outer watchdog) automatically when JTAG connects, and is fed the purpose of dog (enabling outer watchdog) during disconnection by IO.By a large amount of tests of product, this auxiliary circuit is simple and reliable.

Claims

1. one kind contains the outer watchdog safe auxiliary circuit of JTAG mouth in when mechanism, comprise JTAG mouth, processor and watchdog circuit, the TCK pin that it is characterized in that described JTAG mouth be connected with an input end of door, the IO mouth of processor be connected with another input end of door, be connected with the input end of watchdog circuit with the output terminal of door, the reset output terminal of watchdog circuit is connected with the reset pin of processor.

2. the safe auxiliary circuit of JTAG mouth as claimed in claim 1 is characterized in that processor model is TMS320F2812, adopts CPLD to realize with door.