CN201965202U - Electrostatic discharge (ESD) test equipment - Google Patents
Electrostatic discharge (ESD) test equipment Download PDFInfo
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- CN201965202U CN201965202U CN2010205763798U CN201020576379U CN201965202U CN 201965202 U CN201965202 U CN 201965202U CN 2010205763798 U CN2010205763798 U CN 2010205763798U CN 201020576379 U CN201020576379 U CN 201020576379U CN 201965202 U CN201965202 U CN 201965202U
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- electrostatic discharge
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Abstract
The utility model relates to electrostatic discharge (ESD) test equipment which comprises a control module, a test module, an electrostatic discharge module and a high-voltage power module; the electrostatic discharge module and the high-voltage power module are converged and are connected with the control module; the control module is respectively connected with a computer and the test module through lines; the test module is connected with the electrostatic discharge module through a test access port; and the electrostatic discharge module is respectively connected with a circuit to be tested and the high-voltage power module. The ESD test equipment has the beneficial effects that: the equipment has the characteristics of reasonable design, stable performance, simple circuit structure, convenience in control, high test speed, high efficiency, flexibility and convenience in use and the like, is based on an ESD test technology and can accurately test whether the work of a chip is normal or not, so that the needs of testing whether the chip is damaged by static electricity or not and the damage degree are met.
Description
Technical field
The utility model relates to a kind of ESD testing apparatus.
Background technology
Integrated circuit (IC) design, manufacturer are after design, producing integrated circuit (IC) chip, usually need to use special-purpose chip testing machine that integrated circuit (IC) chip is tested, to discern the bad sheet line identifier of going forward side by side, for later process production creates conditions, have only integrated circuit (IC) chip sales of just dispatching from the factory, then can not dispatch from the factory by the integrated circuit (IC) chip of testing by test.At present, domestic IC chip test is mainly by the self testing of IC Chip Production producer and two kinds of patterns of trust professional test producer's test.Because present domestic chip production producer power of test deficiency, professional test producer is rare, make chip testing become the bottleneck that the segment chip product is in time put on market, simultaneously, because it is higher relatively that chip testing technology requires, cost is bigger, and the chip design enterprise of specialty generally is not inclined to the testing apparatus of investment buying costliness, makes the test machine of the independent research that cost performance is high, test integrated circuit board demand arise at the historic moment.At present, integrated circuit (IC) chip of a great variety, existing input/output signal all is a kind of integrated circuit (IC) chip of type signal, as digital signal chip and full simulating signal chip, it is the composite signal integrated circuits chip of unlike signal type that input/output signal is also arranged, as be input as digital signal and be output as the integrated circuit (IC) chip of simulating signal, or be input as simulating signal and be output as the integrated circuit (IC) chip of digital signal, but chip testing machine is difficult to satisfy the needs of different types of integrated circuit chip testing usually.Because mixed signal chip needs processing digital signal and simulating signal simultaneously, as for audio A/D chip, need produce simulating signal by chip testing machine handles with the input needs of the simulating signal that satisfies chip under test and to the digital signal of its output, therefore, the technical difficulty that mixed signal chip is tested is quite high.The existing chip test machine is merely able to the integrated circuit (IC) chip of single type signal is tested usually, and can not mixed signal chip be tested effectively, and the testing cost costliness.
The utility model content
The purpose of this utility model provides a kind of ESD testing apparatus, testing apparatus is based on ESD (static discharge) measuring technology, accurately whether the work of test place chip is normal, satisfied whether detection chip is broken by static and the test needs of damaged condition, have characteristics such as reasonable in design, stable performance, circuit structure is simple, control is convenient, test speed is fast simultaneously, overcome the deficiency of above-mentioned aspect in the existing product.
The purpose of this utility model is to be achieved through the following technical solutions:
A kind of ESD testing apparatus, comprise control module, test module, static discharge module and high-voltage power module, described static discharge module and high-voltage power module converge link control module, control module connects computing machine and test module respectively by circuit, test module connects the static discharge module by test access port, and the static discharge module connects circuit under test and high-voltage power module respectively.
The beneficial effects of the utility model are: the utlity model has reasonable in design, stable performance, circuit structure is simple, control is convenient, test speed is fast, efficient is high, characteristics such as flexible and convenient to use, this testing apparatus is based on the ESD measuring technology, accurately whether the work of test place chip is normal, satisfied whether detection chip is broken by static and the test needs of damaged condition.
Description of drawings
With reference to the accompanying drawings the utility model is described in further detail below.
Fig. 1 is the structural representation of the described ESD testing apparatus of the utility model embodiment;
Fig. 2 is the test flow chart of the described ESD testing apparatus of the utility model embodiment.
Among the figure:
1, control module; 2, test module; 3, static discharge module; 4, high-voltage power module; 5, computing machine; 6, circuit under test.
Embodiment
Shown in Fig. 1-2, the described a kind of ESD testing apparatus of the utility model embodiment, comprise control module 1, test module 2, static discharge module 3 and high-voltage power module 4, described static discharge module 3 is converged link control module 1 with high-voltage power module 4, control module 1 connects computing machine 5 and test module 2 respectively by circuit, test module 2 connects static discharge module 3 by test access port, and static discharge module 3 connects circuit under test 6 and high-voltage power module 4 respectively.
How this test circuit is used for degree that whether test chip broken and break by static; after a pin of chip under test is by ESD; by test Pin the quality and the family curve thereof of the protection tube of GND (perhaps Pin is to VCC) are changed; whether breakdown with the metal-oxide-semiconductor that is connected with Pin, judge whether ESD is successful.The data of test protection diode and metal-oxide-semiconductor are all preserved behind each ESD.Control module is accepted the PC order; according to each module work of commands coordinate; test module test protection diode and metal-oxide-semiconductor; and data are all preserved; static discharge module generation positive negative pulse stuffing is treated side IC and is carried out ZAP; test inserts pin and is also provided by this module, and the output voltage of high-pressure modular is regulated in the order that high-voltage power module is sent according to control module, at last test data is returned to PC.
Pin tests to GND
Need be during the diode test the test Pin ground connection of chip under test, from surveying the Pin input of chip, each conversion is the pull-up resistor of test down, finishes the I-V curve test of protecting diode over the ground.Data are kept at the RAM district then, so that the PC device extracts data.
The test of metal-oxide-semiconductor high resistant:
The test of chip under test is connected the input end of phase inverter, chip under test ground connection, if the leakage current of metal-oxide-semiconductor less than 1uA, the output terminal output low level of phase inverter so, then the expression test is passed through, otherwise then failure.
Pin tests to VCC
The diode test:
Need be during the diode test the test Pin ground connection of chip under test, from surveying the Pin input of chip, each conversion is the pull-up resistor of test down, finishes the I-V curve test of protecting diode over the ground.Data are kept at the RAM district then, so that the PC device extracts data.
The test of metal-oxide-semiconductor high resistant:
The test of chip under test is connected the input end of phase inverter, chip under test ground connection, if the leakage current of metal-oxide-semiconductor less than 1uA, the output terminal output low level of phase inverter so, then the expression test is passed through, otherwise then failure.
Claims (1)
1. ESD testing apparatus, comprise control module (1), test module (2), static discharge module (3) and high-voltage power module (4), it is characterized in that: static discharge module (3) is converged link control module (1) with high-voltage power module (4), control module (1) connects computing machine (5) and test module (2) respectively by circuit, test module (2) connects static discharge module (3) by test access port, and static discharge module (3) connects circuit under test (6) and high-voltage power module (4) respectively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010205763798U CN201965202U (en) | 2010-10-26 | 2010-10-26 | Electrostatic discharge (ESD) test equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2010205763798U CN201965202U (en) | 2010-10-26 | 2010-10-26 | Electrostatic discharge (ESD) test equipment |
Publications (1)
Publication Number | Publication Date |
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CN201965202U true CN201965202U (en) | 2011-09-07 |
Family
ID=44527748
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN2010205763798U Expired - Fee Related CN201965202U (en) | 2010-10-26 | 2010-10-26 | Electrostatic discharge (ESD) test equipment |
Country Status (1)
Country | Link |
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CN (1) | CN201965202U (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103185845A (en) * | 2011-12-31 | 2013-07-03 | 中芯国际集成电路制造(上海)有限公司 | Detection circuit and detection method of electrostatic discharge protector |
CN108663593A (en) * | 2012-08-02 | 2018-10-16 | 德克萨斯仪器股份有限公司 | System for testing electronic device |
CN111337762A (en) * | 2018-12-18 | 2020-06-26 | 聚灿光电科技(宿迁)有限公司 | Method for monitoring ESD output in real time |
-
2010
- 2010-10-26 CN CN2010205763798U patent/CN201965202U/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103185845A (en) * | 2011-12-31 | 2013-07-03 | 中芯国际集成电路制造(上海)有限公司 | Detection circuit and detection method of electrostatic discharge protector |
CN103185845B (en) * | 2011-12-31 | 2015-08-05 | 中芯国际集成电路制造(上海)有限公司 | The testing circuit of electrostatic discharge protective equipment and detection method |
CN108663593A (en) * | 2012-08-02 | 2018-10-16 | 德克萨斯仪器股份有限公司 | System for testing electronic device |
CN111337762A (en) * | 2018-12-18 | 2020-06-26 | 聚灿光电科技(宿迁)有限公司 | Method for monitoring ESD output in real time |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
DD01 | Delivery of document by public notice |
Addressee: Wuxi Risong Microelectronic Co., Ltd. Document name: Notification to Go Through Formalities of Registration |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110907 Termination date: 20131026 |