CN202661559U - Host/device real-time detection circuit with USB interface - Google Patents
Host/device real-time detection circuit with USB interface Download PDFInfo
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- CN202661559U CN202661559U CN 201220194306 CN201220194306U CN202661559U CN 202661559 U CN202661559 U CN 202661559U CN 201220194306 CN201220194306 CN 201220194306 CN 201220194306 U CN201220194306 U CN 201220194306U CN 202661559 U CN202661559 U CN 202661559U
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Abstract
The utility model discloses a host/device real-time detection circuit with a USB interface. The circuit comprises a comparator, a first constant flow source, a second constant flow source, a first resistor and a second resistor. The first resistor is pulled down from an positive pole of the comparator, the positive pole of the comparator is connected with the first constant flow source simultaneously, and a low logic level is provided when the positive pole of the comparator is hung in the air; the second resistor is pulled down from a negative pole of the comparator, the negative pole of the comparator is connected with the second constant flow source simultaneously, and when the negative pole of the comparator is hung in the air, the actual voltage of the negative pole of the comparator is lower than the voltage of the positive pole when the positive pole of the comparator is hung in the air; and when the positive pole of the comparator is connected with a D+ pull-down resistor, impending voltage of the positive pole of the comparator is higher than that of the negative pole of the comparator. The detection circuit has the advantage that the real-time detection for USB host/device insertion is achieved by detecting electrical level states of the positive pole of the comparator and an output end of the comparator.
Description
Technical field
The utility model relates to electronic information technical field, is specifically related to a kind of slave real-time detection circuit of USB interface.
Background technology
USB is the abbreviation of English Universal Serial BUS (USB (universal serial bus)), and its Chinese is being got lines crossed referred to as logical, is an external bus standard, is used for being connected and communication of standard computer and external unit, is the interfacing that is applied in the PC field.USB will unite proposition in the end of the year 1994 by many companies such as Intel, Compaq, IBM, Microsoft.
The plug and play of USB interface support equipment and warm connection function, adopt quadded cable, wherein two is the serial-port that transmits data, its signal wire is the Double-strand transmission that is labeled as respectively D+ and D-, they use semiduplex differential signal and collaborative work separately, to offset the electromagnetic interference (EMI) of long lead; Two provide power supply for downstream (Downstream) equipment in addition.The USB system adopts cascaded star topology, and this topology partly is comprised of three basic: main frame (Host), hub (Hub) and slave function device.In the USB interface standard, main frame (HOST) equipment can respectively draw one 15 kilohms pull down resistor on D+, D-; Slave (DEVICE) equipment can be on D+ drop-down one 1.5 kilohms pull-up resistor.
Along with a large amount of of various digital equipments popularize, particularly portable consumer type electronic product is universal, and the USB device around ours gradually more gets up.Although yet these equipment all are to have adopted USB interface, these equipment separately role but are not quite similar, and realize the real-time detection of these equipment is just become extremely important.
The utility model content
Detect in real time to the main frame of the USB of access with from machine equipment when the utility model is intended to solve USB device and possesses at the same time main frame and slave function, a kind of slave real-time detection circuit and detection method of USB interface is provided.
In order to realize above purpose, the technical scheme that the utility model adopts is as follows:
A kind of slave real-time detection circuit of USB interface is characterized in that, comprising: comparer, the first constant current source, the second constant current source, the first resistance and the second resistance; Anodal drop-down the first resistance of comparer connects the first constant current source simultaneously, and design reaches the comparer positive pole individual logic low when unsettled; Drop-down the second resistance of comparer negative pole, connect simultaneously the second constant current source, design reaches the comparer negative pole has individual virtual voltage to be lower than anodal voltage when unsettled when unsettled, design is when the comparer positive pole accesses a D+ pull down resistor again, and the unsettled voltage of comparer positive pole is greater than the unsettled voltage of comparer negative pole.
Described D+ pull down resistor is generally the resistance in a 15K Europe.
As concrete technical scheme, described the first resistance is selected 15K ohm, and described the second resistance is selected the 10K Ohmage.
The beneficial effects of the utility model are: by the resistance of the first resistance and the second resistance is set rightly, so that it satisfies: the comparer positive pole has individual logic low when unsettled, the comparer negative pole has individual virtual voltage to be lower than anodal voltage when unsettled when unsettled, and when comparer positive pole when a more drop-down D+ pull down resistor, the unsettled voltage of comparer positive pole is greater than the unsettled voltage of comparer negative pole.Under this design, level state anodal by detection comparator and comparator output terminal just can be realized the real-time detection to the insertion of USB slave equipment.
Description of drawings
The USB testing circuit figure that Fig. 1 provides for the utility model embodiment.
The constitutional diagram of USB testing circuit when slave accesses that Fig. 2 provides for the utility model embodiment.
The constitutional diagram of USB testing circuit when main frame accesses that Fig. 3 provides for the utility model embodiment.
The logical table of the various access situations of USB testing circuit that Fig. 4 provides for the utility model embodiment.
Embodiment
Below in conjunction with accompanying drawing and embodiment the utility model is described in further detail.
As shown in Figure 1, the slave real-time detection circuit of the USB interface that present embodiment provides comprises: comparer, the first constant current source, the second constant current source, the first resistance R 1 and the second resistance R 2; Anodal drop-down the first resistance of comparer connects the first constant current source simultaneously, and design reaches comparer positive pole (A point among the figure) individual logic low when unsettled, and establishing the A point voltage here is V1; Drop-down the second resistance of comparer negative pole connects the second constant current source simultaneously, and design reaches comparer negative pole (C point among the figure) has individual virtual voltage to be lower than the voltage of positive pole when unsettled when unsettled, and establishing the voltage that C orders here is V2.Design is when comparer positive pole again when the resistance in a drop-down 15K Europe in addition, and the unsettled voltage of comparer positive pole is greater than the unsettled voltage of comparer negative pole.
As from the foregoing: as the cathode voltage V1 of comparer during greater than cathode voltage V2, the output logic high level of comparer; As the cathode voltage V1 of comparer during less than cathode voltage V2, the output logic low level of comparer; In addition, unsettled at testing circuit A point, in the time of normal operation, the A point is low level, and the output B point of comparer is high level.
In conjunction with shown in Figure 2: based on foregoing circuit, the utility model is as follows in function and the principle of the real-time detection that realizes the slave equipment access:
(1) when slave accesses, has the pull-up resistor in a 1.5K Europe at the A point.
(2) the A point is because the pull down resistor dividing potential drop that A order in the pull-up resistor in 1.5K Europe and the testing circuit, and design object at this moment A point V1 can be a logic high.
(3) the A point voltage V1 voltage V2 of ordering greater than C at this moment is so the output voltage of ordering at B can be a logic high.
In conjunction with shown in Figure 3, based on foregoing circuit, the utility model is as follows in function and the principle of the real-time detection that realizes the main process equipment access:
(1) when main frame accesses, has the pull down resistor in a 15K Europe at the A point.
(2) the A point is because the integrated drop-down resistance that concerns of the pull down resistor parallel connection that A is ordered in the pull down resistor in 15K Europe and the testing circuit can reduce, and design object A point is because the effect virtual voltage of constant current source can be lower than the C point voltage of this moment herein.
(3) the A point voltage V1 voltage V2 of ordering less than C at this moment is so the output voltage of ordering at B can be a low level.
In conjunction with top analysis, according to design object, criterion is as follows:
During without equipment access: A point low level; B point high level.During the slave equipment access: A point high level; B point high level.During the main process equipment access: A point low level; B point low level.According to these 3 criterions, just can realize real-time detection to the insertion of USB slave equipment by detecting level state that A point and B order.
Below by a concrete example implementation method of the present utility model is described, in conjunction with Fig. 1, Fig. 2, Fig. 3, and R1 selects 15K ohm, and R2 selects the 10K Ohmage.
If the A point voltage is V1, the B point voltage is V3, and the C point voltage is V2.When A was unsettled, the A point had the low level of a logic, was 0.4V at this moment.When A was unsettled, C point voltage V2 was lower than A point voltage V1, and this moment, V2 was 0.3V.
The A point of circuit is connected with the D+ interface of USB interface.
When slave accesses, have the pull-up resistor in a 1.5K Europe at the A point, the A point is because the pull-up resistor in 1.5K Europe and the relation of R1 electric resistance partial pressure, and V1 is logic high, at this moment the A point virtual voltage V1 virtual voltage V2 of ordering greater than C is so the output voltage V 3 of ordering at B can be a logic high.
When main frame accesses, have the pull down resistor in a 15K Europe at the A point, the A point is because the pull down resistor of the 15K ohm on the main frame and the integrated drop-down resistance that concerns of R1 resistance parallel connection can be reduced to 7.5K ohm, the A point is because the effect voltage V1 of constant current source can be reduced to 0.2V, at this moment the A point voltage V1 voltage V2 of ordering less than C, V2 is 0.3V at this moment, so the output voltage of ordering at B can be a low level.
Claims (3)
1. the slave real-time detection circuit of a USB interface is characterized in that, comprising: comparer, the first constant current source, the second constant current source, the first resistance and the second resistance; Anodal drop-down the first resistance of comparer connects the first constant current source simultaneously, and design reaches the comparer positive pole individual logic low when unsettled; Drop-down the second resistance of comparer negative pole, connect simultaneously the second constant current source, design reaches the comparer negative pole has individual virtual voltage to be lower than anodal voltage when unsettled when unsettled, design is when the comparer positive pole accesses a D+ pull down resistor again, and the unsettled voltage of comparer positive pole is greater than the unsettled voltage of comparer negative pole.
2. the slave real-time detection circuit of USB interface according to claim 1 is characterized in that, described D+ pull down resistor is the resistance in a 15K Europe.
3. the slave real-time detection circuit of USB interface according to claim 1 and 2 is characterized in that, described the first resistance is selected 15K ohm, and described the second resistance is selected the 10K Ohmage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220194306 CN202661559U (en) | 2012-05-01 | 2012-05-01 | Host/device real-time detection circuit with USB interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220194306 CN202661559U (en) | 2012-05-01 | 2012-05-01 | Host/device real-time detection circuit with USB interface |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202661559U true CN202661559U (en) | 2013-01-09 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220194306 Ceased CN202661559U (en) | 2012-05-01 | 2012-05-01 | Host/device real-time detection circuit with USB interface |
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| Country | Link |
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| CN (1) | CN202661559U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102680818A (en) * | 2012-05-01 | 2012-09-19 | 珠海市杰理科技有限公司 | Circuit and method for real-time detection of master-slave machine with (USB) interface |
| CN110165743A (en) * | 2019-06-06 | 2019-08-23 | 深圳市思远半导体有限公司 | Automatic load detection circuit and automatic load detection method |
-
2012
- 2012-05-01 CN CN 201220194306 patent/CN202661559U/en not_active Ceased
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102680818A (en) * | 2012-05-01 | 2012-09-19 | 珠海市杰理科技有限公司 | Circuit and method for real-time detection of master-slave machine with (USB) interface |
| CN102680818B (en) * | 2012-05-01 | 2015-02-18 | 珠海市杰理科技有限公司 | Circuit and method for real-time detection of master-slave machine with (USB) interface |
| CN110165743A (en) * | 2019-06-06 | 2019-08-23 | 深圳市思远半导体有限公司 | Automatic load detection circuit and automatic load detection method |
| CN110165743B (en) * | 2019-06-06 | 2024-02-23 | 深圳市思远半导体有限公司 | Automatic load detection circuit and automatic load detection method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 519085 Guangdong city of Zhuhai province Jida West Road No. 107 Building 9 Building (1-4) Patentee after: Zhuhai jelee Polytron Technologies Inc Address before: 519015 Guangdong city of Zhuhai Province in Jiuzhou Road No. 2069, building 2 Patentee before: Zhuhai Jieli Technology Co., Ltd. |
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| IW01 | Full invalidation of patent right |
Decision date of declaring invalidation: 20190211 Decision number of declaring invalidation: 38943 Granted publication date: 20130109 |
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| IW01 | Full invalidation of patent right |