CN205750414U - A kind of high-sensitive USB interface and mainboard thereof - Google Patents

A kind of high-sensitive USB interface and mainboard thereof Download PDF

Info

Publication number
CN205750414U
CN205750414U CN201620586397.1U CN201620586397U CN205750414U CN 205750414 U CN205750414 U CN 205750414U CN 201620586397 U CN201620586397 U CN 201620586397U CN 205750414 U CN205750414 U CN 205750414U
Authority
CN
China
Prior art keywords
usb
interface
clock
electric capacity
sensitive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201620586397.1U
Other languages
Chinese (zh)
Inventor
万山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Qicaihong Yugong Information Technology Development Co ltd
Original Assignee
Shenzhen Colorful Technology And Development Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Colorful Technology And Development Co Ltd filed Critical Shenzhen Colorful Technology And Development Co Ltd
Priority to CN201620586397.1U priority Critical patent/CN205750414U/en
Application granted granted Critical
Publication of CN205750414U publication Critical patent/CN205750414U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Information Transfer Systems (AREA)

Abstract

This utility model provides a kind of high-sensitive USB interface and mainboard thereof, described high-sensitive USB interface includes: USB key Mus interface, USB accelerating circuit and clock circuit, described USB key Mus interface is connected with described USB accelerating circuit respectively with clock circuit, and described USB key Mus interface is connected to host side by described USB accelerating circuit.This utility model carries out protocol conversion by the single-chip microcomputer of USB accelerating circuit as the bridging chip of traditional USB key Mus low-speed device, and then realize communication with host side, bandwidth rates has been brought up to 480Mbps from 12Mbps, achieve acceleration function, convenient degree that game player used by described USB interface is greatly improved, the response time of game station can be greatly shortened, preferably support and service game station, it is effectively improved the game experiencing of game player, improves the overall work ability of mainboard.

Description

A kind of high-sensitive USB interface and mainboard thereof
Technical field
This utility model relates to a kind of USB interface, particularly relates to a kind of high-sensitive USB interface, further relates to include this The mainboard of high-sensitive USB interface.
Background technology
Common preposition USB interface can provide, in use process, the ease for use that energy is good, but along with game peripherals is got over Coming the most, the requirement to the response speed of USB interface is harsher, common USB interface be not responsible for specially detection and To game station, the chip of speed-raising, requires that response speed does not accomplishes seamless delivery;And, common preposition USB interface is powered electricity Game station and computer equipment generally at 500mA, along with the increase of various ancillary equipment, are used same USB interface, no by road Only can not process game station data in time, too low USB interface electric current for the support of game station and respond also power not from The heart, the difficult ability playing specialty game station;And rearmounted USB interface is arranged on the back side of computer, equipment carries out frequency overleaf Numerous operation does not then meet design original intention, it is clear that do not meet use habit yet.
Summary of the invention
Technical problem to be solved in the utility model is to need to provide one quickly to respond, it is intended to improve number of devices According to responding ability and solve the USB interface of problem of data transfer delay, in addition it is also necessary to the master including this USB interface is provided Plate.
To this, this utility model provides a kind of high-sensitive USB interface, including: USB key Mus interface, USB accelerating circuit and Clock circuit, described USB key Mus interface is connected with described USB accelerating circuit respectively with clock circuit, described USB key Mus interface It is connected to host side by described USB accelerating circuit.
Further improvement of the utility model is, described USB accelerating circuit includes single-chip microcomputer U32.
Further improvement of the utility model is, described USB accelerating circuit also includes electric capacity C803 and electric capacity C804, institute State the power pin of single-chip microcomputer U32 one end respectively with power end, one end of electric capacity C803 and electric capacity C804 to be connected, described electricity Hold the other end of C803 and the other end ground connection respectively of electric capacity C804.
Further improvement of the utility model is, described USB accelerating circuit also includes pull-up resistor R204 and pull-up electricity Resistance R206, the serial data port of described single-chip microcomputer U32 is connected to power end, described single-chip microcomputer U32 by pull-up resistor R204 Clock port be connected to power end by pull-up resistor R206.
Further improvement of the utility model is, described clock module includes clock chip U4, electric capacity C809 and resistance R242, one end of the power port of described clock chip U4, the enable port of clock chip U4 and electric capacity C809 is connected to power supply End, the grounding ports of described clock chip U4 and the other end ground connection of electric capacity C809, the output port of described clock chip U4 leads to Cross resistance R242 and be connected to described single-chip microcomputer U32.
Further improvement of the utility model is, the output port of described clock chip U4 is connected to by resistance R242 The reference clock input port of described single-chip microcomputer U32.
This utility model also provides for a kind of mainboard, and described mainboard includes high-sensitive USB interface as above.
Compared with prior art, the beneficial effects of the utility model are: by the single-chip microcomputer of USB accelerating circuit as biography The bridging chip of the USB key Mus low-speed device of system carries out protocol conversion, on the instruction basis of USB key Mus interface receiving low speed Realize realizing communication with USB speed at full speed with host side, bandwidth rates has been brought up to 480Mbps from 12Mbps, it is achieved that add Speed function, is greatly improved the convenient degree that game player is used by described USB interface, it is possible to be greatly shortened the response of game station Time, preferably support and service game station, being effectively improved the game experiencing of game player, improving the work that mainboard is overall Ability.
Accompanying drawing explanation
Fig. 1 is the modular structure schematic diagram of a kind of embodiment of this utility model;
Fig. 2 is the circuit theory diagrams of a kind of embodiment of this utility model.
Detailed description of the invention
Below in conjunction with the accompanying drawings, preferably embodiment of the present utility model is described in further detail.
As it is shown in figure 1, this utility model provides a kind of high-sensitive USB interface, including: USB key Mus interface, USB accelerate Circuit and clock circuit, described USB key Mus interface is connected with described USB accelerating circuit respectively with clock circuit, described USB key Mus interface is connected to host side by described USB accelerating circuit.USB key Mus interface described in this example is connection keyboard and mouse etc. The conventional low USB interface of USB device, such as USB1.0 or USB1.1 interface etc..
As in figure 2 it is shown, USB accelerating circuit described in this example includes single-chip microcomputer U32, electric capacity C803, electric capacity C804, pull-up resistor R204 and pull-up resistor R206;The power pin of described single-chip microcomputer U32 respectively with power end, one end of electric capacity C803 and electric capacity One end of C804 is connected, the other end of described electric capacity C803 and the other end of electric capacity C804 ground connection, described single-chip microcomputer U32 respectively Power pin be 1 pin, i.e. VDD5V pin;The serial data port of described single-chip microcomputer U32 is connected by pull-up resistor R204 To power end, the serial data port of described single-chip microcomputer U32 is 18 pins, i.e. SDA pin;The clock end of described single-chip microcomputer U32 Mouth is connected to power end by pull-up resistor R206, and the clock port of described single-chip microcomputer U32 is 17 pins, i.e. SCL pin.Described Host side is HOST, and the USB accelerating circuit at described single-chip microcomputer U32 place is for being converted into USB2.0 by USB1.1.
As in figure 2 it is shown, clock module described in this example includes clock chip U4, electric capacity C809 and resistance R242, described clock One end of the power port of chip U4, the enable port of clock chip U4 and electric capacity C809 is connected to power end, described clock core The grounding ports of sheet U4 and the other end ground connection of electric capacity C809, the output port of described clock chip U4 is connected by resistance R242 To described single-chip microcomputer U32;The power port of described clock chip U4 is 4 pins, i.e. VDD pin;Described clock chip U4 makes 1 pin of energy port, i.e. EN pin;The grounding ports of described clock chip U4 is 2 pins, i.e. GND pin;Described clock chip The output port of U4 is 3 pins, i.e. OUT pin;Described in this example, the output port of clock chip U4 is connected to by resistance R242 The reference clock input port of described single-chip microcomputer U32.
It is 12Mbps that existing tradition USB interface uses USB low speed (USB1.1) transmission speed theoretical value, And the transmission delay increased in the middle of long cable, add main process equipment and receive the waiting time of signal;And this example can be real Existing USB speed at full speed, i.e. USB Full Speed (USB2.0), theoretical transmission rate is 480Mbps, is the biography of USB1.1 equipment 40 times of defeated speed.The USB of this example accelerates the monolithic being traditional USB key Mus low-speed device to be passed through described USB accelerating circuit Machine carries out protocol conversion, and protocol chip accepts the instruction of the traditional low speed key Mus speed with USB Full Speed with HOST master Machine realizes communication, and from 12Mbps, bandwidth rates has been brought up to 480Mbps, it is achieved that accelerate function.
This example also provides for a kind of mainboard, and described mainboard includes high-sensitive USB interface as above.
This example is assisted as the bridging chip of traditional USB key Mus low-speed device by the single-chip microcomputer of USB accelerating circuit View conversion, realizes with USB speed at full speed with host side realizes communication on the instruction basis of USB key Mus interface receiving low speed, Bandwidth rates is brought up to 480Mbps from 12Mbps, it is achieved that accelerate function, described USB interface has been greatly improved game is played The convenient degree that family uses, it is possible to be greatly shortened the response time of game station, preferably support and service game station, effectively Ground improves the game experiencing of game player, improves the ability to work that mainboard is overall.
This example, in order to meet game player's demand to highly sensitive USB interface, devises high-sensitive USB interface, it is intended to Improve the highly sensitive reflection degree of game player's equipment, shorten the equipment reaction time;Described in this example, high-sensitive USB interface is the most same As the interface of USB, described USB interface aims at game player's design, realizes quickly response, purport by increasing USB accelerating circuit Improve the responding ability of device data and solving the problem of data transfer delay, have selected the chip that characteristic is good, it is ensured that game Equipment connects quickly and stable.
The detailed description of the invention of the above is better embodiment of the present utility model, not limits this practicality with this new The scope that is embodied as of type, scope of the present utility model includes being not limited to this detailed description of the invention, all according to this utility model Shape, structure made equivalence change all in protection domain of the present utility model.

Claims (7)

1. a high-sensitive USB interface, it is characterised in that including: USB key Mus interface, USB accelerating circuit and clock circuit, Described USB key Mus interface is connected with described USB accelerating circuit respectively with clock circuit, and described USB key Mus interface is by described USB accelerating circuit is connected to host side.
High-sensitive USB interface the most according to claim 1, it is characterised in that described USB accelerating circuit includes single-chip microcomputer U32。
High-sensitive USB interface the most according to claim 2, it is characterised in that described USB accelerating circuit also includes electric capacity C803 and electric capacity C804, the power pin of described single-chip microcomputer U32 respectively with power end, one end of electric capacity C803 and electric capacity C804 One end is connected, the other end of described electric capacity C803 and the other end of electric capacity C804 ground connection respectively.
High-sensitive USB interface the most according to claim 2, it is characterised in that described USB accelerating circuit also includes pull-up Resistance R204 and pull-up resistor R206, the serial data port of described single-chip microcomputer U32 is connected to power supply by pull-up resistor R204 End, the clock port of described single-chip microcomputer U32 is connected to power end by pull-up resistor R206.
5. according to the high-sensitive USB interface described in claim 2 to 4 any one, it is characterised in that described clock module Including clock chip U4, electric capacity C809 and resistance R242, the power port of described clock chip U4, the Enable Pin of clock chip U4 One end of mouth and electric capacity C809 is connected to power end, the grounding ports of described clock chip U4 and another termination of electric capacity C809 Ground, the output port of described clock chip U4 is connected to described single-chip microcomputer U32 by resistance R242.
High-sensitive USB interface the most according to claim 5, it is characterised in that the output port of described clock chip U4 The reference clock input port of described single-chip microcomputer U32 it is connected to by resistance R242.
7. a mainboard, it is characterised in that it is high-sensitive that described mainboard includes as described in claim 1 to 6 any one USB interface.
CN201620586397.1U 2016-06-16 2016-06-16 A kind of high-sensitive USB interface and mainboard thereof Active CN205750414U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201620586397.1U CN205750414U (en) 2016-06-16 2016-06-16 A kind of high-sensitive USB interface and mainboard thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201620586397.1U CN205750414U (en) 2016-06-16 2016-06-16 A kind of high-sensitive USB interface and mainboard thereof

Publications (1)

Publication Number Publication Date
CN205750414U true CN205750414U (en) 2016-11-30

Family

ID=57386968

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201620586397.1U Active CN205750414U (en) 2016-06-16 2016-06-16 A kind of high-sensitive USB interface and mainboard thereof

Country Status (1)

Country Link
CN (1) CN205750414U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107273327A (en) * 2017-05-11 2017-10-20 建荣半导体(深圳)有限公司 Variable bit rate serial communication method, device, communication chip, storage device and system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107273327A (en) * 2017-05-11 2017-10-20 建荣半导体(深圳)有限公司 Variable bit rate serial communication method, device, communication chip, storage device and system

Similar Documents

Publication Publication Date Title
CN107357376A (en) A kind of hard disk backboard, making and its implementation
CN107544653A (en) A kind of USB Type C interface and mobile device
CN103616935A (en) Embedded computer mainboard
CN211956463U (en) I/O (input/output) bridge piece based on Feiteng processor
CN205750414U (en) A kind of high-sensitive USB interface and mainboard thereof
CN104484302B (en) It is USB interface-based to realize system of the two-way communication with controlling between two main frames
CN204947285U (en) USB Type-C modular converter
CN102693203A (en) Embedded USB (universal serial bus) host
CN201425723Y (en) Switch of dual hard disk power lines
Stan et al. Role of usb communication in modem engineering education
CN104123257B (en) Universal serial bus device, communication means and computer-readable recording medium
CN110399255A (en) A kind of debugging system of FPGA system and FPGA system
CN207008599U (en) A kind of server master board test board
CN202995719U (en) USB (universal serial bus) interface extension equipment and electronic terminal
CN209281382U (en) The extension of more expansion slot is multiplexed PCIE bus control system
CN207249662U (en) Adaptive usb synchronizers
CN205193738U (en) Support PS2 and USB double nip keyboard of special function key
CN202454852U (en) USB (Universal Serial Bus) concentrator and USB concentrator assembly
CN203012707U (en) USB (Universal Serial Bus) serial port three-in-one converter
CN206805410U (en) A kind of PCIE expansion board clampings applied on the server
CN201628957U (en) Host and server
CN205983330U (en) Many interfaces formula embedded main board
CN104873082A (en) Intelligent express box using tablet computer as control center
CN108509364A (en) A kind of serial and parallel communication Interface Extender
CN202551059U (en) Multifunctional USB (Universal Serial Bus) network card

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20220615

Address after: 518000 1204, building 1, Shenzhen new generation industrial park, No. 136, Zhongkang Road, Meidu community, Meilin street, Futian District, Shenzhen, Guangdong Province

Patentee after: Shenzhen Qicaihong Yugong Information Technology Development Co.,Ltd.

Address before: 1206, floor 13, central business building, No. 88, Fuhua 1st Road, Futian District, Shenzhen, Guangdong 518057

Patentee before: COLORFUL TECHNOLOGY Co.,Ltd.

TR01 Transfer of patent right