CN105448903B - 发光二极管芯片封装结构及其制造方法 - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 17
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- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- 239000007787 solid Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 239000000741 silica gel Substances 0.000 description 4
- 229910002027 silica gel Inorganic materials 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- 241000218202 Coptis Species 0.000 description 2
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- 230000005484 gravity Effects 0.000 description 2
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- 239000007924 injection Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
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Abstract
一种发光二极管芯片封装结构,包括一基板,设于基板上的若干LED芯片,以及罩设所述LED芯片的封装层,其中,所述LED芯片通过导线与所述基板电性连接;所述封装层包括至少两层的封装材料,依次为第一封装层、第二封装层,第一封装层平铺于基板上并完全覆盖LED芯片及导线,第二封装层覆盖在第一封装层上,形成第二封装层所用的胶体的流动性小于形成第一封装层所用的胶体的流动性。本发明还提供上述封装结构的制造方法。相比于现有技术,本发明采用胶体在胶体平面上的流动性较差与胶体本身的内聚力来成型封装体的封装层。利用此方式得到的封装体可以得到高度比较高的封装体,从而使封装体具有比较好的光学效率。
Description
技术领域
本发明涉及一种半导体的封装结构及其制造方法,特别涉及一种发光二极管芯片封装结构及其制造方法。
背景技术
发光二极管封装结构有多种封装方式,例如板上芯片(COB)封装是将发光二极管芯片贴装在印刷线路板上,芯片与印刷线路板的电气连接通过打线连接的方法实现,并进一步用树脂覆盖芯片和导线以确保可靠性。现有的COB封装体因为是在平板上注胶,大部分需要先于平板上设置一环绕芯片的围堰结构,再把胶体注入围堰结构内。该围堰结构用于将胶体局限住,避免胶体溢流。但是,由于围堰结构的存在,限制了该封装体封装层的高度,从而影响封装体的光学效率。
发明内容
有鉴于此,有必要提供一种无围堰结构的发光二极管芯片封装结构及其制造方法。
一种发光二极管芯片封装结构,包括一基板,设于基板上的若干LED芯片,以及罩设所述LED芯片的封装层,其中,所述LED芯片通过导线与所述基板电性连接;所述封装层包括至少两层的封装材料,依次为第一封装层、第二封装层,第一封装层平铺于基板上并完全覆盖LED芯片及导线,第二封装层覆盖在第一封装层上,形成第二封装层所用的胶体的流动性小于形成第一封装层所用的胶体的流动性。
一种板上芯片体的制作方法,该方法包括以下步骤:
固晶:提供一基板和若干LED芯片,将所述LED芯片固定于该基板一侧;
打线:提供若干导线,利用该导线将所述LED芯片电性连接于该基板;
一次点胶:提供第一胶体,利用点胶方式将该第一胶体注于所述基板设有LED芯片的一侧;
烘烤:烘烤所述胶体至半干,形成第一封装层;
二次点胶:提供第二胶体,在所述第一封装层上注入该第二胶体,第二胶体的流动性小于第一胶体的流动性;
固化:烘烤所述胶体,使得二次点胶中的胶体形成第二封装层,同时使第一封装层和第二封装层完全固化。
相比于现有技术,本发明的发光二极管芯片封装结构没有采用通用的围堰体来限制封装胶体的溢流,而是采用胶体在胶体平面上的流动性较差与胶体本身的内聚力来成型封装体的封装层。利用此方式得到的封装体因无围堰体的限制,可以得到高度比较高的封装体,从而使封装体具有比较好的光学效率。
附图说明
图1为本发明实施例中的所述发光二极管芯片封装结构的剖面图。
图2为图1中所述发光二极管芯片封装结构的制作流程图。
图3为图2中所述发光二极管芯片封装结构在打线后的俯视图。
图4为图2中所述发光二极管芯片封装结构在一次点胶时的俯视图。
图5为图2中所述发光二极管芯片封装结构在二次点胶时的俯视图。
主要元件符号说明
发光二极管芯片封装结构 | 100 |
基板 | 10 |
底面 | 11 |
承载面 | 12 |
固晶区 | 13 |
第一电极 | 14 |
第二电极 | 15 |
LED芯片 | 20 |
P型电极 | 21 |
N型电极 | 22 |
第一封装层 | 30 |
贴合面 | 31 |
支撑面 | 32 |
第一胶体 | 33 |
第二封装层 | 40 |
粘合面 | 41 |
成型面 | 42 |
第二胶体 | 43 |
导线 | 50、51、52 |
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
请参见图1,本发明的发光二极管芯片封装结构100包括一基板10,设于基板10上的若干LED芯片20,以及至少两层的封装层。在本实施例中,所述封装层包括两层,自基板10向上依次为第一封装层30、第二封装层40。其中第一封装层30覆盖所述LED芯片20,第二封装层40置于第一封装层30之上。
所述基板10为具有传导线路的电路板,可以为陶瓷基板、金属基板或PLCC等。所述基板10为一平面板体,包括一底面11和与所述底面11背向平行设置的一承载面12。所述承载面12上设有若干固晶区13,和若干与所述固晶区13数量相等的第一电极14,以及第二电极15。所述第一电极14和第二电极15分别一一对应的设于所述固晶区13的两侧。
所述LED芯片20包括一P型电极21和一N型电极22。所述LED芯片20一一对应的固定于所述基板的固晶区13。所述LED芯片20的P型电极21与所述基板10的第一电极14通过导线51电性连接,N型电极22与第二电极15通过导线52电性连接。在本实施例中,导线51、52均为金线。
所述第一封装层30设于所述基板10的承载面12上,且完全覆盖所述LED芯片20和导线51、52。所述第一封装层30是在所述基板10的承载面12上平铺形成,包括与所述基板10相贴合的一贴合面31和一用于承载所述第二封装层40的一支撑面32。在本实施例中,所述支撑面32为水平面。可以理解的,在其它实施例中,所述支撑面32还可以是朝向基板10的方向凹陷的凹曲面。
所述第二封装层40设于所述第一封装层30的支撑面32上,且位于所述LED芯片20和导线51、52的上方。所述第二封装层40是在所述第一封装层30的支撑面32上成型的一半球形封装层,包括与所述第一封装层30的支撑面32粘合的一粘合面41和自所述粘合面41背向所述基本10凸起的一弧形成型面42。形成第二封装层40与第一封装层30的胶体具有如下特性,即形成第二封装层40所用的胶体的流动性小于形成第一封装层30所用的胶体的流动性。
相比于现有技术,本发明的发光二极管芯片封装结构100没有利用围堰结构来限制胶体的溢流。如此,因为没有围堰结构的高度限制,本发明的发光二极管芯片封装结构100的第一封装层30和第二封装层40的高度可以按需求通过控制形成两者的胶体的流动性差异大小和胶体数量来灵活设置,例如可以达到0.5mm以上,得到高度比较高,并具有所需形状的封装层。因为封装层的高度较高,所以使发光二极管芯片封装结构100的混光距离较大,从而可以得到较好的光学取出效率。
本发明还提供了一种上述发光二极管芯片封装结构100的制作方法。
图2为本发明的上述发光二极管芯片封装结构100的制作流程图。
请参见图2,本发明的上述发光二极管芯片封装结构100的制作方法包括以下步骤:
S1固晶:提供一基板和若干LED芯片,将所述LED芯片固定于该基板一侧;
S2打线:提供若干导线,利用该导线将所述LED芯片电性连接于该基板;
S3一次点胶:提供第一胶体,利用点胶的方式将该第一胶体注于所述基板设有LED芯片的一侧;
S4烘烤:烘烤所述第一胶体至半干,形成第一封装层;
S5二次点胶:提供第二胶体,在所述第一封装层上注入该第二胶体,该第二胶体的流动性小于第一胶体的流动性;
S6固化:烘烤所述第二胶体,使得二次点胶中的第二胶体形成第二封装层,同时使第一封装层和第二封装层完全固化。
请参见图3,提供一基板10,在该基板10的承载面12上设有若干固晶区13和第一电极14,以及第二电极15。提供若干LED芯片20,在本实施例中,采用通用的固晶方式固晶,即将LED芯片20放在已刮好银浆层的背胶机面上背上银浆,采用点胶机将适量的银浆点在基板10的固晶区13上,将LED芯片20用刺晶笔刺在基板10的固晶区13上,将刺好晶的基板10放入热循环烘箱中恒温静置一段时间,待银浆固化后取出。
提供若干导线,本实施例中为所述导线50为金线,采用焊线机将LED芯片20与基板10进行电性连接,即,利用导线51将所述LED芯片20的P型电极21与所述基板10的第一电极14电性连接,利用导线52将N型电极22与第二电极15电性连接。
请参见图4,提供第一胶体33。利用点胶的方式将所述第一胶体33注入到所述基板10的承载面12上,使所述第一胶体33平铺在承载面12上且完全覆盖所述LED芯片20和导线50。将基板10放入热循环烘箱中恒温静置一段时间,待所述第一胶体33半固化后取出,此时平铺在承载面12上的所述第一胶体33形成一第一封装层30。所述第一封装层30包括与所述基板10相贴合的一贴合面31和背对所述基板10的一支撑面32。
请参见图5,提供第二胶体43,该第二胶体43的流动性小于第一胶体33的流动性。利用点胶方式将所述第二胶体43注入到所述第一封装层30的支撑面32上,使第二胶体43在所述支撑面32上形成一球形体。将基板10放入热循环烘箱中恒温静置一段时间,待所述第一封装层30和所述第二胶体43完全固化后取出。此时所述第一封装层30的支撑面32上的第二胶体43形成一第二封装40。所述第二封装层40包括与所述第一封装层30的支撑面32粘合的一粘合面41和自所述粘合面41背向所述基本10凸起的一弧形成型面42。
在制作过程中,所述第一胶体33和所述第二胶体43中还可以掺杂荧光粉或者其他改变光学性能的粉体。
所述第一封装层30采用的第一胶体33和第二封装层40采用的第二胶体43为两种不同的胶体。所述第一胶体33的流动性大于所述第二胶体43的流动性,在本实施例中,所述第一胶体33采用粘滞系数介于5000-6000mpas之间的硅胶,所述第二胶体43采用粘滞系数为3400mpas的硅胶。可以理解的,在其它实施例中,所述第一胶体33和所述第二胶体43也可采用其它胶体。
在一次点胶过程中,因所述第一胶体33的流动性较好,故点胶时,第一胶体33可迅速并轻易的在自身的流动下平铺于基板10的承载面12并覆盖芯片和金属线。
在二次点胶过程中,可控制第一胶体33半固化的时间,从而控制第一胶体33的半固化程度,使得第二胶体43点设于第一封装层30上时,第二胶体43的重力不足以克服半固化的第一封装层30的流动性,从而使第一封装层30的支撑面32仍然为一水平面。在本实施例中,半干的第一封装层30的流动性是小于第二胶体43的,这样第二胶体43通过点胶的方式涂覆在半干的第一封装层30上时不会破坏第一封装层的支撑面32的水平性,更不会陷入到第一封装层30内部而与芯片20或导线50接触,破坏结构的完整性。同时由于相比于第一胶体33,第二胶体43流动性较差,以及第二胶体43本身的内聚力,使得第二胶体43注入所述支撑面32上后不会产生平铺的效果,而是形成一球形体。当然,在其它实施例中,可缩短第一胶体33半固化的时间,使第二胶体43点设于半固化的第一封装层30上时,第一封装层30上的支撑面32在第二胶体43的重力作用下朝向基板10的方向微微凹陷,形成凹曲面。
形成所述第一封装层30的第一胶体33和形成所述第二封装层40的第二胶体43的注胶量通过注胶机定量控制,从而使得所述第一封装层30和所述第二封装层40保持成型的一致性。
如此,本发明的所述发光二极管芯片封装结构100制作完毕,如图1所示。
相比于现有技术,本发明的发光二极管芯片封装结构100没有利用围堰结构来限制胶体的溢流,而是采用无围堰结构的发光二极管芯片封装结构100,利用硅胶在硅胶平面上的流动性较差以及胶体本身的内聚力来成型封装结构的封装层。如此,本发明的所述发光二极管芯片封装结构100除了因在结构上没有围堰结构的高度限制,可以得到高度比较高的封装层外,在制程上也减少了在基板10上制作所述围堰结构的步骤,使得制作方法更加简单。
可以理解的是,对于本领域的普通技术人员来说,可以根据本发明的技术构思做出其它各种相应的改变与变形,而所有这些改变与变形都应属于本发明权利要求的保护范围。
Claims (5)
1.一种发光二极管芯片封装结构的制造方法,其特征在于,该方法包括以下步骤:
固晶:提供一基板和若干LED芯片,将所述LED芯片固定于该基板一侧;
打线:提供若干导线,利用该导线将所述LED芯片电性连接于该基板;
一次点胶:提供第一胶体,利用点胶方式将该第一胶体注于所述基板设有LED芯片的一侧;
烘烤:烘烤所述胶体至半干,形成第一封装层,且将所述第一封装层的上表面形成为水平面作为支撑面;
二次点胶:提供第二胶体,在所述第一封装层上注入该第二胶体,第二胶体的流动性小于第一胶体的流动性;
固化:烘烤所述胶体,使得二次点胶中的胶体形成第二封装层,同时使第一封装层和第二封装层完全固化,固化后,所述第一封装层的截面面积大于所述第二封装层的截面面积。
2.如权利要求1所述的发光二极管芯片封装结构的制造方法,其特征在于:所述第一胶体的粘滞系数介于5000-6000mpas。
3.如权利要求2所述的发光二极管芯片封装结构的制造方法,其特征在于:所述第二胶体的粘滞系数为3400mpas。
4.如权利要求1所述的发光二极管芯片封装结构的制造方法,其特征在于:在一次点胶过程中,所述第一胶体通过自身的流动完全覆盖所述LED芯片和所述导线。
5.如权利要求1所述的发光二极管芯片封装结构的制造方法,其特征在于:在烘烤过程中,烘烤所述胶体至半干的标准是在二次点胶过程中,第二胶体不会使所述支撑面塌陷。
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