TWI583030B - 發光二極體晶片封裝結構及其製造方法 - Google Patents

發光二極體晶片封裝結構及其製造方法 Download PDF

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TWI583030B
TWI583030B TW103132869A TW103132869A TWI583030B TW I583030 B TWI583030 B TW I583030B TW 103132869 A TW103132869 A TW 103132869A TW 103132869 A TW103132869 A TW 103132869A TW I583030 B TWI583030 B TW I583030B
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張忠民
張簡千琳
吳雅婷
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榮創能源科技股份有限公司
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Description

發光二極體晶片封裝結構及其製造方法
本發明涉及一種半導體之封裝結構及其製造方法,特別涉及一種發光二極體晶片封裝結構及其製造方法。
發光二極體封裝結構有多種封裝方式,例如板上晶片(COB)封裝是將發光二極體晶片貼裝在印刷線路板上,晶片與印刷線路板之電氣連接是通過打線連接之方法實現,並進一步用樹脂覆蓋晶片和導線以確保可靠性。習知的COB封裝體因為是在平板上注膠,大部分需要先於平板上設置一環繞晶片的圍堰結構,再把膠體注入圍堰結構內。該圍堰結構用於將膠體局限住,避免膠體溢流。但是,由於圍堰結構之存在,限制了該封裝體封裝層之高度,從而影響封裝體之光學效率。
有鑒於此,有必要提供一種無圍堰結構之發光二極體晶片封裝結構及其製造方法。
一種發光二極體晶片封裝結構,包括一基板,設於基板上之若干LED晶片,以及罩設所述LED晶片之封裝層,其中,所述LED晶片通過導線與所述基板電性連接;所述封裝層包括至少兩層之封裝材料,依次為第 一封裝層、第二封裝層,第一封裝層平鋪於基板上並完全覆蓋LED晶片及導線,第二封裝層覆蓋在第一封裝層上,形成第二封裝層所用之膠體的流動性小於形成第一封裝層所用之膠體的流動性。
一種發光二極體晶片封裝結構之製作方法,該方法包括以下步驟:固晶:提供一基板和若干LED晶片,將所述LED晶片固定於該基板一側;打線:提供若干導線,利用該導線將所述LED晶片電性連接於該基板;一次點膠:提供第一膠體,利用點膠方式將該第一膠體注於所述基板設有LED晶片之一側;烘烤:烘烤所述膠體至半乾,形成第一封裝層;二次點膠:提供第二膠體,在所述第一封裝層上注入該第二膠體,第二膠體之流動性小於第一膠體之流動性;固化:烘烤所述膠體,使得二次點膠中的膠體形成第二封裝層,同時使第一封裝層和第二封裝層完全固化。
相比於習知技術,本發明之發光二極體晶片封裝結構沒有採用通用之圍堰體來限制封裝膠體之溢流,而是採用膠體在膠體平面上的流動性較差與膠體本身之內聚力來成型封裝體之封裝層。利用此方式得到的封裝體因無圍堰體之限制,可以得到高度比較高的封裝體,從而使封裝體具有比較好的光學效率。
100‧‧‧發光二極體晶片封裝結構
10‧‧‧基板
11‧‧‧底面
12‧‧‧承載面
13‧‧‧固晶區
14‧‧‧第一電極
15‧‧‧第二電極
20‧‧‧LED晶片
21‧‧‧P型電極
22‧‧‧N型電極
30‧‧‧第一封裝層
31‧‧‧貼合面
32‧‧‧支撐面
33‧‧‧第一膠體
40‧‧‧第二封裝層
41‧‧‧黏合面
42‧‧‧成型面
43‧‧‧第二膠體
50、51、52‧‧‧導線
圖1為本發明實施例中所述發光二極體晶片封裝結構之剖面圖。
圖2為圖1中所述發光二極體晶片封裝結構之製作流程圖。
圖3為圖2中所述發光二極體晶片封裝結構在打線後的俯視圖。
圖4為圖2中所述發光二極體晶片封裝結構在一次點膠時的俯視圖。
圖5為圖2中所述發光二極體晶片封裝結構在二次點膠時的俯視圖。
如下具體實施方式將結合上述附圖進一步說明本發明。
請參見圖1,本發明之發光二極體晶片封裝結構100包括一基板10,設於基板10上的若干LED晶片20,以及至少兩層之封裝層。在本實施例中,所述封裝層包括兩層,自基板10向上依次為第一封裝層30、第二封裝層40。其中第一封裝層30覆蓋所述LED晶片20,第二封裝層40置於第一封裝層30之上。
所述基板10為具有傳導線路之電路板,可以為陶瓷基板、金屬基板或PLCC等。所述基板10為一平面板體,包括一底面11和與所述底面11背向平行設置之一承載面12。所述承載面12上設有若干固晶區13,和若干與所述固晶區13數量相等之第一電極14,以及第二電極15。所述第一電極14和第二電極15分別一一對應地設於所述固晶區13之兩側。
所述LED晶片20包括一P型電極21和一N型電極22。所述LED晶片20一一對應地固定於所述基板10之固晶區13。所述LED晶片20之P型電極21與所述基板10之第一電極14通過導線51電性連接,N型電極22與第二電極15通過導線52電性連接。在本實施例中,導線51、52均為金線。
所述第一封裝層30設於所述基板10之承載面12上,且完全覆蓋所述LED晶片20和導線51、52。所述第一封裝層30是在所述基板10之承載面12上平鋪形成,包括與所述基板10相貼合之一貼合面31和一用於承載所述第二封裝層40之一支撐面32。在本實施例中,所述支撐面32為水平面。可 以理解的,在其它實施例中,所述支撐面32還可以是朝向基板10的方向凹陷之凹曲面。
所述第二封裝層40設於所述第一封裝層30之支撐面32上,且位於所述LED晶片20和導線51、52的上方。所述第二封裝層40是在所述第一封裝層30之支撐面32上成型的一半球形封裝層,包括與所述第一封裝層30之支撐面32黏合的一黏合面41和自所述黏合面41背向所述基板10凸起之一弧形成型面42。形成第二封裝層40與第一封裝層30之膠體具有如下特性,即形成第二封裝層40所用之膠體的流動性小於形成第一封裝層30所用之膠體的流動性。
相比於習知技術,本發明之發光二極體晶片封裝結構100沒有利用圍堰結構來限制膠體之溢流。如此,因為沒有圍堰結構之高度限制,本發明之發光二極體晶片封裝結構100之第一封裝層30和第二封裝層40之高度可以按需求通過控制形成兩者之膠體的流動性差異大小和膠體數量來靈活設置,例如可以達到0.5mm以上,得到高度比較高,並具有所需形狀之封裝層。因為封裝層之高度較高,所以使發光二極體晶片封裝結構100之混光距離較大,從而可以得到較好的光學取出效率。
本發明還提供了一種上述發光二極體晶片封裝結構100之製作方法。
圖2為本發明之上述發光二極體晶片封裝結構100之製作流程圖。
請參見圖2,本發明之上述發光二極體晶片封裝結構100之製作方法包括以下步驟:S1固晶:提供一基板和若干LED晶片,將所述LED晶片固定於該基板一側; S2打線:提供若干導線,利用該導線將所述LED晶片電性連接於該基板;S3一次點膠:提供第一膠體,利用點膠之方式將該第一膠體注於所述基板設有LED晶片的一側;S4烘烤:烘烤所述第一膠體至半乾,形成第一封裝層;S5二次點膠:提供第二膠體,在所述第一封裝層上注入該第二膠體,該第二膠體之流動性小於第一膠體之流動性;S6固化:烘烤所述第二膠體,使得二次點膠中的第二膠體形成第二封裝層,同時使第一封裝層和第二封裝層完全固化。
請參見圖3,提供一基板10,在該基板10之承載面12上設有若干固晶區13和第一電極14,以及第二電極15。提供若干LED晶片20,在本實施例中,採用通用之固晶方式固晶,即將LED晶片20放在已刮好銀漿層之背膠機面上背上銀漿,採用點膠機將適量的銀漿點在基板10之固晶區13上,將LED晶片20用刺晶筆刺在基板10之固晶區13上,將刺好晶之基板10放入熱迴圈烘箱中恒溫靜置一段時間,待銀漿固化後取出。
提供若干導線,本實施例中為所述導線50為金線,採用焊線機將LED晶片20與基板10進行電性連接,即,利用導線51將所述LED晶片20之P型電極21與所述基板10之第一電極14電性連接,利用導線52將N型電極22與第二電極15電性連接。
請參見圖4,提供第一膠體33。利用點膠之方式將所述第一膠體33注入到所述基板10之承載面12上,使所述第一膠體33平鋪在承載面12上且完全覆蓋所述LED晶片20和導線50。將基板10放入熱迴圈烘箱中恒溫靜置一段時間,待所述第一膠體33半固化後取出,此時平鋪在承載面12上之所 述第一膠體33形成一第一封裝層30。所述第一封裝層30包括與所述基板10相貼合之一貼合面31和背對所述基板10之一支撐面32。
請參見圖5,提供第二膠體43,該第二膠體43之流動性小於第一膠體33之流動性。利用點膠方式將所述第二膠體43注入到所述第一封裝層30之支撐面32上,使第二膠體43在所述支撐面32上形成一球形體。將基板10放入熱迴圈烘箱中恒溫靜置一段時間,待所述第一封裝層30和所述第二膠體43完全固化後取出。此時所述第一封裝層30之支撐面32上的第二膠體43形成一第二封裝層40。所述第二封裝層40包括與所述第一封裝層30之支撐面32黏合之一黏合面41和自所述黏合面41背向所述基板10凸起之一弧形成型面42。
在製作過程中,所述第一膠體33和所述第二膠體43中還可以摻雜螢光粉或者其他改變光學性能之粉體。
所述第一封裝層30採用之第一膠體33和第二封裝層40採用之第二膠體43為兩種不同的膠體。所述第一膠體33之流動性大於所述第二膠體43之流動性,在本實施例中,所述第一膠體33採用黏滯係數介於5000-6000mpas之間的矽膠,所述第二膠體43採用黏滯係數為3400mpas的矽膠。可以理解的,在其它實施例中,所述第一膠體33和所述第二膠體43也可採用其它膠體。
在一次點膠過程中,因所述第一膠體33之流動性較好,故點膠時,第一膠體33可迅速並輕易地在自身的流動下平鋪於基板10之承載面12並覆蓋晶片和金屬線。
在二次點膠過程中,可控制第一膠體33半固化之時間,從而控制第一膠體33之半固化程度,使得第二膠體43點設於第一封裝層30上時,第二膠體43之重力不足以克服半固化之第一封裝層30之流動性,從而使第一 封裝層30之支撐面32仍然為一水平面。在本實施例中,半乾之第一封裝層30之流動性是小於第二膠體43的,這樣第二膠體43通過點膠之方式塗覆在半乾之第一封裝層30上時不會破壞第一封裝層之支撐面32的水平性,更不會陷入到第一封裝層30內部而與LED晶片20或導線50接觸,破壞結構之完整性。同時由於相比於第一膠體33,第二膠體43之流動性較差,以及第二膠體43本身之內聚力,使得第二膠體43注入所述支撐面32上後不會產生平鋪之效果,而是形成一球形體。當然,在其它實施例中,可縮短第一膠體33半固化之時間,使第二膠體43點設於半固化之第一封裝層30上時,第一封裝層30之支撐面32在第二膠體43之重力作用下朝向基板10之方向微微凹陷,形成凹曲面。
形成所述第一封裝層30之第一膠體33和形成所述第二封裝層40之第二膠體43的注膠量是通過注膠機定量控制,從而使得所述第一封裝層30和所述第二封裝層40保持成型之一致性。
如此,本發明之所述發光二極體晶片封裝結構100製作完畢,如圖1所示。
相比於習知技術,本發明之發光二極體晶片封裝結構100沒有利用圍堰結構來限制膠體之溢流,而是採用無圍堰結構之發光二極體晶片封裝結構100,利用矽膠在矽膠平面上之流動性較差以及膠體本身之內聚力來成型封裝結構之封裝層。如此,本發明之所述發光二極體晶片封裝結構100除了因在結構上沒有圍堰結構之高度限制,可以得到高度比較高的封裝層外,在制程上也減少了在基板10上製作所述圍堰結構之步驟,使得製作方法更加簡單。
綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,自不能以此限製本案之 申請專利範圍。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。
100‧‧‧發光二極體晶片封裝結構
10‧‧‧基板
11‧‧‧底面
12‧‧‧承載面
13‧‧‧固晶區
14‧‧‧第一電極
15‧‧‧第二電極
20‧‧‧LED晶片
21‧‧‧P型電極
22‧‧‧N型電極
30‧‧‧第一封裝層
31‧‧‧貼合面
32‧‧‧支撐面
40‧‧‧第二封裝層
41‧‧‧黏合面
42‧‧‧成型面

Claims (10)

  1. 一種發光二極體晶片封裝結構,包括一基板,設於基板上的若干LED晶片,以及罩設所述LED晶片之封裝層,其改良在於:所述LED晶片通過導線與所述基板電性連接;所述封裝層包括至少兩層的封裝材料,依次為第一封裝層、第二封裝層,第一封裝層平鋪於基板上並完全覆蓋LED晶片及導線,第二封裝層覆蓋在第一封裝層上,形成第二封裝層所用之膠體的流動性小於形成第一封裝層所用之膠體的流動性。
  2. 如申請專利範圍第1項所述之發光二極體晶片封裝結構,其中,所述基板為具有傳導線路之基板。
  3. 如申請專利範圍第1項所述之發光二極體晶片封裝結構,其中,所述第一封裝層包括用於承載所述第二封裝層的一支撐面,該支撐面為水平面。
  4. 如申請專利範圍第1項所述之發光二極體晶片封裝結構,其中,所述第二封裝層位於所述LED晶片和導線的上方。
  5. 一種發光二極體晶片封裝結構的製造方法,其中,該方法包括以下步驟:固晶:提供一基板和若干LED晶片,將所述LED晶片固定於該基板一側;打線:提供若干導線,利用該導線將所述LED晶片電性連接於該基板;一次點膠:提供第一膠體,利用點膠方式將該第一膠體注於所述基板設有LED晶片之一側;烘烤:烘烤所述膠體至半乾,形成第一封裝層;二次點膠:提供第二膠體,在所述第一封裝層上注入該第二膠體,第二膠體之流動性小於第一膠體之流動性;固化:烘烤所述膠體,使得二次點膠中的膠體形成第二封裝層,同時使第一封裝層和第二封裝層完全固化。
  6. 如申請專利範圍第5項所述之發光二極體晶片封裝結構的製造方法,其中,所述第一膠體之黏滯係數介於5000-6000mpas。
  7. 如申請專利範圍第6項所述之發光二極體晶片封裝結構的製造方法,其中,所述第二膠體之黏滯係數為3400mpas。
  8. 如申請專利範圍第5項所述之發光二極體晶片封裝結構的製造方法,其中,在一次點膠過程中,所述第一膠體通過自身之流動完全覆蓋所述LED晶片和所述導線。
  9. 如申請專利範圍第5項所述之發光二極體晶片封裝結構的製造方法,其中,所述第一封裝層上形成用於支撐第二膠體之支撐面,所述支撐面為水平面。
  10. 如申請專利範圍第9項所述之發光二極體晶片封裝結構的製造方法,其中,在烘烤過程中,烘烤所述膠體至半乾之標準是在二次點膠過程中,第二膠體不會使所述支撐面塌陷。
TW103132869A 2014-08-29 2014-09-23 發光二極體晶片封裝結構及其製造方法 TWI583030B (zh)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120025241A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Surface mounted led packaging structure and method based on a silicon substrate
US20120025214A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Led packaging structure and packaging method
US20120100646A1 (en) * 2010-10-26 2012-04-26 Advanced Optoelectronic Technology, Inc. Method for distributing phosphor particulates on led chip
TWI409978B (zh) * 2010-04-22 2013-09-21
TWI411143B (en) * 2009-06-26 2013-10-01 Led package structure with a plurality of standby pads for increasing wire-bonding yield and method for manufacturing the same
TWI452734B (zh) * 2011-08-01 2014-09-11

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7646035B2 (en) * 2006-05-31 2010-01-12 Cree, Inc. Packaged light emitting devices including multiple index lenses and multiple index lenses for packaged light emitting devices
US7804147B2 (en) * 2006-07-31 2010-09-28 Cree, Inc. Light emitting diode package element with internal meniscus for bubble free lens placement
US7808013B2 (en) * 2006-10-31 2010-10-05 Cree, Inc. Integrated heat spreaders for light emitting devices (LEDs) and related assemblies
TWI540766B (zh) * 2013-07-10 2016-07-01 隆達電子股份有限公司 發光二極體封裝結構
TW201620157A (zh) * 2014-11-18 2016-06-01 邱羅利士公司 封裝結構及其製法與成型基材

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI411143B (en) * 2009-06-26 2013-10-01 Led package structure with a plurality of standby pads for increasing wire-bonding yield and method for manufacturing the same
TWI409978B (zh) * 2010-04-22 2013-09-21
US20120025241A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Surface mounted led packaging structure and method based on a silicon substrate
US20120025214A1 (en) * 2010-07-30 2012-02-02 Apt Electronics Ltd. Led packaging structure and packaging method
US20120100646A1 (en) * 2010-10-26 2012-04-26 Advanced Optoelectronic Technology, Inc. Method for distributing phosphor particulates on led chip
TWI452734B (zh) * 2011-08-01 2014-09-11

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