CN105353288B - Transistor technology surge detection system and detection method - Google Patents
Transistor technology surge detection system and detection method Download PDFInfo
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- CN105353288B CN105353288B CN201410409294.3A CN201410409294A CN105353288B CN 105353288 B CN105353288 B CN 105353288B CN 201410409294 A CN201410409294 A CN 201410409294A CN 105353288 B CN105353288 B CN 105353288B
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Abstract
A kind of transistor technology surge detection system of present invention offer and detection method, wherein system includes to-be-measured cell array, ranks decoder, ranks selector and oscillator；To-be-measured cell array is the array being made of at least two to-be-measured cells；Ranks decoder is connect with each to-be-measured cell respectively, for selecting to-be-measured cell；Ranks selector is connect with the test transistor in oscillator and each to-be-measured cell respectively, for the test transistor selected to be connected to oscillator；The output signal of test transistor is converted to pulse signal by oscillator, and the frequency of pulse signal is corresponding with the threshold voltage of test transistor, and the fluctuation of the threshold voltage of test transistor is determined with the fluctuation by pulse signal frequency.Transistor technology surge detection system and detection method provided by the invention can solve the problems, such as that the detection method of existing semiconductor transistor technological fluctuation is more complex, realize and to transistor technology fluctuation quickly, easily detect.
Description
Technical field
The present invention relates to semiconductor transistor detection technique more particularly to a kind of transistor technology surge detection system and inspections
Survey method.
Background technology
The technological fluctuation of semiconductor transistor refers in the manufacturing process of semiconductor chip, not due to dopant concentration
Uniformly, photoetching process be not thorough or planarization process it is imperfect, result in semiconductor transistor parameters (such as its
Channel length, width and gate oxide thickness etc.) with ideal numerical value and differ, but there are certain deviations.Technological fluctuation
The electrical parameters such as the threshold voltage of semiconductor transistor itself can be influenced, the conducting of transistor mistake or mistake can be then caused when serious
Shutdown.For between multiple transistors in semiconductor chip, technological fluctuation can then cause the performance between each transistor to exist
Difference, and then affect the working performance of entire semiconductor chip.Therefore, very to the detection of semiconductor transistor technology fluctuation
It is important.
Currently, to the detection mode of semiconductor transistor technology fluctuation, one is using physico-chemical process, directly measure
Then the physical quantitys such as channel length, width and gate oxide thickness carry out the case where comprehensive analysis obtains technological fluctuation.But it is this
Method can generate semiconductor chip the destructive damage for being difficult to repair, and cost is very high, and measurement process is extremely complex.It is another
Kind of mode is such as the threshold voltage by easily being measured by the electrical parameter that technological fluctuation is influenced, and passes through and measures threshold value electricity
Pressure is to use a kind of relatively broad detection mode at present indirectly the case where acquisition technological fluctuation.
In the prior art, it is special by obtaining the Current Voltage of transistor to the measurement of the threshold voltage of semiconductor transistor
Linearity curve carrys out the anti-mode for pushing away threshold voltage, can obtain more accurate numerical value, but due to obtaining current-voltage characteristic curve
Method it is more complex so as to transistor technology fluctuation detection process it is also extremely complex, it is less efficient.
Invention content
A kind of transistor technology surge detection system of present invention offer and detection method, for solving existing semiconductor die
The more complex problem of the detection method of body pipe technological fluctuation to transistor technology fluctuation quickly, easily detect to realize.
The embodiment of the present invention provides a kind of transistor technology surge detection system, including the decoding of to-be-measured cell array, ranks
Device, ranks selector and oscillator；
The to-be-measured cell array is the array being made of at least two to-be-measured cells；
The ranks decoder is connect with each to-be-measured cell respectively, for selecting to-be-measured cell；
The ranks selector is connect with the test transistor in the oscillator and each to-be-measured cell respectively, is used for
Selected test transistor is connected to the oscillator；The oscillator is converted to the output signal of the test transistor
Pulse signal, the frequency of the pulse signal is corresponding with the threshold voltage of the test transistor, to pass through the pulse signal
The fluctuation of frequency determines the fluctuation of the threshold voltage of the test transistor.
Transistor technology surge detection system as described above, the to-be-measured cell further include auxiliary detection transistor, institute
It is identical as the structure of the test transistor to state auxiliary detection transistor；
The data terminal of the auxiliary detection transistor is connected with the data terminal of the test transistor, and the auxiliary detection is brilliant
The control terminal of the control terminal of body pipe and the test transistor receives the enable signal of reverse phase each other respectively, in the crystalline substance to be measured
When body pipe turns off, the auxiliary detects transistor turns and inhibits the oscillator operation.
Transistor technology surge detection system as described above, the test transistor and auxiliary detection transistor are p ditches
Road field-effect tube；
The source electrode of the auxiliary detection transistor receives high level signal, and drain electrode and the source electrode of the test transistor connect
It connects, the grounded drain of the test transistor；
Output end of the source electrode of the test transistor also as the test transistor, connect with the oscillator.
Transistor technology surge detection system as described above, the oscillator include being in turn connected into cricoid odd level
Phase inverter, wherein output end of the output end of level-one phase inverter as the oscillator；
First connecting pin of phase inverters at different levels receives high level signal, output of the second connection end with the to-be-measured cell
End connection.
Transistor technology surge detection system as described above, every level-one phase inverter in the odd level phase inverter include
First field-effect tube and the second field-effect tube, first field-effect tube are p-channel field-effect tube, and second field-effect tube is
N-channel field-effect tube；
The source electrode of first field-effect tube receives high level signal, and drain electrode and the drain electrode of second field-effect tube connect
It connects；Input terminal of the source electrode of second field-effect tube as the oscillator, connect with the output end of the auxiliary transistor；
The grid of first field-effect tube is connect with the grid of second field-effect tube, and as the phase inverter
Input terminal is connect with the output end of previous stage phase inverter, the output of first field-effect tube to drain as the phase inverter
End.
Transistor technology surge detection system as described above, the test transistor and auxiliary detection transistor are n ditches
Road field-effect tube；
The source electrode ground connection of the auxiliary detection transistor, drain electrode is connect with the source electrode of the test transistor, described to be measured
The drain electrode of transistor receives high level signal；
Output end of the source electrode of the test transistor also as the test transistor, connect with the oscillator.
Transistor technology surge detection system as described above, the oscillator include being in turn connected into cricoid odd level
Phase inverter, wherein output end of the output end of level-one phase inverter as the oscillator；
First connecting pin of phase inverters at different levels is grounded, and second connection end is connect with the output end of the to-be-measured cell.
Transistor technology surge detection system as described above, every level-one phase inverter in the odd level phase inverter include
Third field-effect tube and the 4th field-effect tube, the third field-effect tube are n-channel field-effect tube, and the 4th field-effect tube is
P-channel field-effect tube；
The source electrode of the third field-effect tube is grounded, and drain electrode is connect with the drain electrode of the 4th field-effect tube；Described 4th
Input terminal of the source electrode of field-effect tube as the oscillator, connect with the output end of the auxiliary transistor；
The grid of the third field-effect tube is connect with the grid of the 4th field-effect tube, and as the phase inverter
Input terminal is connect with the output end of previous stage phase inverter, the output of the third field-effect tube to drain as the phase inverter
End.
Transistor technology surge detection system as described above, further includes frequency divider；The frequency divider and the oscillator
Connection, the pulse signal for being exported to the oscillator divide.
Present aspect embodiment also provides a kind of transistor technology surge detection method, including：
To-be-measured cell in the to-be-measured cell array that is made of at least two to-be-measured cells is selected；
The output signal of test transistor in the selected to-be-measured cell is converted into pulse signal, the pulse letter
Number frequency it is corresponding with the threshold voltage of the test transistor, with by the fluctuation of the pulse signal frequency determine described in wait for
Survey the fluctuation of the threshold voltage of transistor.
Transistor technology surge detection method as described above further includes：
The pulse signal is divided, determines that the pulse is believed with the frequency fluctuation by the pulse signal after frequency dividing
Number frequency fluctuation.
Technical solution provided in this embodiment selectes to-be-measured cell, ranks using ranks decoder in to-be-measured cell array
Selector connects the test transistor in selected to-be-measured cell with oscillator, so that oscillator is defeated by test transistor
The signal gone out is converted to pulse signal, is detected by corresponding to the frequency of pulse signal of output to each to-be-measured cell, according to
The fluctuation of frequency can determine the fluctuation situation of each test transistor threshold voltage, namely embody transistor technology fluctuation
Situation.Compared with prior art, technology provided in this embodiment is relatively simple, can realize work in the piece to semiconductor transistor
Skill fluctuation progress is quick, easily detects.
Description of the drawings
Fig. 1 is the structural schematic diagram for the transistor technology surge detection system that the embodiment of the present invention one provides；
Fig. 2 is the structural schematic diagram of to-be-measured cell and oscillator that the embodiment of the present invention one provides；
Fig. 3 is the structural schematic diagram of p-channel field-effect tube transmission telecommunications number；
Fig. 4 is the structural schematic diagram of n-channel field-effect tube transmission telecommunications number；
Fig. 5 is the structural schematic diagram of to-be-measured cell provided by Embodiment 2 of the present invention and oscillator；
Fig. 6 is the structural schematic diagram of to-be-measured cell and oscillator that the embodiment of the present invention three provides；
Fig. 7 is the structure of first kind to-be-measured cell in the transistor technology surge detection system that the embodiment of the present invention four provides
Schematic diagram；
Fig. 8 is the structure of the second class to-be-measured cell in the transistor technology surge detection system that the embodiment of the present invention four provides
Schematic diagram；
Fig. 9 is the flow chart for the transistor technology surge detection method that the embodiment of the present invention five provides.
Specific implementation mode
Embodiment one
Fig. 1 is the structural schematic diagram for the transistor technology surge detection system that the embodiment of the present invention one provides.Such as Fig. 1 institutes
Show, transistor technology surge detection system provided in this embodiment may include：To-be-measured cell array, ranks decoder, ranks
Selector 4 and oscillator 2, wherein to-be-measured cell array is the array being made of at least two to-be-measured cells 1, and at least two wait for
It surveys unit 1 and constitutes two-dimensional array.Each to-be-measured cell 1 includes a test transistor, technical side provided in this embodiment
Case is exactly that the threshold voltage fluctuation situation to the test transistor in each to-be-measured cell 1 is detected, to determine test transistor
Technological fluctuation situation.
Ranks decoder is connect with each to-be-measured cell 1 respectively, ranks decoder for receive external circuit send it is to be measured
Element address data, and corresponding to-be-measured cell 1 is chosen in to-be-measured cell array according to the address date.Ranks decoder
Specific may include line decoder 31 and column decoder 32, the address date that line decoder 31 is used to be sent according to external circuit is known
Other row address, the column address for identification of column decoder 32, row address and column address are combined, and can select unique list to be measured
Member 1.Realization method commonly used in the prior art can be used in the concrete structure of ranks decoder, and the present embodiment is not construed as limiting this.
Ranks selector 4 is connect with the test transistor in oscillator 2 and each to-be-measured cell 1 respectively, for what will be selected
Test transistor is connected to oscillator 2.Specifically, ranks selector 4 can have multiple input end, an input terminal to be waited for one
The output end connection of transistor is surveyed, the output end of ranks selector 4 is connect with the input terminal of oscillator 2, can wait for chosen
The output end for surveying transistor is connect with oscillator 2.The specific implementation of ranks selector 4 can refer to commonly used in the prior art
Mode is realized.
Oscillator 2 is used to the output signal of test transistor being converted to pulse signal, the frequency of the pulse signal with wait for
The threshold voltage for surveying transistor has correspondence, and the threshold value electricity of test transistor is determined with the fluctuation by pulse signal frequency
The fluctuation of pressure.
The signal of each test transistor output in to-be-measured cell array is converted into pulse signal, by pulse signal
The detection of frequency and compare, can determine the threshold voltage in each test transistor with the presence or absence of certain transistors and other crystal
The larger situation of pipe gap.Since manufacturing process is to influence the threshold voltage maximum factor of transistor, accordingly, it is determined that crystal
The fluctuation situation of pipe threshold voltage also corresponds to determine the fluctuation situation of transistor fabrication.
For the technical solution that each to-be-measured cell 1 measures in to-be-measured cell array, can refer to shown in Fig. 2, Fig. 2
The structural schematic diagram of the to-be-measured cell and oscillator that are provided for the embodiment of the present invention one.In fig. 2, to-be-measured cell 1 includes to be measured
The output end of transistor 11, test transistor 11 is connect with oscillator 2.
Semiconductor transistor is utilized in technical solution provided in this embodiment, and there are threshold values during transmission telecommunications number
The phenomenon that loss of voltage, by taking field-effect tube as an example, as shown in Figure 3 and Figure 4, Fig. 3 is the knot of p-channel field-effect tube transmission telecommunications number
Structure schematic diagram, Fig. 4 are the structural schematic diagram of n-channel field-effect tube transmission telecommunications number.Such as：P-channel field-effect tube is low in transmission
When level signal GND, the signal of reality output is not GND, but GND+VTH_p, wherein VTH_pFor the threshold of p-channel field-effect tube
Threshold voltage；For n-channel field-effect tube when transmitting high level signal VDD, the signal of reality output is not VDD, but VDD-
VTH_n, wherein VTH_nFor the threshold voltage of n-channel field-effect tube.
According to the Principle of Signal Transmission of above-mentioned field-effect tube, according to the input signal and output signal of field-effect tube
To obtain its threshold voltage.But for including the semiconductor chip of multiple transistors, by the threshold value electricity of multiple transistors
It is a complex problem that pressure, which is exported and measured, on the one hand, since the pin of semiconductor chip is limited, if by multiple crystal
The output signal of pipe is exported by the pin of semiconductor chip, then can improve the reuse plan difficulty of chip pin；Another party
The output signal of transistor is converted to digital signal output, but this method is needed in semiconductor by face according to analog-digital converter
Chip interior increases analog-to-digital conversion partial circuit, can increase the area of chip design difficulty and chip, also improve semiconductor core
Piece is designed and manufactured as this.
Therefore, the present embodiment uses oscillator 2, the output signal of test transistor 11 is converted to pulse signal, the arteries and veins
The threshold voltage of the frequency and test transistor 11 of rushing signal can be in one-to-one relationship.Specifically, above-mentioned oscillator 2 can be with
Using oscillator commonly used in the prior art, the voltage signal of analog quantity can be converted to digital pulse signal, it is especially all
Phase pulse signal, such as the oscillating circuit being made of odd level phase inverter can be used, input terminal is defeated with test transistor 11
Outlet connects.
The effect of above-mentioned to-be-measured cell 1 is exactly to receive the enable signal and input signal of external circuit offer, so that in it
The test transistor 11 in portion is connected, and exports an electric signal according to the input signal and be supplied to oscillator 2.People in the art
Member can design a variety of circuits to realize the function of to-be-measured cell 1.
Technical solution provided in this embodiment selectes to-be-measured cell, ranks using ranks decoder in to-be-measured cell array
Selector connects the test transistor in selected to-be-measured cell with oscillator, so that oscillator is defeated by test transistor
The signal gone out is converted to pulse signal, is detected by corresponding to the frequency of pulse signal of output to each to-be-measured cell, according to
The fluctuation of frequency can determine the fluctuation situation of each test transistor threshold voltage, namely embody transistor technology fluctuation
Situation.Compared with prior art, technology provided in this embodiment is relatively simple, can realize to the work in semiconductor transistor piece
Skill fluctuation progress is quick, easily detects.
Based on the above technical solution, to-be-measured cell 1 can also include auxiliary other than including test transistor 11
Detection transistor 12 is helped, structure is identical as test transistor 11, as shown in Figure 2.Auxiliary detection transistor 12 data terminal with
The data terminal of test transistor 11 is connected, and the control terminal of auxiliary detection transistor 12 and the control terminal reception of test transistor 11 are mutual
For the enable signal of reverse phase, when so that test transistor 11 being connected, auxiliary detection transistor 12 turns off, and in test transistor 11
When shutdown, auxiliary detection transistor 12 is connected, and sends the signal for inhibiting oscillator operation to oscillator 2, so that oscillation
Device is stopped.
The embodiment of the present invention carries out the technological fluctuation detecting system of semiconductor transistor by taking field-effect tube as an example
Detailed description.Field-effect tube is generally divided into n-channel field-effect tube and p-channel field-effect tube, in the present embodiment, by field-effect tube
Source electrode and drain electrode be known as data terminal, grid is known as control terminal.
Above-mentioned test transistor 11 can be n-channel field-effect tube, or p-channel field-effect tube, then to-be-measured cell
Array can be there are three types of form, first, the test transistor 11 in whole to-be-measured cells 1 is n-channel field-effect tube；Second,
Test transistor 11 in whole to-be-measured cells 1 is p-channel field-effect tube；Third, crystalline substance to be measured in which part to-be-measured cell 1
Body pipe 11 is n-channel field-effect tube, and the test transistor 11 in remaining to-be-measured cell 1 is p-channel field-effect tube.
The case where being n-channel field-effect tube or p-channel field-effect tube for test transistor 11, people in the art can be with
Corresponding circuit structure is designed to realize the function of above-mentioned to-be-measured cell 1.Embodiment two and embodiment three are with regard to two kinds of field
Effect pipe provides concrete implementation mode respectively.Wherein, embodiment is second is that be p-channel field-effect tube for test transistor 11
When, a kind of realization method of to-be-measured cell 1 and oscillator 2 is provided, it is to be measured that the to-be-measured cell 1 in embodiment two is known as the first kind
Unit；Embodiment three is for test transistor 11 when being n-channel field-effect tube, provides the another of to-be-measured cell 1 and oscillator 2
To-be-measured cell 1 in embodiment three is known as the second class to-be-measured cell by kind realization method.
When the test transistor 11 in whole to-be-measured cells 1 is p-channel field-effect tube, to-be-measured cell 1 can refer to reality
Apply the realization method that example two is provided；When the test transistor 11 in whole to-be-measured cells 1 is n-channel field-effect tube, wait for
It surveys unit 1 and can refer to the realization method that embodiment three is provided；When the test transistor 11 in part to-be-measured cell 1 is n-channel
Field-effect tube, the test transistor 11 in rest part to-be-measured cell 1 are that p-channel field-effect tube namely two kinds of field-effect tube are same
When being present in to-be-measured cell array, the realization method of embodiment two and embodiment three can be combined, the first kind is to be measured
The quantity of unit and the second class to-be-measured cell can match with ranks decoder.
Embodiment two
Fig. 5 is the structural schematic diagram of to-be-measured cell provided by Embodiment 2 of the present invention and oscillator.As shown in figure 5, by p ditches
The test transistor 11 that road field-effect tube is constituted is known as the first test transistor MP0.To-be-measured cell 1 is in addition to including the first crystalline substance to be measured
Can also include that the first auxiliary detects transistor MP1, structure is identical as MP0, i.e. MP0 and MP1 are p ditches except body pipe MP0
Road field-effect tube.
The data terminal of MP1 and MP0 is connected, specifically, the source electrode reception high level signal of MP1 is (i.e. defeated in embodiment one
Enter signal), drain electrode is connect with the source electrode of MP0, the grounded drain of MP0, the output end of the source electrode of MP0 also as to-be-measured cell 1, with
Oscillator 2 connects.
The grid of MP0 and MP1 receives the enable signal of reverse phase each other, and to realize, when MP0 is connected, MP1 is turned off, and MP1 will not
Influence the output signal of MP0.A phase inverter can be connected in the grid of MP1, the input terminal of the phase inverter and the grid of MP0 connect
Receive same enable signal.
Corresponding with p-channel field-effect tube, oscillator 2 may include being in turn connected into cricoid odd level phase inverter,
Output end of the output end of middle level-one phase inverter as oscillator 2.First connecting pin of phase inverters at different levels receives high level signal,
Second connection end is connect with the output end of to-be-measured cell 1.
The realization method of a variety of phase inverters that can constitute oscillator 2 exists in the prior art, the present embodiment is directed to list to be measured
Member 1 proposes a kind of realization method of phase inverter, specifically, every level-one phase inverter in odd level phase inverter may include first
Field-effect tube T1 and the second field-effect tube T2, wherein the first field-effect tube T1 can be p-channel field-effect tube, the second field-effect
Pipe T2 can be n-channel field-effect tube.The source electrode of first field-effect tube T1 receives high level as the first connecting pin of phase inverter
Signal, drain electrode are connect with the drain electrode of the second field-effect tube T2, and the source electrode of the second field-effect tube T2 is connected as the second of phase inverter
End, also the input terminal as oscillator 2, connect with the output end of MP0.
The grid of first field-effect tube T1 is connect with the grid of the second field-effect tube T2, and as the input of this grade of phase inverter
End is connect with the output end of previous stage phase inverter, the output end of the first field-effect tube T1 to drain as this grade of phase inverter.
The course of work of above-mentioned to-be-measured cell 1 and oscillator 2 is：An enable signal is provided by external circuit, when this makes
When energy signal is high level signal 1, the signal that the grid of MP0 receives is that 1, MP0 is turned off；Phase inverter in to-be-measured cell 1 will
After 1 reverse phase of enable signal, signal that MP1 is received is 0, MP1 conductings, then the output end of to-be-measured cell 1 is charged supreme electricity by MP1
Ordinary mail number 1 is simultaneously supplied to oscillator 2.The voltage difference that phase inverter both ends at different levels receive in oscillator 2 is approximately 0, then oscillator 2
Periodic pulse signal cannot be exported, i.e. oscillator 2 does not work.
When the enable signal is low level signal 0, phase inverter in to-be-measured cell 1 is by after 0 reverse phase of enable signal, MP1
The signal received turns off for 1, MP1；And the signal that the grid of MP0 receives is connected for 0, MP0, since there are threshold value electricity by MP0
Crushing loses, and the output end of to-be-measured cell 1 is discharged to GND+V by MP0TH_p, new ground electricity of the voltage signal as oscillator 2
Position allows oscillator 2 to start oscillation and output pulse signal, the frequency of the pulse signal and the threshold voltage V of MP0TH_pIt is corresponding
's.
Technical solution provided in this embodiment is p-channel field-effect tube for test transistor, will be to be measured using oscillator
The electric signal of transistor output is converted to pulse signal, and the pulse signal frequency by corresponding to output to each test transistor carries out
It detects and compares, you can the case where threshold voltage to obtain each test transistor fluctuates, and then the to-be-measured cell can be obtained
The technological fluctuation situation of array, compared with prior art, technology provided in this embodiment is relatively simple, can realize to semiconductor
Technological fluctuation in crystal section of jurisdiction carries out quickly, easily detect.
In addition, the source electrode of the first field-effect tube T1 in the present embodiment in odd level phase inverter per level-one phase inverter receives height
Level signal, the source electrode of the second field-effect tube T2 and the output end of to-be-measured cell connect, the first test transistor MP0 output signals
GND+VTH_pOscillator 2 is allowed to start oscillation and output pulse signal as the new ground potential of oscillator 2 to oscillator 2.And
When the first test transistor MP0 shutdowns, if the source electrode of each second field-effect tube T2 receives ground potential in oscillator 2,
It can vibrate, the present embodiment detects transistor MP1 in the first test transistor MP0 shutdowns using the first auxiliary, to oscillation
The source electrode of each second field-effect tube T2 provides a high potential in device 2, then inhibits the work of oscillator 2, on the one hand can subtract
Few unnecessary energy consumption.On the other hand, it also avoids when the first test transistor MP0 conductings to its hot side and low potential
The device of side is protected, and the case where avoiding the occurrence of short circuit that the equipment of its hot side and low potential side is direct occurs.
Embodiment three
Fig. 6 is the structural schematic diagram of to-be-measured cell and oscillator that the embodiment of the present invention three provides.As shown in fig. 6, by n ditches
The test transistor 11 that road field-effect tube is constituted is known as the second test transistor MN0.To-be-measured cell 1 is in addition to including the second crystalline substance to be measured
Can also include that the second auxiliary detects transistor MN1, structure is identical as MN0, i.e. MN0 and MN1 are n ditches except body pipe MN0
Road field-effect tube.
The data terminal of MN0 and MN1 is connected, specifically, the source electrode ground connection of MN1, the drain electrode of MN1 are connect with the source electrode of MN0,
The drain electrode of MN0 receives high level signal.Output end of the source electrode of MN0 also as to-be-measured cell 1, connect with oscillator 2.
The grid of MN0 and MN1 receives the enable signal of reverse phase each other, and to realize, when MN0 is connected, MN1 is turned off, and MN1 will not
Influence the output signal of MN0.A phase inverter can be connected in the grid of MN1, the input terminal of the phase inverter and the grid of MN0 connect
Receive same enable signal.
Corresponding with n-channel field-effect tube, oscillator 2 may include being in turn connected into cricoid odd level phase inverter,
Output end of the output end of middle level-one phase inverter as oscillator 2.First connecting pin of phase inverters at different levels is grounded, second connection end
It is connect with the output end of to-be-measured cell 1.
The realization method of a variety of phase inverters that can constitute oscillator 2 exists in the prior art, the present embodiment is directed to list to be measured
Member 1 proposes a kind of realization method, specifically, every level-one phase inverter in odd level phase inverter may include third field-effect tube
T3 and the 4th field-effect tube T4, wherein third field-effect tube T3 can be n-channel field-effect tube, and the 4th field-effect tube T4 can be with
For p-channel field-effect tube.
The source electrode of third field-effect tube T3 is grounded as the first connecting pin, the drain electrode of third field-effect tube T3 and the 4th effect
Should pipe T4 drain electrode connection, the source electrode of the 4th field-effect tube T4 is as second connection end, the also input terminal as oscillator 2, with
The output end of MN1 connects.
The grid connection of the grid and the 4th field-effect tube T4 of third field-effect tube T3, and as the input of this grade of phase inverter
End is connect with the output end of previous stage phase inverter, the output end of third field-effect tube T3 to drain as this grade of phase inverter.
The course of work of above-mentioned to-be-measured cell 1 and oscillator 2 is：An enable signal is provided by external circuit, when this makes
When energy signal is low level signal 0, the signal that the grid of MN0 receives is that 0, MN0 is turned off；Phase inverter in to-be-measured cell 1 will
After 0 reverse phase of enable signal, the signal that MN1 is received is connected for 1, MN1, then the output end of to-be-measured cell 1 is discharged to 0 simultaneously by MN1
It is supplied to oscillator 2.The voltage difference that phase inverter both ends at different levels receive in oscillator 2 is approximately 0, then oscillator 2 cannot export
Periodic pulse signal, i.e.,：Oscillator 2 does not work.
When the enable signal is high level signal 1, phase inverter in to-be-measured cell 1 is by after 1 reverse phase of enable signal, MN1
The signal received turns off for 0, MN1；And the signal that the grid of MN0 receives is connected for 1, MN0, since there are threshold value electricity by MN0
Crushing loses, and the output end of to-be-measured cell 1 charges to VDD-V by MN0TH_n, new power supply electricity of the voltage signal as oscillator 2
Position allows oscillator to start oscillation and output pulse signal, and the frequency of the pulse signal is corresponding with the threshold voltage of MN0.
Technical solution provided in this embodiment is n-channel field-effect tube for test transistor, will be to be measured using oscillator
The electric signal of transistor output is converted to pulse signal, and the pulse signal frequency by corresponding to output to each test transistor carries out
It detects and compares, you can the case where threshold voltage to obtain each test transistor fluctuates, and then the to-be-measured cell can be obtained
The technological fluctuation situation of array, compared with prior art, technology provided in this embodiment is relatively simple, can realize to semiconductor
Technological fluctuation in crystal section of jurisdiction carries out quickly, easily detect.
The technical solution that is there is provided by above-described embodiment two and embodiment three is it is found that phase inverter both ends at different levels in oscillator 2
Voltage and ground between voltage difference it is bigger, field-effect tube conducting speed it is also faster, oscillator 2 export pulse signal frequency
Rate is also higher.Oscillator 2 is combined with to-be-measured cell 1, the threshold voltage of test transistor 11 is bigger, what oscillator 2 exported
The frequency of pulse signal is lower.Therefore, by between the corresponding pulse signal frequency of 11 output signal of multiple test transistors into
Row compares, you can to obtain the fluctuation relationship between 1 threshold voltage of each test transistor, and then knows the work of to-be-measured cell array
Skill fluctuates situation.
In addition, the source electrode ground connection of the third field-effect tube T3 in the present embodiment in odd level phase inverter per level-one phase inverter,
The source electrode of 4th field-effect tube T4 is connect with the output end of to-be-measured cell 1, the second test transistor MN0 output signals VDD-VTH_n
Oscillator is allowed to start oscillation and output pulse signal as the new high potential of oscillator 2 to oscillator 2.And it is to be measured to work as second
When transistor MN0 shutdowns, if the source electrode of each 4th field-effect tube T4 receives ground potential in oscillator 2, can also it vibrate,
The present embodiment detects transistor MN1 in the second test transistor MN0 shutdowns using the second auxiliary, into oscillator 2 each 4th
The source electrode of field-effect tube T4 supplies a low potential, then inhibits the work of oscillator 2, on the one hand can reduce unnecessary energy
Consumption.On the other hand, it also avoids carrying out the device of its hot side and low potential side when the second test transistor MN0 conductings
The case where protecting, avoiding the occurrence of short circuit that the equipment of its hot side and low potential side is direct occurs.
Example IV
It is same for first kind to-be-measured cell and the second class to-be-measured cell on the basis of above-described embodiment two and embodiment three
When there are the case where, the structure of oscillator 2 can there are many realization methods, such as following realization method can be used：
Oscillator 2 includes first kind oscillator and the second class oscillator, and first kind oscillator can refer to embodiment two, and second
Class oscillator can refer to embodiment three.First kind oscillator can be corresponding with first kind to-be-measured cell, wherein phase inverter at different levels
First connecting pin receives high level signal, and second connection end is connect with the output end of first kind to-be-measured cell.Second class vibrates
Device can be corresponding with the second class to-be-measured cell, wherein the first connecting pin ground connection of phase inverter at different levels, second connection end is with second
The output end of class to-be-measured cell connects.
The output end of selected first kind to-be-measured cell can be connected to the input of first kind oscillator by ranks selector 4
End, and the output end of the second class to-be-measured cell is connected to the input terminal of the second class oscillator so that first kind oscillator and
The voltage signal that two class test transistors 11 export is converted to pulse signal by the second class oscillator respectively.
In addition, for above-mentioned first kind to-be-measured cell, line decoder 31 and 32 respective output signal of column decoder can be through
After crossing a NAND gate, the first test transistor MP0 is controlled as enable signal, specifically can refer to Fig. 7, Fig. 7 is the present invention
The structural schematic diagram of first kind to-be-measured cell in the transistor technology surge detection system that example IV provides.
For above-mentioned second class to-be-measured cell, line decoder 31 and 32 respective output signal of column decoder can pass through one
With behind the door, the second test transistor MN0 is controlled as enable signal, specifically can refer to Fig. 8, Fig. 8 is the embodiment of the present invention four
The structural schematic diagram of second class to-be-measured cell in the transistor technology surge detection system of offer.
The course of work of above-mentioned transistor technology surge detection system is：Line decoder 31 and column decoder 32 receive outside
The address date that circuit is sent, identifies row address and column address respectively, chooses corresponding to-be-measured cell.
If the to-be-measured cell chosen is first kind to-be-measured cell, ranks selector 4 exports the to-be-measured cell chosen
Electric signal GND+VTH_pIt is sent to first kind oscillator, the new earth signal as first kind oscillator so that the first kind vibrates
Device starts to shake, and output pulse signal.
If the to-be-measured cell chosen is the second class to-be-measured cell, ranks selector 4 exports the to-be-measured cell chosen
Electric signal VDD-VTH_nIt is sent to the second class oscillator, the new power supply signal as the second class oscillator so that the second class is shaken
It swings device to start to shake, and output pulse signal.
Then the frequency of each pulse signal is detected and is compared, the fluctuation situation of frequency can be obtained, due to pulse
The frequency of signal is with the threshold voltage of corresponding test transistor in correspondence, therefore, according to the feelings of frequency fluctuation
Condition can obtain the case where threshold voltage fluctuation.
Technical solution provided in this embodiment is decoded by the way that at least one to-be-measured cell is formed array structure using ranks
Device selectes to-be-measured cell, and selected to-be-measured cell is accessed oscillator using ranks selector, so that oscillator output pulse letter
Number, the fluctuation situation of the threshold voltage of test transistor in to-be-measured cell can be known by the comparison to pulse signal frequency,
And then know the technological fluctuation situation of test transistor.Detecting system structure provided in this embodiment is relatively simple, can realize
Simply and quickly the technological fluctuation situation of test transistor is detected, particularly with same chip inside different crystal pipe
Between random fluctuation more easily detected.
Based on the above technical solution, frequency divider 5 can also be set in transistor technology surge detection system, even
It is connected on the output end of oscillator 2, can refer to Fig. 1.The pulse signal that frequency divider 5 is used to export oscillator 2 divides, with drop
The frequency of low pulse signal is easy to analyze and compare.
Above-mentioned technical proposal is in an oscillator while including first kind oscillator and the second class oscillator, however for
For those skilled in the art, oscillator 2 can also only include the circuit structure of a set of oscillator, according to the to-be-measured cell chosen
Classification by oscillator phase inverter at different levels first connection termination high level or ground connection, second connection end connect to-be-measured cell.Tool
Body, technical staff can design circuit structure appropriate, when selected to-be-measured cell is first kind to-be-measured cell, will vibrate
Second connection end, is connected to the output end of to-be-measured cell by the first connection termination high level of the phase inverters at different levels in device, and
When selected to-be-measured cell is the second class to-be-measured cell, the first connecting pin of the phase inverters at different levels in oscillator is grounded, it will
Second connection end is connected to the output end of to-be-measured cell.
Embodiment five
Fig. 9 is the flow chart for the transistor technology surge detection method that the embodiment of the present invention five provides.As shown in figure 9, this
The transistor technology surge detection method that embodiment provides, may include the following steps：
Step 101 selectes the to-be-measured cell in the to-be-measured cell array that is made of at least two to-be-measured cells.
The step can be executed by the ranks decoder in transistor technology surge detection system.In to-be-measured cell array
Include at least two to-be-measured cells, each to-be-measured cell forms matrix, and ranks decoder connect with each to-be-measured cell, is used for respectively
Select some to-be-measured cell.
The output signal of test transistor in selected to-be-measured cell is converted to pulse signal, pulse letter by step 102
Number frequency it is corresponding with the threshold voltage of test transistor, with pass through pulse signal frequency fluctuation determine test transistor threshold
The fluctuation of threshold voltage.
Test transistor in to-be-measured cell first can be connected to oscillator by the step by ranks selector, then be led to
Oscillator is crossed to convert the output signal of test transistor.
The specific implementation of above steps can refer to the various embodiments described above, and details are not described herein again.
Technical solution provided in this embodiment passes through to being made of the list to be measured in array structure at least one to-be-measured cell
Member is selected, and the output signal of the test transistor in selected to-be-measured cell is then converted to pulse signal, by right
The comparison of pulse signal frequency can know the fluctuation situation of the threshold voltage of test transistor in to-be-measured cell, and then know and wait for
Survey the technological fluctuation situation of transistor.Detecting system structure provided in this embodiment is relatively simple, can realize simple and quick
Ground is detected the technological fluctuation situation of test transistor, particularly with random between the different crystal pipe of same chip inside
Fluctuation is more easily detected.
In addition, based on the above technical solution, can also be divided to pulse signal, to reduce pulse signal
Frequency determines the frequency fluctuation situation of the pulse signal by the frequency fluctuation to the pulse signal after frequency dividing, in favor of right
The frequency of each pulse signal is compared and analyzes.It can specifically be realized by frequency divider.
Finally it should be noted that：The above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Present invention has been described in detail with reference to the aforementioned embodiments for pipe, it will be understood by those of ordinary skill in the art that：Its according to
So can with technical scheme described in the above embodiments is modified, either to which part or all technical features into
Row equivalent replacement；And these modifications or replacements, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (10)
1. a kind of transistor technology surge detection system, which is characterized in that including to-be-measured cell array, ranks decoder, ranks
Selector and oscillator；
The to-be-measured cell array is the array being made of at least two to-be-measured cells；
The ranks decoder is connect with each to-be-measured cell respectively, for selecting to-be-measured cell；
The ranks selector is connect with the test transistor in the oscillator and each to-be-measured cell respectively, for that will select
Fixed test transistor is connected to the oscillator；The output signal of the test transistor is converted to pulse by the oscillator
Signal, the frequency of the pulse signal is corresponding with the threshold voltage of the test transistor, to pass through the pulse signal frequency
Fluctuation determine the test transistor threshold voltage fluctuation；
The to-be-measured cell further includes auxiliary detection transistor, the structure of auxiliary the detection transistor and the test transistor
It is identical；
The data terminal of the auxiliary detection transistor is connected with the data terminal of the test transistor, and the auxiliary detects transistor
The control terminal of control terminal and the test transistor receive the enable signal of reverse phase each other respectively, in the test transistor
When shutdown, the auxiliary detects transistor turns and inhibits the oscillator operation.
2. transistor technology surge detection system according to claim 1, which is characterized in that the test transistor and auxiliary
It is p-channel field-effect tube to help detection transistor；
The source electrode of the auxiliary detection transistor receives high level signal, and drain electrode is connect with the source electrode of the test transistor, institute
State the grounded drain of test transistor；
Output end of the source electrode of the test transistor also as the test transistor, connect with the oscillator.
3. transistor technology surge detection system according to claim 2, which is characterized in that the oscillator includes successively
Connect into cricoid odd level phase inverter, wherein output end of the output end of level-one phase inverter as the oscillator；
First connecting pin of phase inverters at different levels receives high level signal, and second connection end connects with the output end of the to-be-measured cell
It connects.
4. transistor technology surge detection system according to claim 3, which is characterized in that in the odd level phase inverter
Every level-one phase inverter include the first field-effect tube and the second field-effect tube, first field-effect tube be p-channel field-effect tube,
Second field-effect tube is n-channel field-effect tube；
The source electrode of first field-effect tube receives high level signal, and drain electrode is connect with the drain electrode of second field-effect tube；Institute
Input terminal of the source electrode of the second field-effect tube as the oscillator is stated, is connect with the output end of the auxiliary transistor；
The grid of first field-effect tube is connect with the grid of second field-effect tube, and as the input of the phase inverter
End is connect with the output end of previous stage phase inverter, the output end of first field-effect tube to drain as the phase inverter.
5. transistor technology surge detection system according to claim 1, which is characterized in that the test transistor and auxiliary
It is n-channel field-effect tube to help detection transistor；
The source electrode ground connection of the auxiliary detection transistor, drain electrode are connect with the source electrode of the test transistor, the crystal to be measured
The drain electrode of pipe receives high level signal；
Output end of the source electrode of the test transistor also as the test transistor, connect with the oscillator.
6. transistor technology surge detection system according to claim 5, which is characterized in that the oscillator includes successively
Connect into cricoid odd level phase inverter, wherein output end of the output end of level-one phase inverter as the oscillator；
First connecting pin of phase inverters at different levels is grounded, and second connection end is connect with the output end of the to-be-measured cell.
7. transistor technology surge detection system according to claim 6, which is characterized in that in the odd level phase inverter
Every level-one phase inverter include third field-effect tube and the 4th field-effect tube, the third field-effect tube is n-channel field-effect tube,
4th field-effect tube is p-channel field-effect tube；
The source electrode of the third field-effect tube is grounded, and drain electrode is connect with the drain electrode of the 4th field-effect tube；4th effect
Should pipe input terminal of the source electrode as the oscillator, connect with the output end of the auxiliary transistor；
The grid of the third field-effect tube is connect with the grid of the 4th field-effect tube, and as the input of the phase inverter
End is connect with the output end of previous stage phase inverter, the output end of the third field-effect tube to drain as the phase inverter.
8. according to claim 1-7 any one of them transistor technology surge detection systems, which is characterized in that further include frequency dividing
Device；The frequency divider is connect with the oscillator, and the pulse signal for being exported to the oscillator divides.
9. a kind of detection method using transistor technology surge detection system, which is characterized in that the detecting system includes：It waits for
Survey cell array, ranks decoder, ranks selector and oscillator；The to-be-measured cell array is by least two to-be-measured cells
The array of composition；The ranks decoder is connect with each to-be-measured cell；The ranks selector respectively with the oscillator
It is connected with the test transistor in each to-be-measured cell；The to-be-measured cell further includes auxiliary detection transistor, the auxiliary
It is identical as the structure of the test transistor to detect transistor；The data terminal and the crystal to be measured of the auxiliary detection transistor
The data terminal of pipe is connected, and the control terminal of the control terminal and the test transistor of the auxiliary detection transistor receives each other respectively
The enable signal of reverse phase；
The detection method includes：
The ranks decoder selectes the to-be-measured cell in the to-be-measured cell array that is made of at least two to-be-measured cells；
When test transistor in selected to-be-measured cell is connected, waited in the to-be-measured cell that the oscillator will be selected
The output signal for surveying transistor is converted to pulse signal, the threshold voltage of the frequency of the pulse signal and the test transistor
It is corresponding, the fluctuation of the threshold voltage of the test transistor is determined with the fluctuation by the pulse signal frequency；
When the test transistor turns off, the auxiliary detects transistor turns and inhibits the oscillator by the crystalline substance to be measured
The output signal of body pipe is converted to pulse signal.
10. transistor technology surge detection method according to claim 9, which is characterized in that further include：
The pulse signal is divided, the pulse signal is determined with the frequency fluctuation by the pulse signal after frequency dividing
Frequency fluctuation.
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| CN102655410A (en) * | 2011-03-02 | 2012-09-05 | 复旦大学 | Voltage controlled oscillator, and test system and test method for detecting technological fluctuation |
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