CN117914264A - Crystal oscillator, control method and equipment of crystal oscillator and storage medium - Google Patents

Crystal oscillator, control method and equipment of crystal oscillator and storage medium Download PDF

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Publication number
CN117914264A
CN117914264A CN202211263585.7A CN202211263585A CN117914264A CN 117914264 A CN117914264 A CN 117914264A CN 202211263585 A CN202211263585 A CN 202211263585A CN 117914264 A CN117914264 A CN 117914264A
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China
Prior art keywords
decoding
crystal oscillator
row
oscillation
capacitor
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CN202211263585.7A
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Chinese (zh)
Inventor
程聪
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Sanechips Technology Co Ltd
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Sanechips Technology Co Ltd
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Priority to CN202211263585.7A priority Critical patent/CN117914264A/en
Priority to PCT/CN2023/118229 priority patent/WO2024078230A1/en
Publication of CN117914264A publication Critical patent/CN117914264A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/02—Details
    • H03B5/04—Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/30—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
    • H03B5/32—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation

Abstract

The application discloses a crystal oscillator, a control method, equipment and a storage medium of the crystal oscillator, wherein the crystal oscillator comprises the following components: an external crystal, a capacitance tuning array connected to the external crystal, and an output buffer connected to the external crystal and the capacitance tuning array; the capacitor tuning array is used for generating oscillation on the external crystal, and after receiving the digital frequency control word, carrying out odd-even row decoding according to the digital frequency control word to generate a clock signal, and outputting the clock signal through the output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal. The application realizes that the crystal oscillator can provide high-precision signals.

Description

Crystal oscillator, control method and equipment of crystal oscillator and storage medium
Technical Field
The present application relates to the field of data processing technologies, and in particular, to a crystal oscillator, a method and an apparatus for controlling the crystal oscillator, and a storage medium.
Background
In a wireless terminal, a crystal oscillator is required to provide a precise clock signal for use by modules such as radio frequency and baseband, and the frequency accuracy of a carrier signal transmitted by a mobile phone terminal is required to be 0.1ppm (parts per million) higher than the signal accuracy of a receiving base station, which is far beyond the crystal oscillator without any feedback calibration, so that the crystal oscillator cannot provide a high-accuracy signal.
Disclosure of Invention
The present application is directed to a crystal oscillator, a method and apparatus for controlling a crystal oscillator, and a storage medium for solving the technical problem of how to realize a crystal oscillator capable of providing a high-precision signal
To achieve the above object, the present application provides a crystal oscillator comprising:
An external crystal, a capacitance tuning array connected to the external crystal, and an output buffer connected to the external crystal and the capacitance tuning array;
The capacitor tuning array is used for generating oscillation on the external crystal, and after receiving the digital frequency control word, carrying out odd-even row decoding according to the digital frequency control word to generate a clock signal, and outputting the clock signal through the output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal.
In some embodiments, the capacitance tuning array comprises a capacitance array unit and a decoding unit which are connected with each other, wherein the capacitance array unit is respectively connected with the external crystal and the output buffer;
the decoding unit is arranged for carrying out odd-even row decoding according to the high order and the low order in the received digital frequency control word;
The capacitor array unit is arranged to cooperate with the decoding unit to perform odd-even row and column decoding, and lock the current row and start the column decoding of the next row after all the column decoding of the column where the current row is located is selected.
In some embodiments, the coding unit includes:
The digital row decoding unit is arranged to take high bits according to the received digital frequency control word and perform thermometer decoding;
and the digital column decoding unit is used for decoding the thermometer by taking the low order bits according to the received digital frequency control word.
In some embodiments, a capacitive array cell includes:
the odd-numbered line capacitor array unit is arranged to control the column decoding to be opened one by one from low to high after the column decoding of the current line is selected in the odd-numbered line of the current line, and lock the odd-numbered line to start the column decoding of the next line after all the positive codes of the odd-numbered line are opened;
And the even-numbered row capacitor array unit is arranged to control the column decoding to be opened from high bit to low bit one by one after the column decoding of the current row is selected in the even-numbered row of the current row, and lock the even-numbered row to start the column decoding of the next row after all the negative codes of the even-numbered row are opened.
In some embodiments, the external crystal comprises a plurality of components connected in sequence to form a series circuit, the components comprising a resistor, a first capacitor, an inductor, and a second capacitor, the capacitance tuning array being connected to both sides of the second capacitor, respectively.
In some embodiments, the capacitive tuning array further comprises:
the coarse tuning capacitor tuning array is arranged on the external crystal to generate oscillation, and after receiving a digital frequency control word, the coarse tuning capacitor tuning array performs odd-even row and column decoding according to the digital frequency control word to generate a clock signal, and outputs the clock signal through the output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal;
And the fine-tuning capacitor tuning array is arranged on the external crystal to generate oscillation, and after receiving the digital frequency control word, carries out odd-even row and column decoding according to the digital frequency control word to generate a clock signal, and outputs the clock signal through the output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal.
In some embodiments, the crystal oscillator further comprises:
The system comprises a core oscillating circuit and a peak detection circuit which are connected with the capacitance tuning array, an amplitude comparison circuit which is connected with the peak detection circuit, and an amplitude control state machine which is respectively connected with the core oscillating circuit and the amplitude comparison circuit;
the peak detection circuit is configured to detect an oscillation peak value corresponding to the oscillation and send the oscillation peak value to the amplitude comparison circuit;
The amplitude comparison circuit is used for comparing the oscillation peak value with a preset peak value interval to obtain a state result, and sending the state result to the amplitude control state machine;
the amplitude control state machine is used for carrying out state decoding on the state result, adjusting the core oscillating circuit according to the state decoding result and carrying out oscillation amplitude adjustment according to the adjusted core oscillating circuit.
In addition, to achieve the above object, the present application further provides a method for controlling a crystal oscillator, which is applied to the crystal oscillator, including:
after oscillation is generated by an external crystal and a digital frequency control word is received, carrying out odd-even row decoding according to the digital frequency control word to generate a clock signal;
And outputting the clock signal through an output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal.
In addition, in order to achieve the above object, the present application also provides a control device for a crystal oscillator, the control device for a crystal oscillator including a memory, a processor, and a control program for a crystal oscillator stored in the memory and operable on the processor, the control program for a crystal oscillator implementing the steps of the control method for a crystal oscillator as described above when executed by the processor.
In addition, in order to achieve the above object, the present application also provides a computer-readable storage medium, on which a control program of a crystal oscillator is stored, which when executed by a processor, implements the steps of the control method of a crystal oscillator as described above.
According to the application, the oscillation is generated on the external crystal, after the digital frequency control word is received, the odd-even row decoding is carried out according to the digital frequency control word, the clock signal is generated for output, so that the frequency corresponding to the oscillation is adjusted according to the output clock signal, higher linearity and monotonicity can be realized by adopting the odd-even row decoding for the capacitor tuning array, and the frequency is calibrated according to the output clock signal, so that the crystal oscillator can provide higher signal precision.
Drawings
FIG. 1 is a schematic diagram of a terminal/device structure of a hardware operating environment according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a crystal oscillator according to a first embodiment of the present application;
FIG. 3 is a schematic diagram showing the structural connection of a crystal oscillator according to the present application;
FIG. 4 is a schematic diagram of a crystal oscillator capacitor tuning array according to the present application;
FIG. 5 is a schematic diagram of a crystal oscillator capacitor array unit according to the present application;
FIG. 6 is a schematic circuit diagram of an external crystal in a crystal oscillator according to the present application;
FIG. 7 is a flow chart of a control method of the crystal oscillator of the present application;
Fig. 8 is a schematic diagram of a decoding process of an external crystal in the crystal oscillator according to the present application.
Reference numerals illustrate:
The achievement of the objects, functional features and advantages of the present application will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not to be construed as limiting the application.
As shown in fig. 1, fig. 1 is a schematic diagram of a terminal structure of a hardware running environment according to an embodiment of the present application.
The terminal of the embodiment of the application is control equipment of the crystal oscillator.
As shown in fig. 1, the terminal may include: a processor 1001, such as a CPU, a network interface 1004, a user interface 1003, a memory 1005, a communication bus 1002. Wherein the communication bus 1002 is configured to enable connected communication between the components. The user interface 1003 may include a Display, an input unit such as a Keyboard (Keyboard), and the optional user interface 1003 may further include a standard wired interface, a wireless interface. The network interface 1004 may optionally include a standard wired interface, a wireless interface (e.g., WI-FI interface). The memory 1005 may be a high-speed RAM memory or a stable memory (non-volatile memory), such as a disk memory. The memory 1005 may also optionally be a storage device separate from the processor 1001 described above.
Optionally, the terminal may also include a camera, an RF (Radio Frequency) circuit, a sensor, an audio circuit, a WiFi module, and so on. Among other sensors, such as light sensors, motion sensors, and other sensors. In particular, the light sensor may comprise an ambient light sensor, which may adjust the brightness of the display screen according to the brightness of ambient light, and a proximity sensor, which may turn off the display screen and/or the backlight when the terminal device is moved to the ear. Of course, the terminal device may also be configured with other sensors such as a gyroscope, a barometer, a hygrometer, a thermometer, an infrared sensor, and the like, which are not described herein.
It will be appreciated by those skilled in the art that the terminal structure shown in fig. 1 is not limiting of the terminal and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components.
As shown in fig. 1, an operating system, a network communication module, a user interface module, and a control program of a crystal oscillator may be included in a memory 1005 as one type of computer storage medium.
In the terminal shown in fig. 1, the network interface 1004 is mainly configured to connect to a background server, and perform data communication with the background server; the user interface 1003 is mainly configured to connect to a client (user side) and perform data communication with the client; and the processor 1001 may be configured to call a control program of the crystal oscillator stored in the memory 1005 and perform the following operations:
after oscillation is generated by an external crystal and a digital frequency control word is received, carrying out odd-even row decoding according to the digital frequency control word to generate a clock signal;
And outputting the clock signal through an output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal.
Further, referring to fig. 2, the present application provides a crystal oscillator, in a first embodiment of the crystal oscillator, the crystal oscillator includes:
An external crystal 300, a capacitance tuning array 100 connected to the external crystal 300, and an output buffer 700 connected to the external crystal 300 and the capacitance tuning array 100;
The capacitor tuning array 100 is configured to generate oscillation at an external crystal, and after receiving a digital frequency control word, perform odd-even column decoding according to the digital frequency control word, generate a clock signal, and output the clock signal through an output buffer, so as to adjust a frequency corresponding to the oscillation according to the output clock signal.
The voltage control and the constant temperature tank device are adopted at present to ensure high-precision compensation, so that the volume is large, the cost is high, the integration level is low, for example, the precision of analog temperature compensation can only reach 0.5-1 ppm, the digital temperature compensation can reach 0.01ppm only by 15bit of adc or dac precision, or an additional auxiliary circuit is added to reduce the bit width of the adc and the dac, the IC design area is large, the structure is complex, and the cost is high. In the embodiment, the digital frequency control word is directly utilized for decoding adjustment, and the digital odd-numbered and even-numbered row-column decoding capacitor array is matched for improving the frequency adjustment precision, so that the precision below 0.01ppm can be easily achieved, and the digital frequency adjustment circuit has the advantages of small volume and high integration level.
In this embodiment, the capacitor tuning array 100 may be subjected to row-column decoding, such as row-column decoding in odd-numbered rows and even-numbered rows (i.e., odd-numbered even-numbered row decoding), and may be subjected to thermometer codes and S-shaped wirings during odd-numbered even-numbered row decoding, so as to improve linearity, and under high linearity, the adjustment accuracy may be improved. The method can divide the coarse-adjustment array capacitor and the fine-adjustment array capacitor, so that the frequency coverage range is improved under high precision and high linearity, meanwhile, the error of a capacitor unit is reduced by half by utilizing the series connection of the capacitor arrays, and the precision is further improved. In addition, the crystal oscillator in the embodiment can be set in products such as wireless terminals (such as mobile phones) to provide tunable clock signals with higher precision, and can solve the problem of on-chip integration of the crystal oscillator, reduce the cost of off-chip devices, and realize clock signals with high precision under the requirements of higher performance and smaller area.
Further, referring to fig. 3, the crystal oscillator further includes:
a core oscillation circuit 200 and a peak detection circuit 400 connected to the capacitance tuning array 100, an amplitude comparison circuit 500 connected to the peak detection circuit 400, and an amplitude control state machine 600 connected to the core oscillation circuit 200 and the amplitude comparison circuit 500, respectively;
a peak detection circuit 400 configured to detect an oscillation peak corresponding to the oscillation and send the oscillation peak to the amplitude comparison circuit 500;
The amplitude comparison circuit 500 is configured to detect an oscillation peak corresponding to the oscillation, compare the oscillation peak with a preset peak interval, obtain a state result, and send the state result to the amplitude control state machine 600;
The amplitude control state machine 600 is configured to perform state decoding on the state result, adjust the core oscillating circuit according to the state decoding result, and perform oscillation amplitude adjustment according to the adjusted core oscillating circuit.
In the crystal oscillator of the present embodiment, a capacitance tuning array 100, a core oscillation circuit 200, an external crystal 300, a peak detection circuit 400, an amplitude comparison circuit 500, an amplitude control state machine 600, and an output buffer 700 are provided. The core oscillating circuit 200 can adjust the oscillation current and the oscillation amplitude corresponding to the capacitor tuning array 100, and can perform gain amplification or provide negative resistance. The capacitor tuning array 100 may perform frequency correction for both the coarse and fine capacitor arrays and both perform row and column decoding. The peak detection circuit 400 may check the peak value of the oscillation waveform generated by the capacitor tuning array 100 to obtain an oscillation peak value, and then compare the oscillation peak value with a preset peak value interval through the amplitude comparison circuit 500 to obtain a state result. The state result comprises two situations that the oscillation peak value is in a preset peak value interval and the oscillation peak value is not in the preset peak value interval. And then the state result is sent to the amplitude control state machine 600 as an electric signal, so that the amplitude control state machine 600 performs state decoding on the state result, adjusts the current in the core oscillating circuit 200 according to the decoding result of the state decoding, reduces the starting current and reduces the power consumption to adjust the oscillation amplitude. In one embodiment, when the state result is that the oscillation peak value is not within the preset peak value interval, the step of adjusting the current level in the core oscillation circuit 200 according to the decoding result of the state decoding may be performed.
In one scenario of the present embodiment, the peak detection circuit 400 and the amplitude comparison circuit 500 are connected in series, and the input side of the peak detection circuit 400 is connected to the capacitance tuning array 100, and the input side of the output buffer 700 is also connected to the input side of the peak detection circuit 400, and the output side of the peak detection circuit 400 is connected to the input side of the amplitude comparison circuit 500, and the output side of the amplitude comparison circuit 500 is connected to the amplitude control state machine 600.
In addition, in a scenario in the present embodiment, a plurality of capacitor units arranged in an array form are disposed in the capacitor tuning array 100. The core oscillation circuit 200 is provided with a ammeter and an inverting amplifier connected to each other, the magnitude of the oscillation current is adjusted by adjusting the ammeter, and gain amplification such as amplification of the oscillation waveform is performed by adjusting the inverting amplifier. An amplitude comparator is provided in the amplitude comparison circuit 500 to perform comparison according to the amplitude comparator. The peak detection circuit 400 may be a circuit device that detects a peak of a sinusoidal waveform generated by vibration of the external crystal 300 in a conventional crystal oscillator. In addition, in a scenario of the present embodiment, an oscillation tube may be further provided, the oscillation tube is started to vibrate by the core oscillation circuit 200, the frequency of the vibration generated by the oscillation tube is adjusted by the capacitance tuning array 100, and the amplitude of the vibration generated by the oscillation tube is adjusted by the peak detection circuit 400 and the amplitude comparison circuit 500.
For example, assume a frequency of 26MHz.8bit coarse tuning capacitor array decoding, 8 rows (23) 32 columns (25), minimum tuning accuracy of 0.3ppm (part per million, parts per million); the 12bit fine tuning capacitor array decodes, 32 rows (25) 128 columns (27), and the minimum tunable accuracy is below 0.01 ppm. The mom type capacitor with the size of 50fF is used for coarse adjustment of the capacitance array unit, and the mom type capacitor with the size of 1.5fF is used for fine adjustment of the capacitance array unit. The current precision is achieved under the condition that the requirements are met, and in order to further improve the precision, the capacitance values of the odd-numbered and even-numbered line capacitance units can be further reduced by utilizing the parallel connection of mom capacitors or the replacement of capacitor types. The current odd-even column decoding and layout mode greatly ensures monotonous and linear, allows lower capacity value, and can carry out higher-precision design adjustment on the premise of balancing frequency coverage range, area and performance.
In addition, the capacitor tuning array 100 in the high-precision core oscillator in the embodiment can output a sine waveform, can quickly start oscillation with the maximum current, is connected to the peak detection circuit 400 to perform real-time peak detection output, sets a peak threshold value by using the amplitude comparator in the amplitude comparison circuit 500, outputs a comparison state signal, adjusts the current of the current bias circuit in the core oscillation circuit 200 after passing through the amplitude control state machine 600, reduces the oscillation starting current and reduces the power consumption, and simultaneously adjusts the oscillation amplitude.
In addition, the logic implementation in the capacitive tuning array 100 may be implemented using negative logic, and the capacitance may be selectively switched on or off, both of which may be adjusted. The switch is implemented by a field effect transistor, or by a bipolar transistor. When the bipolar transistor is used, the NMOS transistor is replaced by an NPN triode, and the PMOS transistor is replaced by a PNP triode. The capacitors can be implemented in various types and connections, such as mom, pmos, nmos, and hybrid implementations. Multiple capacitors may be implemented in series and parallel.
In this embodiment, after the external crystal generates oscillation and receives the digital frequency control word, odd-numbered and even-numbered row and column decoding is performed according to the digital frequency control word, and a clock signal is generated and output, so that the frequency corresponding to the oscillation is adjusted according to the output clock signal, and therefore higher linearity and monotonicity can be achieved by adopting the odd-numbered and even-numbered row and column decoding for the capacitor tuning array, and the frequency is calibrated according to the output clock signal, so that the crystal oscillator can provide higher precision of signals.
Further, referring to fig. 3, a second embodiment of the crystal oscillator of the present application is proposed based on the above-described first embodiment, in which the capacitance tuning array 100 includes a capacitance array unit 120 and a decoding unit 110 connected to each other; the capacitor array unit 120 is connected to the external crystal 300, the core oscillation circuit 200, the output buffer 700, and the peak detection circuit 400, respectively;
A decoding unit 110 configured to perform row-column decoding according to the high bits and the low bits in the received digital frequency control word;
the capacitor array unit 120 is configured to perform row-column decoding in cooperation with the decoding unit, and lock the current row after all the column decoding of the column where the current row is located is selected, and start the column decoding of the next row.
In the present embodiment, the output end of the core oscillating circuit 200 is connected to one side of the capacitor array unit 120, and the other side of the capacitor array unit 120 is connected to the decoding unit 110, the external crystal 300, the output buffer 700, and the peak detection circuit 400, respectively, and the decoding unit 110 is connected to the external crystal 300, the output buffer 700, and the peak detection circuit 400 through the capacitor array unit 120, but not directly connected. Alternatively, the decoding unit 110 may be a decoder.
In this embodiment, the decoding unit 110 receives a digital frequency control word, such as an AFC frequency adjustment control word, sent by a user or other terminals, and then performs row-column decoding, such as performing thermometer-code row decoding on the high order and performing thermometer-column decoding on the low order.
The capacitor array unit 120 can perform decoding operation in cooperation with the decoding unit 110, and can perform row-column array arrangement on each capacitor unit to coordinate with frequency tuning of the oscillator. And only one capacitive element is switched on or off S-shaped each time the codeword is incrementally changed.
For example, as shown in fig. 8, after starting to control the crystal oscillator to oscillate to generate a clock signal, the input AFC frequency adjustment is acquired first, and then the AFC is subjected to column-row decoding, including row decoding and column decoding. And when the column decoding is carried out, the method is divided into odd-numbered line decoding and even-numbered line decoding, after the odd-numbered line decoding is finished, the current line is locked, the next line is started to enter the even-numbered line decoding, after the even-numbered line decoding is finished, the current line is locked, the next line is started, the odd-numbered line decoding is entered until the maximum line is reached, and then the decoding is ended. And the crystal oscillator generates a clock signal according to the decoding result of the overall decoding. When the AFC is decoded in the row and column, for example, the upper bits of the AFC may be decoded in the row and column, and the lower bits of the AFC may be decoded in the thermometer code row.
In this embodiment, the capacitor array unit and the decoding unit are connected to each other in the capacitor tuning array, so that the decoding unit decodes the capacitor array unit in odd-numbered and even-numbered rows and columns according to the high-order and low-order of the received digital frequency control word, thereby ensuring effective decoding.
Further, referring to fig. 4, the decoding unit 110 includes:
a digital row decoding unit 111 configured to take the upper bits according to the received digital frequency control word and perform thermometer decoding;
the digital column decoding unit 112 is configured to take the lower bits for thermometer decoding based on the received digital frequency control word.
In this embodiment, the digital row decoding unit 111 may perform thermometer decoding on the upper bits of the automatic frequency calibration control word afc_cw after receiving the digital frequency control word (such as afc_cw), and turn on the odd and even rows in the capacitor array unit 120 one by one.
The digital column decoder 112 may thermometer decode the lower bits of the auto-frequency calibration control word afc_cw, opening the columns in the capacitor array unit 120 one by one. And thermometer coding is performed using female codes (0 or 1) and Yang Ma (1 or 0) in odd and even rows in order to reduce capacitance noise caused by midamble noise. Corresponding to the odd-numbered row and column decoding, the positive codes are turned on (or turned off) one by one from the low order to the high order, and for the even-numbered row and column decoding, the negative codes are turned on (or turned off) one by one from the high order to the low order. Wherein the thermometer decoding may be decoding using a thermometer decoder. Wherein, the high order may be a high order byte and the low order may be a low order byte.
For example, as shown in fig. 4, a digital row decoding unit 111, a digital column decoding unit 112, and a capacitor array unit 120 are provided in the capacitor tuning array 100. And row and column decoding is performed on the capacitor array unit 120 by the digital row decoding unit 111 and the digital column decoding unit 112.
In this embodiment, the decoding unit is divided into the digital row decoding unit and the digital column decoding unit, so that higher accuracy of the clock signal obtained by decoding can be realized.
Further, referring to fig. 5, the capacitor array unit 120 includes:
The odd-numbered line capacitor array unit 121 is configured to control the column decoding to be opened one by one from a lower position to a higher position after the column decoding of the current line is selected in the odd-numbered line of the current line, and lock the odd-numbered line to open the column decoding of the next line after all the positive codes of the odd-numbered line are opened;
the even-numbered row capacitor array unit 122 is configured to control the column decoding to be turned on from the high bit to the low bit one by one after the even-numbered row of the current row is selected and the column decoding of the current row is selected, and lock the even-numbered row to turn on the column decoding of the next row after all the negative codes of the even-numbered row are turned on.
In this embodiment, the capacitor array unit 120 may further include an odd-even line capacitor unit, where the odd-even line capacitor unit includes an odd-line capacitor array unit 121 and an even-line capacitor array unit 122.
And the odd-even line capacitance units can be matched with the odd-even line row and column decoding, the column codes only control the current line capacitance, and after the current line is all selected, the column decoding of the next line is started through row [ n+1] locking.
And one complete capacitor array unit 120 may include a plurality of odd-numbered row capacitor array units 121 and a plurality of even-numbered row capacitor array units 122. Therefore, in this embodiment, the column decoding of the odd-numbered row capacitor array units 121 may be performed first, then the column decoding of the even-numbered row capacitor array units 122 may be performed, and then the odd-numbered row capacitor array units 121 may be performed until all the column decoding of the capacitor array units 120 is completed, i.e. the maximum row is reached. The odd-numbered row capacitor array unit 121 is used for opening the row codes one by one from the low level to the high level after the current row code is selected, and locking the current row by the next row code and opening the next row after all the row codes are opened. The even-numbered row capacitor array unit 122 is used for opening the row codes one by one from the high level to the low level after the current row code is selected, and locking the current row by the next row code and opening the next row after all the row codes are opened. For example, as shown in fig. 5, in the capacitor array unit 120, the odd-numbered row capacitor array unit 121 and the even-numbered row capacitor array unit 122 may be provided with the same structural features. The input parts are col_m, row_n, row_n+1, where col is the column number and row is the row number.
In this embodiment, the capacitor array unit is divided into the odd-numbered row capacitor array unit and the even-numbered row capacitor array unit, and the decoding unit is matched to decode the capacitor array unit, so that higher accuracy of the clock signal obtained by decoding can be realized.
Further, the core oscillation circuit 200 includes:
The bias current circuit is arranged for adjusting the starting current according to the state decoding result after the state result is that the oscillation peak value is not matched with the preset peak value interval;
And the inverting amplifying circuit is connected with the bias current circuit and is used for amplifying the regulated oscillation current and regulating the oscillation amplitude corresponding to the crystal oscillator according to the amplified oscillation current.
In the present embodiment, a bias current circuit and an inverting amplifier circuit connected to each other may be provided in the core oscillation circuit 200, and in the present embodiment, the bias current circuit and the amplitude control state machine 600 may be connected, and the inverting amplifier circuit and the capacitance tuning array 100 may be connected. The bias current circuit may include a ammeter, and the inverting amplifier circuit may include an inverting amplifier.
And after the amplitude control state machine 600 decodes the state result into an electrical signal and sends the electrical signal to the bias current circuit, if the state result is that the oscillation peak value is not matched with the preset peak value interval (the peak value interval range set in advance by the user) (if the oscillation peak value is not within the preset peak value interval range), the oscillation current is determined to need to be adjusted, at this time, the oscillation current can be adjusted according to the state decoding result, the adjusted oscillation current is amplified by the inverting amplifying circuit, and then the oscillation amplitude corresponding to the sine waveform released by the oscillator is adjusted according to the amplified oscillation current until the subsequently detected state result is that the oscillation peak value is matched with the preset peak value interval.
Further, the external crystal 300 includes a plurality of components including a resistor 310, a first capacitor 320, an inductor 330, and a second capacitor 340, which are sequentially connected to form a series circuit, and the capacitance tuning array 100 is connected to both sides of the second capacitor 340, respectively.
In this embodiment, as shown in fig. 6, the external crystal 300 has at least a series circuit formed by sequentially connecting a resistor 310, a first capacitor 320, an inductor 330, and a second capacitor 340. And the resistor 310, the first capacitor 320 and the inductor 330 may be equivalent dynamic inductances, capacitances and resistances of external crystals, and the second capacitor 340 is a static capacitance. The capacitive tuning array 100 can therefore be connected in parallel to the static capacitance of the external crystal to achieve frequency adjustment, determining the range of frequency adjustment and the accuracy of the adjustment. And the external crystal 300 in this embodiment can be used as a feedback network of the core oscillating circuit 200 to provide a frequency selecting function.
In this embodiment, one side of the capacitive tuning array 100 may be connected at the junction of the resistor 310 and the second capacitor 340, and the other side of the capacitive tuning array 100 may be connected at the junction of the inductor 330 and the second capacitor 340, thereby implementing that the capacitive tuning array 100 is connected in parallel to the static capacitance of the external crystal.
Also in the present embodiment, if the resistor 310 is Rs, the first capacitor 320 is Cs, the inductor 330 is Ls, and the second capacitor is C0, and the frequency is fp, the parallel tuning frequency can be determined to be
And when the capacitive tuning array is incorporated into the external crystal 300, its frequency becomes:
The frequency tuning can then be performed by adjusting the load capacitance CL outside the external crystal, which may be a capacitive element in a capacitive tuning array.
In this embodiment, by providing a resistor, a first capacitor, an inductor, and a second capacitor in series in order in an external crystal, and connecting the capacitance tuning arrays to both sides of the second capacitor, respectively, it is possible to realize subsequent frequency calibration by adjusting the load capacitance of the capacitance tuning arrays.
Further, the capacitive tuning array 100 further includes:
the coarse tuning capacitor tuning array is arranged on an external crystal to generate oscillation, and after receiving the digital frequency control word, the array performs odd-even row and column decoding according to the digital frequency control word to generate a clock signal, and outputs the clock signal through the output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal;
the fine-tuning capacitor tuning array is arranged on an external crystal to generate oscillation, and after receiving the digital frequency control word, the fine-tuning capacitor tuning array performs odd-even row and column decoding according to the digital frequency control word to generate a clock signal, and outputs the clock signal through the output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal.
In this embodiment, the crystal oscillator may comprise an all-digital controlled crystal oscillator (DCXO, digital controlled crystal oscillator) transceiver, and the DCXO integrates the baseband, transceiver, and coarse and fine capacitor arrays for digital control as required by the system. In order to respond quickly to temperature changes and crystal aging shifts, a fine tuning capacitor array is continuously changed according to an internal signal source and an Automatic Frequency Calibration (AFC) control word, retaining software incorporated by the end manufacturer. DCXOs typically also have a large, tightly controlled capacitance tuning range to ensure compatibility with multiple vendor crystals, while also addressing the effects of parasitic parameters in the manufacturing process.
Thus, in this embodiment, the capacitive tuning array 100 may be divided into a coarse capacitive tuning array and a fine capacitive tuning array. For example, an 8bit coarse tuning capacitor tuning array decodes, 8 rows (23) x 32 columns (25), and a minimum tunable accuracy of 0.3ppm; the 12bit fine tuning capacitor tuning array decodes, 32 rows (25) by 128 columns (27), and the minimum adjustable precision is below 0.01 ppm. The coarse tuning capacitor tuning array unit is a mom type capacitor with the size of 50fF, and the fine tuning capacitor tuning array unit is a mom type capacitor with the size of 1.5 fF.
And, both the coarse tuning capacitor tuning array and the fine tuning capacitor tuning array can perform the same decoding operation, such as performing row-column decoding of odd rows and even rows, and performing frequency calibration on the capacitor tuning array, such as performing frequency tuning on the load capacitor, according to the received digital frequency control word.
In the present embodiment, the effectiveness of frequency calibration can be achieved by dividing the capacitance tuning array into a coarse capacitance tuning array and a fine capacitance tuning array.
Further, referring to fig. 7, the present application provides a control method of a crystal oscillator, in a third embodiment of the control method of a crystal oscillator, the control method of a crystal oscillator should be set to the first or second embodiment described above, comprising the steps of:
Step S100, after oscillation is generated by an external crystal and a digital frequency control word is received, odd-even row decoding is carried out according to the digital frequency control word, and a clock signal is generated;
Step S200, outputting the clock signal through an output buffer, so as to adjust the frequency corresponding to the oscillation according to the output clock signal.
The implementation manner of each step of the control method of the crystal oscillator may refer to each embodiment of the crystal oscillator of the present application, which is not described herein.
In addition, the application also provides a control device of the crystal oscillator, which comprises: a memory, a processor, and a control program of a crystal oscillator stored on the memory; the processor is configured to execute a control program of the crystal oscillator to implement the steps of the embodiments of the control method of the crystal oscillator described above.
The present application also provides a computer-readable storage medium storing one or more programs executable by one or more processors to implement the steps of the above-described embodiments of a method of controlling a crystal oscillator.
The specific implementation manner of the computer readable storage medium of the present application is basically the same as the above embodiments of the control method of the crystal oscillator, and will not be repeated here.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The foregoing embodiment numbers of the present application are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) as described above, comprising instructions for causing a terminal device (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to perform the method according to the embodiments of the present application.
The foregoing description is only of the preferred embodiments of the present application, and is not intended to limit the scope of the application, but rather is intended to cover any equivalents of the structures or equivalent processes disclosed herein or in the alternative, which may be employed directly or indirectly in other related arts.

Claims (10)

1. A crystal oscillator, comprising:
An external crystal, a capacitance tuning array connected to the external crystal, and an output buffer connected to the external crystal and the capacitance tuning array;
The capacitor tuning array is used for generating oscillation on the external crystal, and after receiving the digital frequency control word, carrying out odd-even row decoding according to the digital frequency control word to generate a clock signal, and outputting the clock signal through the output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal.
2. The crystal oscillator of claim 1, wherein the capacitive tuning array comprises the capacitive array cells connected to each other with the external crystal and the output buffer, respectively;
the decoding unit is arranged for carrying out odd-even row decoding according to the high order and the low order in the received digital frequency control word;
The capacitor array unit is arranged to cooperate with the decoding unit to perform odd-even row and column decoding, and lock the current row and start the column decoding of the next row after all the column decoding of the column where the current row is located is selected.
3. The crystal oscillator of claim 2, wherein the decoding unit comprises:
The digital row decoding unit is arranged to take high bits according to the received digital frequency control word and perform thermometer decoding;
and the digital column decoding unit is used for decoding the thermometer by taking the low order bits according to the received digital frequency control word.
4. The crystal oscillator of claim 2, wherein the capacitor array unit comprises:
the odd-numbered line capacitor array unit is arranged to control the column decoding to be opened one by one from low to high after the column decoding of the current line is selected in the odd-numbered line of the current line, and lock the odd-numbered line to start the column decoding of the next line after all the positive codes of the odd-numbered line are opened;
And the even-numbered row capacitor array unit is arranged to control the column decoding to be opened from high bit to low bit one by one after the column decoding of the current row is selected in the even-numbered row of the current row, and lock the even-numbered row to start the column decoding of the next row after all the negative codes of the even-numbered row are opened.
5. The crystal oscillator of claim 1, wherein the external crystal comprises a plurality of components connected in sequence to form a series circuit, the components comprising a resistor, a first capacitor, an inductor, and a second capacitor, the capacitance tuning array being connected to both sides of the second capacitor, respectively.
6. The crystal oscillator of any of claims 1-5, wherein the capacitive tuning array further comprises:
the coarse tuning capacitor tuning array is arranged on the external crystal to generate oscillation, and after receiving a digital frequency control word, the coarse tuning capacitor tuning array performs odd-even row and column decoding according to the digital frequency control word to generate a clock signal, and outputs the clock signal through the output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal;
And the fine-tuning capacitor tuning array is arranged on the external crystal to generate oscillation, and after receiving the digital frequency control word, carries out odd-even row and column decoding according to the digital frequency control word to generate a clock signal, and outputs the clock signal through the output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal.
7. The crystal oscillator of claim 1, comprising:
The system comprises a core oscillating circuit and a peak detection circuit which are connected with the capacitance tuning array, an amplitude comparison circuit which is connected with the peak detection circuit, and an amplitude control state machine which is respectively connected with the core oscillating circuit and the amplitude comparison circuit;
the peak detection circuit is configured to detect an oscillation peak value corresponding to the oscillation and send the oscillation peak value to the amplitude comparison circuit;
The amplitude comparison circuit is used for comparing the oscillation peak value with a preset peak value interval to obtain a state result, and sending the state result to the amplitude control state machine;
the amplitude control state machine is used for carrying out state decoding on the state result, adjusting the core oscillating circuit according to the state decoding result and carrying out oscillation amplitude adjustment according to the adjusted core oscillating circuit.
8. A control method of a crystal oscillator, characterized by being applied to the crystal oscillator according to any one of claims 1 to 7, comprising:
after oscillation is generated by an external crystal and a digital frequency control word is received, carrying out odd-even row decoding according to the digital frequency control word to generate a clock signal;
And outputting the clock signal through an output buffer so as to adjust the frequency corresponding to the oscillation according to the output clock signal.
9. A control apparatus of a crystal oscillator, characterized in that the control apparatus of a crystal oscillator comprises: a memory, a processor, and a control program for a crystal oscillator stored in the memory and executable on the processor, which when executed by the processor, implements the steps of the control method for a crystal oscillator as claimed in claim 8.
10. A storage medium having stored thereon a control program for a crystal oscillator, which when executed by a processor, implements the steps of the control method for a crystal oscillator of claim 8.
CN202211263585.7A 2022-10-11 2022-10-11 Crystal oscillator, control method and equipment of crystal oscillator and storage medium Pending CN117914264A (en)

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PCT/CN2023/118229 WO2024078230A1 (en) 2022-10-11 2023-09-12 Crystal oscillator, control method for crystal oscillator, device, and storage medium

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US6747522B2 (en) * 2002-05-03 2004-06-08 Silicon Laboratories, Inc. Digitally controlled crystal oscillator with integrated coarse and fine control
CN101924534B (en) * 2010-03-10 2012-07-11 广州市广晟微电子有限公司 Monotonous debugging method of digital control capacitance switch array of crystal oscillator
CN105353288B (en) * 2014-08-19 2018-07-27 龙芯中科技术有限公司 Transistor technology surge detection system and detection method
CN109450378A (en) * 2018-11-01 2019-03-08 郑州云海信息技术有限公司 A kind of crystal oscillating circuit and clock signal generation method
CN114826283A (en) * 2021-01-27 2022-07-29 华为技术有限公司 Decoding method, device, equipment and computer readable storage medium
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