CN105340372A - 电子模块 - Google Patents
电子模块 Download PDFInfo
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- CN105340372A CN105340372A CN201480035622.6A CN201480035622A CN105340372A CN 105340372 A CN105340372 A CN 105340372A CN 201480035622 A CN201480035622 A CN 201480035622A CN 105340372 A CN105340372 A CN 105340372A
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Abstract
本发明提供了一种电子模块(40),其包括多层电路板(41)、电子部件(62)和珀耳帖热泵(60)。所述电子部件安装在所述多层电路板的主表面上并电耦接到至少一个存储器管芯(48)。所述至少一个存储器管芯被至少部分地嵌入在所述多层电路板内。所述珀耳帖热泵装置具有至少一对热并联和电串联布置的热电半导体构件(68、69),并且所述至少一对半导体构件被至少部分地嵌入在所述电路板中。
Description
技术领域
本发明涉及一种用于汽车应用的电子模块。
背景技术
电子模块可包括被布置以提供所需电路或功能的两个或更多个电子部件以及电连接。例如,电子模块可包括被安装在共用电路板上的处理器芯片和存储器芯片。所述电路板包括导电迹线,其可提供处理器芯片和存储器芯片之间的至少一部分所述电连接和从模块的外触点到芯片的导电再分配结构。所述芯片可作为单独的封装或由封装的外触点安装在电路板上的部件被提供,例如焊球、焊盘或引脚。在一些申请案中,空腔设置在印刷电路板的表面上,并且部件被安装在所述空腔中。然而,适用于电子模块的安装结构是理想的。
发明内容
本发明提供一种电子模块,其包括多层电路板、电子部件和珀耳帖热泵。电子部件安装在多层电路板的主表面上并电耦接到至少一个存储器管芯。所述至少一个存储器管芯被至少部分地嵌入在多层电路板内。珀耳帖热泵装置具有至少一对热并联和电串联布置的热电半导体构件,并且所述至少一对半导体构件被至少部分地嵌入在电路板中。
其他系统、方法、特征和优点对于本领域技术人员在研究了以下附图和具体实施方式后将会或者将变得明显。它旨在将所有这些附加的系统、方法、特征和优点包括在本说明书中、在本发明的范围内,并且由下列权利要求所保护。
附图说明
所述系统参照下列描述并结合附图可被更好地理解。图中的部件不一定是按比例的,而是将重点放在说明本发明的原理。此外,在图中,相似的标号在不同的视图中始终表示相应部分。
图1是示出第一示例性电子模块的顶视图的示意图。
图2是示出图1中的电子模块沿着线A-A的横截面图的示意图。
图3是示出第二示例性电子模块的横截面图的示意图。
图4是示出图3的电子模块的顶视图的示意图。
具体实施方式
图1示出示例性电子模块10的顶视图;图2示出电子模块10沿着线A-A的横截面图。电子模块10包括多层电路板11、电子部件12和两个存储器管芯14和15,电子部件12安装在多层电路板11的主表面13上。所述两个存储器管芯14和15被至少部分地嵌入在多层电路板11内,并因此在图1的顶视图中用虚线表示。
在其中部分存储器管芯14和15从电路板11部分地露出的示例性结构中,它们可被描述为部分地嵌入在电路板11内。在其中没有部分存储器管芯14和15从电路板11露出的示例性结构中,它们可被描述为被完全嵌入在电路板11内。在其它示例性结构中,存储器条,其可包括,例如,1至8个存储器装置,可经由(例如,16至128)位线连接到电路板。
电子部件12可具有片上系统架构(SoC),或可包括处理器,例如中央处理单元(CPU)、图形处理单元(GPU)或微控制器,或者可以是自由可编程门阵列(FPGA)或专用集成电路(ASIC)。所述存储器管芯可以是双倍数据率随机存取存储器(DDRRAM)管芯,如DDR2、DDR3、DDR4和LPDDR3RAM存储器管芯。存储器管芯14和15可作为未封装的管芯或裸管芯被提供,因为多层电路板11可用来提供封装功能,由于存储器管芯14和15被至少部分地嵌入在多层电路板11内。
电子模块10还包括非易失性存储器16,其在该示例性电子模块中,可以封装NOR(非OR)芯片的形式提供。非易失性存储器16安装在多层电路板11的主表面13上,相邻于电子部件12。另外电子模块10的部件,如电容器17,也安装在多层电路板11的第一主表面13上。电子部件12由导电再分配结构电耦接到存储器管芯14和15以及另外的部件。电子模块10可用于汽车应用,如抬头显示器。
如图1中的顶视图所示,两个存储器管芯14和15被布置为彼此平行,并部分地在电子部件12的下方,以便它们相邻于电子部件12的一侧延伸。存储器管芯14和15的这种在电路板11内并在电子部件12下方的结构,可用来减小多层电路板11和/或电子模块10的横向尺寸,由于存储器部件不再需要多层电路板11的上表面上的空间。
在其它未示出的实施方案中,电子部件12可耦接到单个存储器管芯或两个或更多个存储器管芯。所述存储器管芯可具有与图1中所示的不同的结构。例如,存储器管芯可被完全安置在电子部件的下方或安置在安装于多层电路板的上表面上的其它部件的下方。在两个或更多个存储器管芯的情况下,管芯可一个在另一个之上堆叠,所述堆叠至少部分地嵌入在多层电路板内。
图2示出第一示例性电子部件10沿着图1中的线A-A所采取的横截面视图。多层电路板11包括多个由导电层19交织的绝缘层18。绝缘层是电绝缘的,且可包括介电材料。例如,绝缘层18可包括环氧树脂浸渍的玻璃纤维。导电层19可由金属箔形成,如铜箔。
多层电路板11可包括六个(或更多个)导电层19,在图2中所示,如L1、L2、L3、L4、L5和L6,其中每一个由绝缘层18从它的邻居隔开。导电层19可包括多个导电迹线,充当电子部件12和其它安装于多层电路板11的第一主表面13上的部件之间的电连接;存储器管芯,其中一个存储器管芯15示于图2的横截面视图中;和/或电子模块10的外触点,其被安置在多层电路板11的相对主表面20上。导电迹线可通过构造形成导电层19的金属箔来形成。
如图2的横截面视图中所示,存储器管芯15被部分安置在电子部件12的下方,并且完全嵌入在多层电路板11内。存储器管芯15被嵌入在绝缘层21内,其夹在多层电路板的主体内的导电层L3和L4之间。绝缘层21包括空腔22,其尺寸被配置以在其体积内容纳存储器管芯15。
空腔22,存储器管芯15被安装在其中,可填充有密封剂(例如,环氧树脂),其可嵌入在存储器管芯15的上表面24和/或存储器管芯15的侧面。存储器管芯15可用粘胶层被安装于空腔22中,或者所述密封剂也可充当粘合剂,以在空腔22中固定存储器管芯15。
第一存储器管芯14可像第二存储器管芯15一样,被安装在同一空腔中或单独的空腔中。
存储器管芯15在其上表面24上包括接触垫23,接触垫23由接触凸点25电连接到导电层L3的迹线27。这些导电迹线27由导电过孔28,并另外由导电层L1和L2的导电迹线27耦接到电子部件12,导电过孔28延伸通过位于存储器管芯15和电子部件12之间的两绝缘层18。
导电迹线27和导电过孔28在多层电路板11中提供三维再分配结构。该三维再分配结构用于电耦接部件12、14、15和17,从而提供所需的电路或电子模块10的功能,并且将部件12、14、15和17耦接到电子模块的外触点,包括电源触点和信号触点。
在其他结构中,存储器管芯15可被安装在空腔22中。例如,导电迹线可被设置在空腔的底座上,并且存储器管芯可以被安装其上。这些导电迹线被用于将存储器管芯耦接到多层电路板的再分配结构。
电子模块10可通过制造子组件来制造,,其包括多层电路板11、嵌入在多层电路板11内的存储器管芯14和15以及接触垫的合适结构;导电迹线,其在导电层L1、L2、L3、L4、L5和L6中;以及导电过孔,以便为所需电路提供合适的再分配结构。电子部件12和另外的部件例如非易失性存储器16和电容器17然后可用集成的存储器管芯14和15安装在所述子组件上,以形成电子模块10。
通过将存储器管芯14和15置于多层电路板11内,特别是在电子部件12的下方,存储器管芯14和15以及电子部件12之间的导电连接的长度在结构上可减少,其中存储器管芯被安装在多层电路板11的第一主表面13上,相邻于电子部件12。通过减少导电连接的长度,相邻导电迹线之间的间隔可以减小,而串扰的水平可被保持或甚至降低。例如,导电迹线可以用印刷电路板技术形成,其也可使迹线的间距减小,特别是在多层电路板11的导电层19的内部,如层L2、L3、L4和L5。
阻塞电容器可相邻于电子部件12的触点被直接安装。存储器管芯14和15的电源连接可在低感应功率下被连接到多层电路板11的接地平面,而不需要附加的封装容量,因为裸露未封装的存储器管芯使用导电迹线,不使用接合线电感。此外,地址/命令/数据线阻抗匹配可被提高而反射可被减小,由于与引脚或存储器管芯封装的外部连接相关联的电容以及接合线电感被避免了。这可被用来消除终端电阻,其可能反过来降低功耗。
这些因素可用于使存储器使用时具有较大的带宽,如DDR4存储器管芯,在汽车应用,如信息娱乐主机单元、信息娱乐组合、仪表盘或抬头显示器。此外,这些因素会导致空间需求的减少,这可能有益于在另外的部件,如信息娱乐头单元、信息娱乐组合、仪表组或抬头显示器的内部,为冷却和通风提供更多空间,并提供更简易的模块结构。
图3示出了第二示例性电子模块40的侧视图,其包括多层电路板41(包括上绝缘层42和下绝缘层43)和三个导电层44、45和46。上绝缘层42夹在第一导电层44和第二导电层45之间;下绝缘层43夹在第二导电层45和第三导电层46之间。下绝缘层43在其上部区域包括空腔47。存储器管芯48安装在空腔47内,并在第二导电层45中由接触凸点50电连接到导电迹线49。导电迹线49在上绝缘层42中可被电连接到一个或多个导电过孔51,其在导电层44中依次电连接到迹线52。空腔47被填充有环氧树脂53的形式的密封剂。存储器管芯48被嵌入在多层电路板41的体积内。
多层电路板41还包括珀耳帖热泵装置60,其也被嵌入在多层电路板41中,并且更具体地,在第一导电层44中。
珀耳帖热泵装置是一种能够使用电能来进行泵加热,并且可以根据施加电流的方向来提供冷却和/或加热的装置。珀耳帖热泵利用珀耳帖效应,在显示热电效应的两种不同类型的半导体材料的结界产生热通量。例如,第一半导体构件可具有第一导电性类型,第二半导体构件具有与第一导电类型相反的第二导电性类型。所述两个半导体构件以空间交替的方式布置,并且呈热并联且电串联布置。已知各类适合于热电元件的半导体材料,包括但不限于,具有MgAgAs结构的Bi2Te3、Bi2-xSbxTe3、PbTe–PbS基材料和半霍伊斯勒(Heusler)化合物。
珀耳帖热泵装置60包括第一加热器/冷却器表面61,其位于安装在多层电路板41的上表面63上的产热装置62的下方。产热装置62可以为,例如,处理器芯片或片上系统封装。珀耳帖热泵装置60还包括第二加热器/冷却器表面64和半导体构件65,该构件显示热电效应。第二加热器/冷却器表面64位于邻近于第一加热器/冷却器表面61。第一加热器/冷却器表面61和第二加热器/冷却器表面64可从被提供作为多层电路板41的一部分的部分第一导电层44形成。
第一加热器/冷却器表面61在多层电路板40的最上层44中被布置为在产热装置62的下方,并且存储器管芯45在多层电路板40的下层43中被布置为在产热装置62的下方和在珀耳帖热泵装置60的下方。产热装置62、珀耳帖热泵装置60和存储器管芯45具有堆叠结构。这种堆叠结构可用来使多层电路板和电子部件40的横向尺寸减小。
珀耳帖热泵装置60的结构也于图4的顶视图中示出。如图所示,第一加热器/冷却器表面61包括两个独立部分66和67,其位于产热部件62的下方。一对具有相反的导电类型68和69的半导体构件,从每个第一加热器/冷却器部分66和67延伸。从第一加热器/冷却器部分66延伸的第二导电类型的半导体构件69,由第二加热器/冷却器表面64被电连接到从第二加热器/冷却器部分67延伸的第一导电类型的半导体构件69。一对半导体构件68和69被热并联且电串联布置。
珀耳帖热泵装置60具有从第一加热器/冷却器部分66的第一半导体构件68延伸的第一触点70;它也具有从第一加热器/冷却器表面61的第二部分67的第二半导体构件69延伸的第二触点71。电流被供应到珀耳帖热泵装置60的触点70和71,以便在第一加热器/冷却器表面61和第二加热器/冷却器表面54之间产生温度梯度和热传递。
可选择施加到珀耳帖热泵装置60的电流的方向,以使第一加热器/冷却器表面61为电子设备62提供冷却,并且第二加热器/冷却器表面64提供热表面,用于耗散从电子装置62排出的热量。珀耳帖热泵装置60可凭借第一加热器/冷却器表面61,通过将施加到触点70和71的电流方向反转,为电子装置62供热。
在图3和4所示的示例性结构中,珀耳帖热泵装置60包括两对53的半导体元件68和69、两个第一加热器/冷却器部分66和67以及单个第二加热器/冷却器表面64。然而,珀耳帖热泵装置60并不限定于这种特定的结构,并且可包括三个或更多个第一加热器/冷却器部分、三对或更多对半导体构件和两个或更多个第二加热器/冷却器部分,所有这些都布置成使得每对中的半导体构件热并联且电串联布置。
在该示例性布置中,第一加热器/冷却器表面61、半导体元件68和69以及第二加热器/冷却器表面64通常是共面的。在进一步的未示出的示例性结构中,第二加热器/冷却器表面可从所述第一加热器/冷却器表面隔开一定距离。在进一步的未示出的示例性结构中,第一加热器/冷却器表面和第二加热器/冷却器表面被完全嵌入在多层电路板内。在这些实施例中,第一加热器/冷却器表面由多个导热过孔可附加地热耦接到产热电子部件,并且第二加热器/冷却器表面可由第二组多个导热过孔附加地热耦接到环境中。
电路板41可通过将金属箔(例如,铜箔)层压到绝缘层42上,以形成子层来制造。金属箔可被层压到层43的两个主表面上,以形成第二子层。空腔45以适合于容纳一个或多个存储器管芯的位置形成在所述绝缘层的至少之一中。该金属层被构造来产生导电迹线49的所需结构。过孔形成在绝缘层42和43中,并且导电材料被插入过孔中,以形成导电过孔51。存储器管芯48安装到所述空腔中,并电连接到子层的导电迹线49。然后所述子层被堆叠并连接在一起以形成子组件。
另外的部件,如电子部件62,然后安装在子组件的上表面63上,以形成电子模块40。
珀耳帖热泵装置60可通过构造部分铜箔形成导电层44,以形成第一和第二加热器/冷却器表面51和53以及接触区域70和71。半导体构件58和59可通过将合适的半导体材料丝网印刷到第一加热器/冷却器表面51和第二加热器/冷却器表面53之间的绝缘层42上形成,以形成如上所述的结构。
虽然本文描述了本发明的各种实施方式,但是对于本领域普通技术人员将显而易见,许多更多的实施方式和实现方法在本发明的范围之内是可能的。因此,本发明除阐释所附权利要求及其等同物之外,是不被限制的。
Claims (14)
1.一种用于汽车应用的电子模块,包括:
多层电路板;
电子部件,所述电子部件安装在所述多层电路板的主表面上并电耦接到至少一个存储器管芯,所述至少一个存储器管芯被至少部分地嵌入在所述多层电路板内;以及
至少一个珀耳帖热泵装置,所述珀耳帖热泵装置包括至少一对热并联和电串联布置的热电半导体构件,所述至少一对半导体构件被至少部分地嵌入在所述电路板中。
2.根据权利要求1所述的电子模块,其中所述至少一个存储器管芯被至少部分地布置在所述电子部件的下方。
3.根据权利要求1或权利要求2所述的电子模块,其中所述多层电路板包括多个绝缘层以及多个包括导电迹线的层。
4.根据权利要求3所述的电子模块,所述多层电路板还包括至少一个延伸通过至少一个绝缘层的导电过孔。
5.根据权利要求3或权利要求4所述的电子模块,其中所述至少一个存储器管芯通过多个导电迹线耦接到所述电子部件,所述多个导电迹线布置在所述多层电路板的至少一个层中以及延伸通过至少一个绝缘层的导电过孔中。
6.根据权利要求3至权利要求5中任一项所述的电子模块,还包括被布置在绝缘层中的空腔,所述至少一个存储器管芯被安装在所述空腔中。
7.根据权利要求6所述的电子模块,还包括被布置在所述空腔中的密封剂,所述密封剂至少覆盖所述至少一个存储器管芯的侧面。
8.根据权利要求1至权利要求7中任一项所述的电子模块,其中所述珀耳帖热泵装置还包括至少一个第一加热器/冷却器表面和至少一个第二加热器/冷却器表面,每一对半导体构件在共同的第一加热器/冷却器表面和不同的第二加热器/冷却器表面之间延伸。
9.根据权利要求8所述的电子模块,其中所述第一加热器/冷却器表面被布置为横向相邻于第二加热器/冷却器表面。
10.根据权利要求1至权利要求9中任一项所述的电子模块,其中所述至少一对半导体构件通常是共面的并被布置在所述电路板内。
11.根据权利要求1至权利要求9中任一项所述的电子模块,其中在第一平面中的所述至少一个第一加热器/冷却器表面和第二平面中的所述至少一个第二加热器/冷却器表面之间延伸的所述至少一对半导体构件,被布置为距离所述第一平面一段距离。
12.根据任何权利要求1至权利要求11中任一项所述的电子模块,其中所述珀耳帖热泵装置还包括下列中的至少一个:
第二加热器/冷却器表面,其嵌入在所述电路板内,多个导热过孔从所述第二加热器/冷却器表面延伸到所述电路板的外表面;以及
第一加热器/冷却器表面,其嵌入在所述电路板内,多个导热过孔从所述第一加热器/冷却器表面延伸到应被冷却和/或加热的电子装置。
13.根据权利要求1至权利要求12中任一项所述的电子模块,其中所述电子部件包括片上系统架构,并且所述存储器管芯是双倍数据率随机存取存储器类型的存储器芯片。
14.根据权利要求1至权利要求13中任一项所述的电子模块,其中所述电子部件具有片上系统架构(SoC),或包括处理器,或者是自由可编程门阵列(FPGA)或专用集成电路(ASIC)。
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CN112087860A (zh) * | 2020-09-16 | 2020-12-15 | 广州小鹏汽车科技有限公司 | 印制电路板及其制造方法、电子设备和车辆 |
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EP3028547B1 (en) | 2019-12-11 |
EP3028547A1 (en) | 2016-06-08 |
WO2015014563A1 (en) | 2015-02-05 |
JP2016527727A (ja) | 2016-09-08 |
US20160174382A1 (en) | 2016-06-16 |
BR112016001796A2 (pt) | 2017-08-01 |
KR20160037846A (ko) | 2016-04-06 |
US9907181B2 (en) | 2018-02-27 |
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