CN105303000A - Circuit design method and system - Google Patents

Abstract

The invention discloses a circuit design method. The circuit design method comprises the following steps: generating RTL (Real Time Logistics) codes according to the requirements of a designed circuit, wherein the designed circuit described by the RTL codes comprises N registers and M combined logics; selecting the corresponding logics from a TB logic, an RM logic and a TB/RM mixed logic according to the properties of each register respectively; constructing corresponding circuit modules according to the RTL codes corresponding to the registers and the corresponding logics; and carrying out comprehensive optimization on the obtained N circuit modules and M combined logics to obtain a gate-level net list, so as to obtain the designed circuit according to the gate-level net list. When the RTL codes of the registers are converted into the circuit modules, the properties of each register are sufficiently considered and the most suitable logic of the register is selected, so that the performances of the converted circuit modules are optimal and the circuit is simplest, and furthermore, the area and power consumption of the finally-obtained designed circuit are very small. The invention further discloses a circuit design system.

Description

A kind of circuit design method and system

Technical field

The present invention relates to Design of Digital Circuit technical field, particularly relate to a kind of circuit design method and system.

Background technology

Along with the development of integrated circuit technique, improving constantly of technological level, integrated circuit (IC) design is faced with the challenge of the aspects such as power consumption, area, speed, checking, and wherein power consumption and area for cutting are the most outstanding.

In circuit design, logic level in complex optimum is considered to connect RTL (RegisterTransferLevel usually, Method at Register Transfer Level) and the of paramount importance link of physical level, design circuit hardware description language describes out by RTL code, design circuit is made up of multiple register and combinational logic usually, and RTL code is being converted in the process of gate level netlist, needing the RTL code conversion corresponding to register is the circuit module of logic-based, normally by circuit module that RTL code conversion corresponding for register is based on TB logic (Boolean logic) in prior art, but in fact some circuit module TB logic realization is simple, some use RM logic realization are simple, but a lot of circuit, when realizing based on TB/RM mixed logic, have better optimum results.Visible, adopt unity logic that device in the circuit finally obtained can be caused a lot of in prior art, thus cause circuit area and power consumption all very large.

Therefore, a kind of area of the circuit designed and all very little circuit design method of power consumption and system how is provided to be the problems that those skilled in the art need to solve at present.

Summary of the invention

The object of this invention is to provide a kind of circuit design method, the characteristic of each register has been taken into full account when being circuit module by register RTL code conversion, select and the optimal logic of register, thus achieve the best performance of the circuit module converted to and circuit is the simplest, and then make the area of the design circuit finally obtained and power consumption all very little; Another object of the present invention is to provide a kind of design system.

For solving the problems of the technologies described above, the invention provides a kind of circuit design method, comprising:

Demand according to design circuit generates RTL code, and wherein, the described design circuit that described RTL code describes comprises N number of register and M combinational logic;

Characteristic respectively according to register described in each selects corresponding logic from TB logic, RM logic and TB/RM mixed logic, and the described RTL code corresponding according to described register and corresponding logic build corresponding circuit module; Complex optimum is carried out to the N number of described circuit module obtained and M described combinational logic, obtains gate level netlist, and then obtain described design circuit according to described gate level netlist.

Preferably, the method also comprises:

Sequential is verified described design circuit, to judge whether described design circuit exists the violation of Time Created and retention time.

Preferably, the method also comprises:

Functionally described design circuit is verified, to judge whether described design circuit still meets described demand after complex optimum process.

Preferably, the process of the described generation of the demand according to design circuit RTL code is specially:

Propose the demand of design circuit, wherein, described demand comprises functional requirement and performance requirement;

According to the Demand Design solution of described design circuit, and generate RTL code;

Described RTL code is verified, and determines whether revising described RTL code, until described RTL code meets described demand according to the result.

For solving the problems of the technologies described above, present invention also offers a kind of design system, comprising:

Circuit design module, generates RTL code for the demand according to design circuit, and wherein, the described design circuit that described RTL code describes comprises N number of register and M combinational logic;

Complex optimum module, from TB logic, RM logic and TB/RM mixed logic, select corresponding logic for the characteristic respectively according to register described in each, the described RTL code corresponding according to described register and corresponding logic build corresponding circuit module; Complex optimum is carried out to the N number of described circuit module obtained and M described combinational logic, obtains gate level netlist, and then obtain described design circuit according to described gate level netlist.

Preferably, this system also comprises:

Timing verification module, for functionally verifying described design circuit, to guarantee that described design circuit meets described demand after the process of complex optimum.

Preferably, this system also comprises:

Functional verification module, for functionally verifying described design circuit, to guarantee that described design circuit meets described demand after the process of complex optimum.

Preferably, described circuit design module specifically comprises:

Functional requirement module, for proposing the demand of design circuit, wherein, described demand comprises functional requirement and performance requirement;

Code generation module, for the Demand Design solution according to described design circuit, and generates RTL code;

Code verification module, for verifying described RTL code, and determines whether revising described RTL code, until described RTL code meets described demand according to the result.

A kind of circuit design method provided by the invention and system, when carrying out complex optimum in the RTL code that the demand according to design circuit is generated, first the characteristic according to each register selects corresponding logic from TB logic, RM logic and TB/RM mixed logic, and then builds corresponding circuit module according to RTL code corresponding to register and corresponding logic; Visible, in the application, the characteristic of each register has been taken into full account when being circuit module by register RTL code conversion, select and the optimal logic of register, thus achieve the best performance of the circuit module converted to and circuit is the simplest, and then make the area of the design circuit finally obtained and power consumption all very little.

Accompanying drawing explanation

In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, be briefly described to the accompanying drawing used required in prior art and embodiment below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.

Fig. 1 is the process flow diagram of the process of a kind of circuit design method provided by the invention;

Fig. 2 is the process flow diagram of the process of another kind of circuit design method provided by the invention;

Fig. 3 is the structural representation of a kind of design system provided by the invention.

Embodiment

Core of the present invention is to provide a kind of circuit design method, the characteristic of each register has been taken into full account when being circuit module by register RTL code conversion, select and the optimal logic of register, thus achieve the best performance of the circuit module converted to and circuit is the simplest, and then make the area of the design circuit finally obtained and power consumption all very little; Another core of the present invention is to provide a kind of design system.

For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.

Embodiment one

Please refer to Fig. 1, Fig. 1 is the process flow diagram of the process of a kind of circuit design method provided by the invention, and the method comprises:

Step s101: the demand according to design circuit generates RTL code, wherein, the design circuit that RTL code describes comprises N number of register and M combinational logic;

Step s102: the characteristic respectively according to each register selects corresponding logic from TB logic, RM logic and TB/RM mixed logic, the RTL code corresponding according to register and corresponding logic build corresponding circuit module; Complex optimum is carried out to the N number of circuit module obtained and M combinational logic, obtains gate level netlist, and then obtain design circuit according to gate level netlist.

A kind of circuit design method provided by the invention, when carrying out complex optimum in the RTL code that the demand according to design circuit is generated, first the characteristic according to each register selects corresponding logic from TB logic, RM logic and TB/RM mixed logic, and then builds corresponding circuit module according to RTL code corresponding to register and corresponding logic; Visible, in the application, the characteristic of each register has been taken into full account when being circuit module by register RTL code conversion, select and the optimal logic of register, thus achieve the best performance of the circuit module converted to and circuit is the simplest, and then make the area of the design circuit finally obtained and power consumption all very little.

Embodiment two

Please refer to Fig. 2, Fig. 2 is the process flow diagram of the process of another kind of circuit design method provided by the invention, and the method comprises:

Step s201: the demand proposing design circuit, wherein, demand comprises functional requirement and performance requirement;

Be understandable that, first propose the demand of design circuit, comprise the demand of concrete function that design circuit needs reach and aspect of performance.

Step s202: according to the Demand Design solution of design circuit, and generate RTL code; Wherein, the design circuit that RTL code describes comprises N number of register and M combinational logic;

This step is also Activity design, according to the Demand Design solution of design circuit, namely by the demand of design circuit, also the function of design circuit and performance use hardware description language to describe out again, generate RTL code, here the design circuit that RTL code describes comprises N number of register and M combinational logic, wherein, N and M is the positive integer being not less than 1.

Step s203: RTL code is verified, and determine whether revising RTL code, until RTL code satisfies the demands according to the result;

This step is also behavior simulation, namely tests to the correctness of RTL code, and whether the design circuit detected described by RTL code satisfies the demands.Activity design and behavior simulation are the processes iterated, until final design circuit described by RTL code meets demand.

Step s204: the characteristic respectively according to each register selects corresponding logic from TB logic, RM logic and TB/RM mixed logic, the RTL code corresponding according to register and corresponding logic build corresponding circuit module; Complex optimum is carried out to the N number of circuit module obtained and M combinational logic, obtains gate level netlist, and then obtain design circuit according to gate level netlist;

The characteristic of register here is also the function of register, and the characteristic respectively according to N number of register finds out the logic corresponding to corresponding register from TB logic, RM logic and TB/RM mixed logic.

Enumerate an object lesson below, suppose that the function logic function that a certain register is corresponding has following three kinds of forms of expression:

Form 1: $f(x,y,z,s)=x\stackrel{\‾}{s}+xz+\stackrel{\‾}{x}\stackrel{\‾}{z}s+ys;$

Form 2: $f(x,y,z,s)=x\⊕\stackrel{\‾}{y}\stackrel{\‾}{z}s\⊕\stackrel{\‾}{x}ys;$

Form 3: $f(x,y,z,s)=x\⊕\stackrel{\‾}{y}\stackrel{\‾}{z}s+ys;$

Wherein form 1 is TB logical form, and form 2 is RM logical form, and form 3 represents for TB/RM mixed logic.Obvious 3rd kind of logical expressions are the simplest, and circuit resource requirement is less, thus can obtain the optimization of area and power consumption.Therefore, the TB/RM mixed logic corresponding with this register now can be selected to build circuit module.

Step s205: verify design circuit in sequential, to judge whether design circuit exists the violation of Time Created and retention time.

Step s206: functionally verify design circuit, to guarantee that design circuit satisfies the demands after the process of complex optimum.

Functionally the gate level netlist obtained after complex optimum is verified, guarantee not change primary circuit function in logic synthesis optimizing process.

In addition, step s205 here and the order of step s206 can be replaced, for specifically first carrying out which step the present invention does not do special restriction at this.

A kind of circuit design method provided by the invention, the basis of a upper embodiment also comprises, to the design circuit finally obtained sequential and functionally verify, the demand preset when ensureing that design circuit meets beginning, improves the accuracy of the circuit of design.

Corresponding with said method embodiment, present invention also offers a kind of design system, please refer to Fig. 3, Fig. 3 is the structural representation of a kind of design system provided by the invention, and this system comprises:

Circuit design module 1, generates RTL code for the demand according to design circuit, and wherein, the design circuit that RTL code describes comprises N number of register and M combinational logic;

Complex optimum module 2, selects corresponding logic for the characteristic respectively according to each register from TB logic, RM logic and TB/RM mixed logic, and the RTL code corresponding according to register and corresponding logic build corresponding circuit module; Complex optimum is carried out to the N number of circuit module obtained and M combinational logic, obtains gate level netlist, and then obtain design circuit according to gate level netlist.

As preferably, this system also comprises:

Timing verification module 3, for functionally verifying design circuit, to guarantee that design circuit satisfies the demands after the process of complex optimum.

As preferably, this system also comprises:

Functional verification module 4, for functionally verifying design circuit, to guarantee that design circuit satisfies the demands after the process of complex optimum.

As preferably, circuit design module 1 specifically comprises:

Functional requirement module 11, for proposing the demand of design circuit, wherein, demand comprises functional requirement and performance requirement;

Code generation module 12, for the Demand Design solution according to design circuit, and generates RTL code;

Code verification module 13, for verifying RTL code, and determines whether revising RTL code, until RTL code satisfies the demands according to the result.

Be corresponding for this system embodiment with said method embodiment, therefore, relevant description please refer to said method embodiment, and the present invention does not repeat them here.

A kind of design system provided by the invention, when carrying out complex optimum in the RTL code that the demand according to design circuit is generated, first the characteristic according to each register selects corresponding logic from TB logic, RM logic and TB/RM mixed logic, and then builds corresponding circuit module according to RTL code corresponding to register and corresponding logic; Visible, in the application, the characteristic of each register has been taken into full account when being circuit module by register RTL code conversion, select and the optimal logic of register, thus achieve the best performance of the circuit module converted to and circuit is the simplest, and then make the area of the design circuit finally obtained and power consumption all very little.

In this instructions, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.For system disclosed in embodiment, because it corresponds to the method disclosed in Example, so description is fairly simple, relevant part illustrates see method part.

Also it should be noted that, in this manual, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thus make to comprise the process of a series of key element, method, article or equipment and not only comprise those key elements, but also comprise other key elements clearly do not listed, or also comprise by the intrinsic key element of this process, method, article or equipment.When not more restrictions, the key element limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment comprising described key element and also there is other identical element.

To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.

Claims (8)

1. a circuit design method, is characterized in that, comprising:

Demand according to design circuit generates RTL code, and wherein, the described design circuit that described RTL code describes comprises N number of register and M combinational logic;

Characteristic respectively according to register described in each selects corresponding logic from TB logic, RM logic and TB/RM mixed logic, and the described RTL code corresponding according to described register and corresponding logic build corresponding circuit module; Complex optimum is carried out to the N number of described circuit module obtained and M described combinational logic, obtains gate level netlist, and then obtain described design circuit according to described gate level netlist.

2. circuit design method as claimed in claim 1, it is characterized in that, the method also comprises:

Sequential is verified described design circuit, to judge whether described design circuit exists the violation of Time Created and retention time.

3. circuit design method as claimed in claim 1, it is characterized in that, the method also comprises:

Functionally described design circuit is verified, to judge whether described design circuit still meets described demand after complex optimum process.

4. circuit design method as claimed in claim 1, is characterized in that, the process that the described demand according to design circuit generates RTL code is specially:

Propose the demand of design circuit, wherein, described demand comprises functional requirement and performance requirement;

According to the Demand Design solution of described design circuit, and generate RTL code;

Described RTL code is verified, and determines whether revising described RTL code, until described RTL code meets described demand according to the result.

5. a design system, is characterized in that, comprising:

Circuit design module, generates RTL code for the demand according to design circuit, and wherein, the described design circuit that described RTL code describes comprises N number of register and M combinational logic;

Complex optimum module, from TB logic, RM logic and TB/RM mixed logic, select corresponding logic for the characteristic respectively according to register described in each, the described RTL code corresponding according to described register and corresponding logic build corresponding circuit module; Complex optimum is carried out to the N number of described circuit module obtained and M described combinational logic, obtains gate level netlist, and then obtain described design circuit according to described gate level netlist.

6. design system as claimed in claim 5, it is characterized in that, this system also comprises:

Timing verification module, for functionally verifying described design circuit, to guarantee that described design circuit meets described demand after the process of complex optimum.

7. design system as claimed in claim 5, it is characterized in that, this system also comprises:

Functional verification module, for functionally verifying described design circuit, to judge whether described design circuit still meets described demand after complex optimum process.

8. design system as claimed in claim 5, it is characterized in that, described circuit design module specifically comprises:

Functional requirement module, for proposing the demand of design circuit, wherein, described demand comprises functional requirement and performance requirement;

Code generation module, for the Demand Design solution according to described design circuit, and generates RTL code;

Code verification module, for verifying described RTL code, and determines whether revising described RTL code, until described RTL code meets described demand according to the result.