CN103207941A - Transient analysis method and transient analysis system under integrated circuit power supply network full-parameter model - Google Patents
Transient analysis method and transient analysis system under integrated circuit power supply network full-parameter model Download PDFInfo
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Abstract
The invention discloses a transient analysis method under an integrated circuit power supply network full-parameter model. The method comprises the following steps: a determining step of determining the full-parameter model information of a to-be-analyzed integrated circuit power supply network; an establishing step of establishing a power supply network topological graph comprising a plurality of independent sub-circuits based on the full-parameter model information; and an analysis step of in parallel carrying out direct current working site analysis and transient analysis on each sub-circuit of the power supply topological graph to obtain the circuit node voltage distribution graph at each moment of each sub-circuit. As for a full-parameter circuit model, the invention establishes a linear system capable of adopting a symmetric matrix solver, and adopts a direct solver and an iterative solver in a hybrid manner according to the characteristics of problem solving. The method and system disclosed by the invention can be applied to carrying out fast and precise transient voltage drop analysis on the power supply network under the full-parameter model in formats such as an SPICE (Simulation Program with Integrated Circuit Emphasis) net-list form, especially on the aspect of memory consumption, and the system is improved to a great extent in comparison with the original emulator.
Description
Technical field
The present invention relates to the integrated circuit (IC) design field, especially relate to transient state analyzing method and system under a kind of integrated circuit electricity supply network population parameter model.
Background technology
In VLSI (very large scale integrated circuit), an important prerequisite of each components and parts operate as normal is that it can obtain normal supply voltage.And in fact, continuous reduction along with the integrated circuit technology size, the network impedance of the integrated circuit electric power system under the planar technology design is increasing, voltage drop on the metal routing of electric power system has become and can not ignore, and the actual power voltage that namely obtains on the components and parts is less than the supply voltage of outside to the integrated circuit power supply.If the voltage drop on the supply network is excessive, just may make the supply voltage that obtains on the components and parts low excessively, cause the time delay of components and parts to increase, especially under the population parameter model (comprising resistance, electric capacity and inductive effect) of chip power supply network, the transient noise of electric power system will be more serious, this will influence the real work performance of chip, to such an extent as to also can cause the logic error chip failure when serious.
Continuous development along with integrated circuit (IC) design and technology manufacturing capacity, the design of supply network is faced with more and more stern challenge, this is mainly reflected in: one, the chip manufacturing process size constantly reduces, integrated level is more and more higher, that is to say that chip power density is increasing, the ability of electric power system has been proposed more and more higher requirement; Two, because the design of low power dissipation design and heat radiation aspect considers that chip power supply voltage is more and more lower, it is more and more lower to make supply voltage fall threshold value; Three, because transistorized operating voltage constantly reduces, make its noise margin become more and more lower, more responsive to the fluctuation that supply voltage falls; Four, along with the reduction of the characteristic dimension of integrated circuit, the metal routing of electric power system is also more and more narrow, and then makes that the ghost effects such as resistance capacitance on the unit length are more remarkable; Five, the frequency of operation of chip is more and more high, and the increase of working current, makes that the transient noise of supply network is more remarkable.Therefore, the performance of supply network has become an important bottleneck of integrated circuit (IC) design and optimization, is subjected to the attention of academia and industry member day by day.
Efficiently, the analytical approach of accurate supply network, the design and optimization of supply network is had great significance.In the design process of supply network, the emulation of supply network can find potential problem as soon as possible and adjust, and brings very big design cost when avoiding adjusting in the design later stage again.And the optimization flow process of supply network is generally all carried out iteratively at present, namely the result according to simulation analysis adjusts on the basis of current design, obtain next step design, repeat such flow process up to obtaining a rational design effect, so repeatedly carry out simulation analysis part more consuming time in the optimizing process often.Especially for the supply network model of population parameter, considering dynamic element (electric capacity and inductance) afterwards, transient noise in the time of then must can obtaining the circuit real work by the emulation of time domain discrete differential mode, that is to say, must be to carrying out realistic simulation under the different working modes in enough clock period, can reflect the performance of supply network when the chip real work to a certain extent, and may just need carry out emulation at thousands of time points for each emulation cycle, therefore, whole transient state emulation will be very consuming time.
The topological structure of present widely used supply network is a latticed topological structure, the STATIC SIMULATION analysis of supply network is at a pure resistance network model, adopt classical node analysis method, set up a large-scale system of linear equations, can obtain the magnitude of voltage of all nodes by finding the solution this system of linear equations, thereby can further analyze the voltage drop of each node and check current density etc.The transient analysis of supply network is normally at the population parameter model that comprises resistance, electric capacity and inductance, energy-storage travelling wave tube electric capacity and inductance are carried out discretize, electric capacity after the discretize and inductance element can equivalence be constant resistance current source in parallel, the size of current source can obtain according to the simulation result of a last time point, by finding the solution the circuit node voltage responsive on each time point, can obtain the dynamic change of supply network node voltage, so the transient state emulation of supply network is the equal of to find the solution a series of system of linear equations.And the dynamic system that the population parameter model that comprises resistance, electric capacity and inductance forms will be more complicated.
Therefore, industry member is needed a kind of more high precision badly, more rapid convergence speed and more stable solution are come this complication system is carried out transient analysis efficiently.
Summary of the invention
One of technical matters to be solved by this invention be need provide a kind of can be accurate fast, reduce transient state analyzing method and system under the integrated circuit electricity supply network population parameter model of memory consumption.
In order to solve the problems of the technologies described above, the invention provides transient state analyzing method under a kind of integrated circuit electricity supply network population parameter model, comprising: determining step, determine the population parameter model information of integrated circuit electricity supply network to be analyzed; Establishment step is set up the supply network topological diagram that comprises a plurality of independent electronic circuits based on described population parameter model information; Analytical procedure is carried out DC operation point analysis and transient analysis and is obtained each electronic circuit and distribute at each circuit node voltage constantly each electronic circuit in the described supply network topological diagram is parallel.
In one embodiment, by the SPICE net table of integrated circuit electricity supply network to be analyzed being scanned to determine the population parameter model information of this integrated circuit electricity supply network; The adjacency list of setting up between circuit component and the circuit node based on described population parameter model information concerns, utilizes described adjacency list relation to make up the supply network topological diagram that comprises a plurality of independent electronic circuits then.
In one embodiment, in the step of the network model information of determining this integrated circuit electricity supply network, further all voltage sources with power supply source model in the network model information convert current source to; The compound direction of current that receives current source model in the recognition network model information.
In one embodiment, utilizing described adjacency list relation to make up in the step of the supply network topological diagram that comprises a plurality of independent electronic circuits, further comprise: step 21, adopt and also to look into collection the circuit node of setting attribute in the described adjacency list relation is carried out equivalence, the circuit node of described setting attribute comprises that short circuit or through hole resistance are less than the circuit node of setting value; Step 22 merges the current source that receives of carry on the primary circuit node of the circuit node representative after each equivalence; Step 23 is created as the circuit node after each equivalence of carrying out after the described step 22 and is connected topological diagram with not uncared-for resistance; Step 24, employing depth-first search algorithm identified goes out each independent electronic circuit of no electric connecting relation in the described connection topological diagram, to obtain the supply network topological diagram.
In one embodiment, in described analytical procedure, further comprise: step 31, for each electronic circuit in the described supply network topological diagram, in the 0th moment, this electronic circuit is carried out the DC operation point analysis; Step 32 in the 1st moment, adopts Euler's discrete differential method to make up about transient analysis matrix and right-hand vector under the RLC model of this electronic circuit, and the circuit node voltage of finding the solution the 1st moment that obtains this electronic circuit then distributes; Step 33 at other constantly, adopts trapezoidal discrete differential method to make up about each transient analysis matrix and the right-hand vector constantly under the RLC model of this electronic circuit, finds the solution then and obtains distributing at each circuit node voltage constantly of this electronic circuit.
In one embodiment, in described step 31, further comprise: ignore energy-storage travelling wave tubes all in this electronic circuit, make up static analysis matrix and right-hand vector about this electronic circuit; Utilize the iterative device to find the solution to obtain this electronic circuit to distribute at the 0th constantly circuit node voltage, preferably utilize the AMGPCG solver.
In one embodiment, in described step 32, utilize following formula to represent to adopt Euler's discrete differential method to make up about transient analysis matrix and right-hand vector under the RLC model of this electronic circuit,
Wherein, n is the circuit node number of supply network, v
n(t) and v
n(t+h) be the t moment and t+h circuit node voltage vector constantly respectively, i
l(t) be the current vector that t flows through inductive branch constantly, i
i(t+h) be that t+h receives the current source vector constantly, and
Wherein G is diagonal matrix, and its diagonal entry is the electric conductivity value of each resistance in the RLC model, and C also is diagonal matrix, its diagonal entry is the capacitance of each electric capacity in the RLC model, L also is diagonal matrix, and its diagonal entry is the inductance value of each inductance in the RLC model, and A
g, A
c, A
lAnd A
iBe the topological matrix of describing each element annexation, its every row has two non-zero entry at most, its subscript g, and c, l and i represent to be connected to the branch road of resistance, electric capacity, inductance and independent current respectively;
Utilize the iterative device to find the solution to obtain the 1st constantly circuit node voltage to distribute, preferably utilize the AMGPCG solver.
In one embodiment, in described step 33, utilize following formula to represent to adopt trapezoidal discrete differential method to make up about each transient analysis matrix and the right-hand vector constantly under the RLC model of this electronic circuit,
Wherein, v
n(t) and v
n(t+h) be the t moment and t+h circuit node voltage vector constantly respectively, i
l(t) be the current vector that t flows through inductive branch constantly, i
i(t) and i
i(t+h) be respectively that the t moment and t+h receive the current source vector constantly, and
Wherein G is diagonal matrix, and its diagonal entry is the electric conductivity value of each resistance in the RLC model, and C also is diagonal matrix, its diagonal entry is the capacitance of each electric capacity in the RLC model, L also is diagonal matrix, and its diagonal entry is the inductance value of each inductance in the RLC model, and A
g, A
c, A
lAnd A
iBe the topological matrix of describing each element annexation, its every row has two non-zero entry at most, its subscript g, and c, l and i represent to be connected to the branch road of resistance, electric capacity, inductance and independent current respectively;
Utilize direct solver to find the solution and obtain each circuit node voltage distribution constantly, preferably utilize the Cholmod solver.
According to a further aspect of the invention, also provide transient analysis system under a kind of integrated circuit electricity supply network population parameter model, having comprised: population parameter model information determination module, it determines the population parameter model information of integrated circuit electricity supply network to be analyzed; Network topological diagram is set up module, and it sets up the supply network topological diagram that comprises a plurality of independent electronic circuits based on described population parameter model information; Analysis module, it carries out DC operation point analysis and transient analysis and obtains each electronic circuit and distribute at each circuit node voltage constantly each electronic circuit in the described supply network topological diagram is parallel.
In one embodiment, by the SPICE net table of integrated circuit electricity supply network to be analyzed being scanned to determine the population parameter model information of this integrated circuit electricity supply network; The adjacency list of setting up between circuit component and the circuit node based on described population parameter model information concerns, utilizes described adjacency list relation to make up the supply network topological diagram that comprises a plurality of independent electronic circuits then.
In one embodiment, in described analysis module, further comprise: the dc point analytic unit, it in the 0th moment, carries out DC operation point analysis to this electronic circuit for each electronic circuit in the described supply network topological diagram; The transient analysis unit, it the 1st constantly, adopt Euler's discrete differential method to make up about transient analysis matrix and right-hand vector under the RLC model of this electronic circuit, the circuit node voltage of finding the solution the 1st moment that obtains this electronic circuit then distributes, and, at other constantly, adopt trapezoidal discrete differential method to make up about each transient analysis matrix and the right-hand vector constantly under the RLC model of this electronic circuit, find the solution then and obtain distributing at each circuit node voltage constantly of this electronic circuit.
Compared with prior art, one or more embodiment of the present invention can have following advantage:
For the circuit model of population parameter, the present invention has set up the linear system that can adopt the symmetric matrix solver, according to the characteristics of problem solving, mixes and has adopted direct solver and iterative device.The present invention can carry out fast accurate transient voltage to the supply network under the SPICE net sheet format population parameter model for example and fall analysis, and especially aspect memory consumption, comparing in the past emulator has significantly and improve.
Other features and advantages of the present invention will be set forth in the following description, and, partly from instructions, become apparent, perhaps understand by implementing the present invention.Purpose of the present invention and other advantages can realize and obtain by specifically noted structure in instructions, claims and accompanying drawing.
Description of drawings
Accompanying drawing is used to provide further understanding of the present invention, and constitutes the part of instructions, is used for jointly explaining the present invention with embodiments of the invention, is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is according to the schematic flow sheet of transient state analyzing method under the integrated circuit electricity supply network population parameter model of first embodiment of the invention;
Fig. 2 is the supply network model synoptic diagram under the population parameter RLC model;
Fig. 3 is supply voltage source model synoptic diagram;
Fig. 4 receives the current source model synoptic diagram as the power supply network load;
Fig. 5 is transient state emulation each dependence synoptic diagram constantly on time shaft;
Fig. 6 is based on the parallelization transient state emulation synoptic diagram of multithreading;
Fig. 7 (a) and Fig. 7 (b) utilize method shown in Figure 1 the ibmpg1t example to be carried out voltage oscillogram and the voltage error curve map of one of them circuit node n1_18333_5432 after the transient state emulation;
Fig. 8 is the structural representation according to transient analysis system under the integrated circuit electricity supply network population parameter model of second embodiment of the invention.
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, how the application technology means solve technical matters to the present invention whereby, and the implementation procedure of reaching technique effect can fully understand and implements according to this.Need to prove that only otherwise constitute conflict, each embodiment among the present invention and each feature among each embodiment can mutually combine, formed technical scheme is all within protection scope of the present invention.
In addition, can in the computer system such as one group of computer executable instructions, carry out in the step shown in the process flow diagram of accompanying drawing, and, though there is shown logical order in flow process, but in some cases, can carry out step shown or that describe with the order that is different from herein.
First embodiment
The purpose of present embodiment is to propose a kind of more stable, efficient than additive method in this field, and supply network transient state analyzing method under the committed memory population parameter model still less, just satisfying under the solving precision situation of user's appointment, finishing specifying SPICE to net the transient analysis that tabular supply network node voltage falls with few working time of trying one's best, few memory consumption of trying one's best.
For achieving the above object, the process flow diagram of supply network transient state analyzing method under the population parameter model that present embodiment proposes, specifically as shown in Figure 1.
Following " step " two words that omit of step S110() determine the population parameter model information of integrated circuit electricity supply network to be analyzed.
In the present embodiment, preferably, by the SPICE net table of integrated circuit electricity supply network to be analyzed being scanned to determine the population parameter model information of this integrated circuit electricity supply network.Certainly, do not limit the SPICE form, as long as the information of circuit to be analyzed can be carried out complete description, extended formatting so, for example the DEF/SPEF/DSPF file layout also can.
Obtain information about supply network by twice scanning SPICE net table, scan statistics goes out number and the metal routing number of plies of resistance in this supply network for the first time, sets up Hash table based on statistics then.The circuit node that fast query has been stored from the Hash table that obtains when reading in the net table for the second time.
Need to prove that the SPICE form is the standard format that a kind of industry member is applied to describe circuit elements device and topological relation thereof.Supply network transient analysis for population parameter, its circuit model comprises the resistance, supply voltage source model of metal routing and as the current source model that receives of supply network load, circuit output is each magnitude of voltage constantly of each circuit node in the supply network.
As shown in Figure 2, it is the supply network model of a population parameter.Metal routing is modeled as lumped resistance on the sheet, the very little and (not shown) that is left in the basket of its inductive effect; Power supply source is modeled as the composite model that standard voltage source is connected with a packaged resistance and package inductance; Be modeled as a compound current source model that receives as the chip operation unit of load, it comprises the capacity effect of describing the current source opened the working cell and inside, unit and the internal resistance of describing electricresistance effect.
Specifically, be illustrated in figure 3 as a typical supply voltage source model, it has considered the electrical effects that is caused by the chip encapsulation, the encapsulation effect has been modeled as a lumped inductance L and a lumped resistance r, and the power supply source model that therefore uses is exactly to be in series by the voltage source V dd of a standard and package inductance L and packaged resistance r.For the ease of forming simulation matrix, need carry out conversion to it, at first packaged resistance r is divided into two resistances and is
Resistance series connection, then package inductance L is placed between two resistance, by the promise circuit equivalent theorem of pausing, and given electricity is led
The resistance that voltage source V dd is adjacent
Series connection can equivalence be that a current source 2gVdd is in parallel with resistance 2g, so just all voltage sources in the circuit has been converted to current source.
Be illustrated in figure 4 as a typical compound current source model that receives, be actually when the chip unit as load is carried out emulation, a compound circuit model of employing is described its electrical response.It comprises an equivalent resistance R
EquivWith an equivalent capacity C
EquivAfter connecting again with the current source I of an equivalence
sCarry out parallel connection, insert in the supply network then.And for vdd line net and GND gauze in the reality access supply network, equivalent resistance R in this model
EquivWith equivalent capacity C
EquivThe order difference, but this does not influence the response of its circuit, therefore only needs correct identification electric current I in actual emulation
sDirection get final product.
Step S120 sets up the supply network topological diagram that comprises a plurality of independent electronic circuits based on the population parameter model.
Particularly, the adjacency list of setting up between circuit component and the circuit node based on the population parameter model information concerns, utilizes the adjacency list relation to make up the supply network topological diagram that comprises a plurality of independent electronic circuits then.
Utilizing the adjacency list relation to make up in the step of the supply network topological diagram that comprises a plurality of independent electronic circuits, at first in the treatment circuit such as node short circuit or the too small situation of through hole resistance, the technology that adopts and look into collection is carried out equivalence with above-mentioned node, the current source that receives with carry on the ancestor node of the node representative after each equivalence merges then, the node after the equivalence of above-mentioned processing is created as with not uncared-for resistance to be connected topological diagram again.
Owing to existing the mutual independent some electronic circuits that do not have electric connecting relation in the supply network, so the method that can adopt depth-first search identifies all connected components among this figure, and with the connected component that the identifies connection topological diagram as independent electronic circuit, utilize this attribute to carry out DC operation point analysis and transient analysis to each electronic circuit concurrently.
Step S130 carries out DC operation point analysis and transient analysis and obtains each electronic circuit and distribute at each circuit node voltage constantly each electronic circuit in the supply network topological diagram is parallel.
Specifically, in the 0th moment, each electronic circuit is carried out the DC operation point analysis.Further for t=0 DC operation point analysis constantly, all energy-storage travelling wave tubes can be ignored, that is to say the inductance short circuit, capacitance open circuit, set up static analysis matrix equation and right-hand vector GV=I then, wherein G is conductance matrix, and V is circuit node voltage vector to be asked, I receives the current source load vector, and the voltage of finding the solution this matrix equation circuit node when obtaining initial time t=0 distributes.
In the 1st moment, adopt Euler's discrete differential method to make up about transient analysis matrix and right-hand vector under the RLC model of this electronic circuit, the circuit node voltage of finding the solution the 1st moment that obtains each electronic circuit then distributes.At other constantly, adopt trapezoidal discrete differential method to make up about each transient analysis matrix and the right-hand vector constantly under the RLC model of this electronic circuit figure, find the solution then and obtain distributing at each circuit node voltage constantly of each electronic circuit figure.
Need to prove, transient analysis for the first step, it is t=1 transient analysis constantly, because its front has only time point t=0 analysis result constantly to use, therefore must adopt the Euler differential mode to carry out discretize, set up transient state matrix equation and right-hand vector under the RLC model, the voltage of finding the solution the transient analysis t=1 circuit node constantly that obtains the first step distributes.
Then t=2 constantly and other time point, because there have been two time points (t-2) its front constantly and (t-1) constantly analysis result can use, therefore adopted more high-precision trapezoidal differential mode to carry out discretize, set up transient state matrix equation and right-hand vector under the RLC model, find the solution the voltage distribution that obtains t=2 constantly and put the circuit node of transient state emulation excess time.
Describe in detail below and how to set up transient analysis equation (transient state matrix equation and right-hand vector).
The transient analysis of supply network refers under given time-varying current loading condition, obtains time dependent voltage waveform on the supply network circuit node.The transient analysis of supply network under the population parameter RLC model comes down to find the solution a large-scale ordinary differential equation, needs in the reality it is carried out discretize in time domain, finds the solution a series of difference algebra equation then.The greatest problem that transient analysis faces is that can form a series of extensive algebraic equation on the time domain after the discrete differential need find the solution, and needs the very long emulation cycle.
For a supply network that contains the RLC model of n circuit node, adopt the node analysis method (MNA) based on KCL law and KVL law, when only the electric current variable of inductive branch was flow through in reservation, this system can be turned to by form
Wherein, n is the circuit node number of supply network, v
nBe circuit node voltage vector to be asked, i
lBe the current vector that flows through inductive branch, i
iBe to receive the current source vector, and
Wherein G is diagonal matrix, and its diagonal entry is the electric conductivity value of each resistance in the RLC model, and C also is diagonal matrix, its diagonal entry is the capacitance of each electric capacity in the RLC model, L also is diagonal matrix, and its diagonal entry is the inductance value of each inductance in the RLC model, and A
g, A
c, A
lAnd A
iBe the topological matrix of describing each element annexation, its every row has only two non-zero entry (for the element of ground connection, having only a non-zero entry), its subscript g, and c, l and i represent to be connected to the branch road of resistance, electric capacity, inductance and independent current respectively.
The above-mentioned differential equation many kinds of solutions through forming the algebraic equation of a series of matrix forms after the discrete differential, having developed in the numerical value field, mainly be divided into two big classes: direct solver and iterative device.Because directly solver is that matrix is decomposed, the numerical result of asking by back substitution then, and for transient state emulation, after in case simulation matrix forms, only need a matrix decomposition, follow-up each analysis constantly just can obtain the result by the form of back substitution, and therefore for transient analysis, directly solver is easier is favored.
For the algebra matrix equation after the above-mentioned differential equation formalization, the method for solving of main flow is its matrix of coefficients to be carried out LU decompose, deriving the non-zero entry of some row when reducing matrix decomposition based on the technology of reordering simultaneously inserts, to reduce the memory consumption of solver, but for large-scale supply network transient analysis, it is millions of even several hundred million that its interstitial content can reach, the internal memory sharp increase that consumes when it is carried out transient analysis.
And present embodiment has greatly reduced the memory consumption of transient analysis by following analytical approach, has also improved the efficient of finding the solution simultaneously.Notice that algebra matrix equation after the above-mentioned differential equation discrete differential has sparse, positive definite but asymmetrical characteristics, if adopt direct method for solving then must carry out LU to conductance matrix and decompose, form two matrix decomposition factor L and U, its demand to internal memory is very high.Present embodiment is based on this, with above-mentioned differential equation formalization again, the algebra matrix equation that carries out discrete differential formation then has sparse, the characteristics of positive definite and symmetry, just can preferably adopting this moment efficiently, Qiao Laisiji decomposes solver Cholmod(about the particular content of this solver, see " CHOLMOD:supernodal sparse Cholesky factorization and update/downdate " among the network address http://www.cise.ufl.edu/research/sparse/cholmod for details), it needs to decompose and obtains a matrix factor L, greatly save the internal memory of solver, also improved the efficient of matrix decomposition simultaneously.
Notice that the above-mentioned differential equation has just caused asymmetricization of the algebra matrix equation that forms just because of the electric current variable of having introduced the additional inductance branch road, here by formalization again with its cancellation.At first, the above-mentioned differential equation is adopted discrete differential, adopt Euler's mode or trapezoidal mode all can, for convenience of description, temporarily adopt Euler's differential mode here.For the above-mentioned differential equation, given discrete steps h, then t can be described as following matrix equation with (t+h) current-voltage correlation constantly constantly
With t voltage quantities v constantly
n(t) and the electric current variable i
l(t) move on to the equation right-hand member, can obtain
The matrix equation of above-mentioned block form is launched cancellation electric current variable i
i(t+h), can obtain
And notice
Above-mentioned matrix equation can be rewritten as
So far, as can be seen from the above equation, distribute in case known t voltage constantly, then can obtain (t+h) voltage distribution constantly by finding the solution following formula, and sparse matrix
Characteristics with sparse, positive definite and symmetry.Equally, the simulation accuracy of high-order more can adopt the mode of trapezoidal difference that the above-mentioned differential equation is carried out discretize if desired, and the algebra matrix equation of formation is as follows
Equally, distribute in case known t voltage constantly, then can obtain (t+h) voltage distribution constantly by finding the solution following formula, and matrix of coefficients
The characteristics that also have sparse, positive definite and symmetry just need consider that t flows through the current i of inductive branch constantly in the structure right-hand vector
l(t).Notice and contain three in the right-hand vector, its second be t constantly with (t+h) constantly receive the electric current sum; The 3rd is 2 times of the t current value that flows through inductive branch constantly.First structure is more special, and its building method is as follows: first is
It can distribute by the voltage of moment t and obtain, but need not explicitly re-constructs matrix
Because it can be written as
Because wherein
v
n(t) just identical with right-hand vector in the matrix equation of t constantly, therefore need not it is re-constructed, the right-hand vector of moment t can be stored, reuse for finding the solution of (t+h) moment.
So far, the method that MNA equation form is again turned to the algebra matrix equation of symmetric form that present embodiment proposes, make the transient analysis under the RLC model can adopt symmetrical Qiao Laisiji solver, very big raising was arranged aspect memory consumption and working time.
Present embodiment preferably adopts two solvers: iterative device AMGPCG(Algebraic Multigrid Preconditioned Conjugate Gradient Method, based on the conjugate gradient iterative device of the pre-condition of algebraic multigrid of net point polymerization) and direct solver Cholmod.Wherein, iterative device AMGPCG adopts the net point polymerization of pure algebraically that coarse grid and refined net are shone upon at the matrix level, alligatoring grid in different levels adopts krylov subspace acceleration strategy simultaneously, and it is used for improving the convergence stability of conjugate gradient algorithm as pre-condition of implicit expression.Further, about the particular content of this solver, see " the PowerRush:A Linear Simulator for Power Grid " in the IEEE/ACM International Conference on Computer-Aided Design in 2011 for details.Because the characteristics of Cholmod are only need once be poised for battle matrix decomposition can find the solution the system of many right-hand vector, AMGPCG does not then have these characteristics, but for the situation that only need once find the solution, therefore the AMGPCG solver will be got well much than travelling speed and the internal memory of Cholmod, and what adopt at t=0 DC operation point analysis constantly is the AMGPCG solver.
And because the difference of discrete differential mode, the transient analysis t=1 in the 1st step is also inequality with the transient analysis matrix of the t=2 moment and other time point constantly, therefore the transient state emulation t=1 in the 1st step still adopts the AMGPCG solver constantly, and the t=2 moment and other time point then adopt the Cholmod solver.
Step S140 exports each electronic circuit and distributes at each circuit node voltage constantly.
The inventive method is at first resolved for example net table of SPICE form, and the electricity component in the supply network and nodal information are stored into efficiently in the data structure; Then, on the distinctive how much topological property bases of supply network, according to the principle of node analysis method, set up STATIC SIMULATION matrix and the right-hand member current vector of supply network, adopt the AMGPCG solver to carry out dc analysis, the initial voltage that obtains each circuit node distributes; At last, set up transient state simulation matrix and the right-hand member current vector of supply network, adopt the direct solver Cholmod that decomposes based on Qiao Laisiji to find the solution supply network node voltage vector on follow-up each time point, and with its output.
Present embodiment can carry out fast accurate transient voltage to the supply network under the population parameter model by above-mentioned steps and fall analysis, especially aspect memory consumption, has significant improvement.
Simulated example
Further specify the feature and advantage of the embodiment of the invention below by a simulated example.
SPICE nets tabular supply network for input, at first by the SPICE resolver it is read in the inner data structure, carries out emulation respectively concurrently at each electronic circuit then, that is to say DC operation point analysis and transient analysis.For the DC operation point analysis, at first set up static model, form simulation matrix and right-hand vector, adopt the AMGPCG solver that it is found the solution the initial voltage that obtains circuit node then and distribute; Set up transient model then, moment employing Euler (Euler) method of difference for t=0 disperses as starting, form simulation matrix and right-hand vector, the same AMGPCG of employing solver is found the solution the voltage that obtains circuit node and is distributed, then adopt the trapezoid differential point-score to disperse for follow-up time point, form simulation matrix and right-hand vector, adopt the Cholmod solver to find the solution and obtain each voltage distribution of circuit node constantly; The transient voltage waveform of last output circuit.Specifically, may further comprise the steps.
Concrete simulation process is as follows:
(1) reads SPICE and net tabular supply network;
(2) make up circuit topology figure, identify the circuit subgraph of no electric connecting relation in the supply network, concurrently they are carried out simulation analysis respectively;
(3) carry out DC operation point analysis (static analysis) constantly at t=0:
(3.1) make up static analysis matrix and right-hand vector;
(3.2) call the AMGPCG solver and find the solution the circuit node voltage distribution that obtains in the t=0 moment;
(4) adopt Euler discrete differential mode to carry out the transient state emulation in the 1st step constantly at t=1:
(4.1) make up transient state simulation matrix and right-hand vector;
(4.2) call the AMGPCG solver and find the solution the circuit node voltage distribution that obtains in the t=1 moment;
(5) adopt trapezoidal discrete differential mode to carry out transient state emulation in the t=2 moment and remaining time point:
(5.1) rebuild transient state simulation matrix and each right-hand vector constantly;
(5.2) call the Cholmod solver find the solution obtain each constantly circuit node voltage distribute.
In the transient state simulation process, Euler discrete differential mode only needs the result of previous time point, and trapezoidal discrete differential mode needs the result of preceding two time points, and its description on time shaft is as seen shown in Figure 5, the transient state emulation in 4 steps was example in the past, comprised the steps: specifically
(1) carries out transient analysis in the initial moment of t=0;
(2) carry out the 1st step transient analysis constantly at t=1, adopt Euler discrete differential mode (Euler among the figure), it need be used t=0 node voltage constantly and distribute;
(3) carry out the 2nd step transient analysis constantly at t=2, adopt trapezoidal discrete differential mode (TR among the figure), it need use t=0 constantly and t=1 node voltage constantly distributes;
(4) carry out the 3rd step transient analysis constantly at t=3, adopt trapezoidal discrete differential mode, it need use t=1 constantly and t=2 node voltage constantly distributes.
Subsequently, adopt trapezoidal discrete differential mode that remaining time point is carried out emulation, till arriving the desired moment.
Simultaneously, owing to there is the electronic circuit of no electric connecting relation in the original supply network, the embodiment of the invention adopts the method for depth-first that it is identified, and respectively each electronic circuit is carried out simulation analysis simultaneously to improve the simulation velocity of emulator then.
When each electronic circuit is carried out parallel artificial, need distribute for each electronic circuit parallel artificial carries out thread, interstitial content to all electronic circuits sorts, and according to available number of threads, these electronic circuits of mean allocation carry out emulation to the thread of appointment as far as possible.
As shown in Figure 6, all exist the electronic circuit that several are cut apart naturally in the general supply network, between them without any electric connecting relation, such as comprising 4 electronic circuits, comprise 3 vdd line nets (the subnet # 1 shown in the figure, subnet # 2 and subnet #3) and 1 GND gauze (the subnet # 0 shown in the figure), respectively each electronic circuit is placed in the thread, adopts multithreading to come whole simulation is accelerated.The most direct method is the corresponding thread of an electronic circuit, as shown in the figure, and with subnet # 0, subnet # 1, subnet # 2 and the corresponding thread 0 of subnet # 3 difference, thread 1, thread 2 and thread 3.Thread is not enough, the internal memory peak value is too high or the idle situation about waiting for of thread but exist in actual applications, therefore need carry out simple thread scheduling to it and distribute.
By the characteristics of power supply network itself as can be known, circuit node number in the GND gauze is generally suitable with the circuit node number in the vdd line net, but the general electronic circuit of all minute being made several no electric connecting relations of vdd line net, and GND gauze corresponding electronic circuit only, therefore the simplest method is to adopt a thread to come emulation GND gauze, as shown in Figure 6, adopt thread 0 to come emulation subnet # 0, and adopt the another one thread electronic circuit in all vdd line nets of emulation serially respectively, as shown in Figure 6, adopt thread 1 to come emulation subnet # 1, #2 and #3.The internal memory peak value can be not too high like this, and be difficult for existing the idle situation about waiting for of thread.More generally situation is, at first the interstitial content to all electronic circuits sorts, and then according to available number of threads, these electronic circuits of mean allocation carry out emulation to the thread of appointment as far as possible.
At last, the transient voltage waveform of output circuit.Particularly, all node voltage values output in the file of appointment on each time point that stores according to above-mentioned transient state emulation, finish whole transient state simulation flow.
Be depicted as among the ibmpg1t oscillogram that name is called the node of n1_18333_5432 as Fig. 7 (a), the emulation cycle is 1ns, discrete steps is 1ps, therefore be the voltage waveform in 1001 moment shown in the figure, represent simulation result under canonical solution, the Euler's difference form and the simulation result under the trapezoidal difference form with " Std ", " Euler " and " TR " respectively in the figure.Simultaneously, shown in Fig. 7 (b), give the simulation accuracy that adopts under Eluer difference and the trapezoidal difference form, compare with canonical solution and can find to adopt precision that trapezoidal differential mode carries out the solution that emulation obtains basically than adopting the Eluer differential mode to carry out the high order of magnitude of precision of the solution that emulation obtains.
As shown in table 1 below, when testing electronic circuit ibmpg1t～ibmpgt6t respectively, working time and memory consumption situation.
Table 1
The emulator of above-mentioned simulated example adopts the C/C++ language to realize, Liunx server at an Intel Xeon E5506CPU@2.13Hz and 24GB internal memory is tested, and test case adopts in the actual design that American I BM company provides the supply network ibmpg1t～ibmpgt6t test set at transient analysis.To above-mentioned example, under the solving precision that guarantees 0.01mV, the transient voltage that can rapid solving obtains supply network falls, and memory consumption almost is traditional LU solver half, also be improved working time, and especially the speed of whole simulation device is greatly improved under the multithreading acceleration situation.
The design example of the SPICE form by adopting the industry member standard carries out emulation testing, table with test results is understood the validity of present embodiment, when supply network is carried out transient analysis under the population parameter model, good stability is arranged, especially nearly half memory consumption has been saved in internal memory use aspect.
Second embodiment
Fig. 8 is the structural representation according to transient analysis system under the integrated circuit electricity supply network population parameter model of second embodiment of the invention.
As shown in Figure 8, native system comprises that population parameter model information determination module 80, connected network topological diagram set up module 81 and set up analysis module 82 and the output module 83 that module 81 is connected.
Population parameter model information determination module 80, it determines the population parameter model information of integrated circuit electricity supply network to be analyzed.
Particularly, this module 80 is by scanning to determine the population parameter model information of this integrated circuit electricity supply network to the SPICE net table of integrated circuit electricity supply network to be analyzed.
Network topological diagram is set up module 81, and it sets up the supply network topological diagram that comprises a plurality of independent electronic circuits based on the population parameter model information.
The adjacency list that this module 81 is set up between circuit component and the circuit node based on the population parameter model information concerns, utilizes the adjacency list relation to make up the supply network topological diagram that comprises a plurality of independent electronic circuits then.And, also be used for converting all voltage sources of network model information power supply source model in current source and the recognition network model information compound direction of current that receives current source model.
Further, this module 81 adopts also to be looked into collection the circuit node of setting attribute in the adjacency list relation is carried out equivalence, and the circuit node of setting attribute comprises that short circuit or through hole resistance are less than the circuit node of setting value; The current source that receives of carry on the primary circuit node of the circuit node representative after each equivalence is merged; Circuit node after each equivalence after receiving current source to merge the execution is created as with not uncared-for resistance and is connected topological diagram; And adopt the depth-first search algorithm identified to go out each the independent electronic circuit of no electric connecting relation in the described connection topological diagram, to obtain the supply network topological diagram.
In analysis module 82, further comprise dc point analytic unit 82a and transient analysis unit 82b.
Dc point analytic unit 82a, it in the 0th moment, carries out DC operation point analysis to this electronic circuit for each electronic circuit in the supply network topological diagram.Particularly, this unit 82a ignores energy-storage travelling wave tubes all in this electronic circuit, makes up static analysis matrix and right-hand vector about this electronic circuit, then, utilize the iterative device to find the solution to obtain this electronic circuit to distribute at the 0th constantly circuit node voltage, preferably utilize the AMGPCG solver.
Wherein, v
n(t) and v
n(t+h) be the t moment and t+h circuit node voltage vector constantly respectively, i
l(t) be the current vector that t flows through inductive branch constantly, i
i(t+h) be that t+h receives the current source vector constantly, and
Wherein G is diagonal matrix, and its diagonal entry is the electric conductivity value of each resistance in the RLC model, and C also is diagonal matrix, its diagonal entry is the capacitance of each electric capacity in the RLC model, L also is diagonal matrix, and its diagonal entry is the inductance value of each inductance in the RLC model, and A
g, A
c, A
lAnd A
iBe the topological matrix of describing each element annexation, its every row has two non-zero entry at most, its subscript g, and c, l and i represent to be connected to the branch road of resistance, electric capacity, inductance and independent current respectively.
At other constantly, transient analysis unit 82b adopts trapezoidal discrete differential method to make up about each transient analysis matrix and the right-hand vector constantly under the RLC model of this electronic circuit, finds the solution then and obtains distributing at each circuit node voltage constantly of this electronic circuit.Transient analysis matrix and right-hand vector can be shown below:
Wherein, i
i(t) and i
i(t+h) be respectively that the t moment and t+h receive the current source vector constantly.
By the system of present embodiment, can carry out fast accurate transient voltage to the supply network under the population parameter model and fall analysis, especially aspect memory consumption, the emulator of comparing in the past has raising significantly.
Those skilled in the art should be understood that, above-mentioned each module of the present invention or each step can realize with the general calculation device, they can concentrate on the single calculation element, perhaps be distributed on the network that a plurality of calculation elements form, alternatively, they can be realized with the executable program code of calculation element, thereby, they can be stored in the memory storage and be carried out by calculation element, perhaps they are made into each integrated circuit modules respectively, perhaps a plurality of modules in them or step are made into the single integrated circuit module and realize.Like this, the present invention is not restricted to any specific hardware and software combination.
Though the disclosed embodiment of the present invention as above, the embodiment that described content just adopts for the ease of understanding the present invention is not in order to limit the present invention.Technician in any the technical field of the invention; under the prerequisite that does not break away from the disclosed spirit and scope of the present invention; can do any modification and variation in the details of implementing that reaches in form; but scope of patent protection of the present invention still must be as the criterion with the scope that appending claims was defined.
Claims (11)
1. transient state analyzing method under the integrated circuit electricity supply network population parameter model is characterized in that, comprising:
Determining step is determined the population parameter model information of integrated circuit electricity supply network to be analyzed;
Establishment step is set up the supply network topological diagram that comprises a plurality of independent electronic circuits based on described population parameter model information;
Analytical procedure is carried out DC operation point analysis and transient analysis and is obtained each electronic circuit and distribute at each circuit node voltage constantly each electronic circuit in the described supply network topological diagram is parallel.
2. method according to claim 1 is characterized in that,
By the SPICE net table of integrated circuit electricity supply network to be analyzed being scanned to determine the population parameter model information of this integrated circuit electricity supply network;
The adjacency list of setting up between circuit component and the circuit node based on described population parameter model information concerns, utilizes described adjacency list relation to make up the supply network topological diagram that comprises a plurality of independent electronic circuits then.
3. method according to claim 2 is characterized in that, in the step of the network model information of determining this integrated circuit electricity supply network, further
Convert all voltage sources of power supply source model in the network model information to current source;
The compound direction of current that receives current source model in the recognition network model information.
4. method according to claim 2 is characterized in that, is utilizing described adjacency list relation to make up in the step of the supply network topological diagram that comprises a plurality of independent electronic circuits, further comprises:
Step 21 adopts and looks into collection the circuit node of setting attribute in the described adjacency list relation is carried out equivalence, and the circuit node of described setting attribute comprises that short circuit or through hole resistance are less than the circuit node of setting value;
Step 22 merges the current source that receives of carry on the primary circuit node of the circuit node representative after each equivalence;
Step 23 is created as the circuit node after each equivalence of carrying out after the described step 22 and is connected topological diagram with not uncared-for resistance;
Step 24, employing depth-first search algorithm identified goes out each independent electronic circuit of no electric connecting relation in the described connection topological diagram, to obtain the supply network topological diagram.
5. according to each described method in the claim 1 to 4, it is characterized in that, in described analytical procedure, further comprise:
Step 31 for each electronic circuit in the described supply network topological diagram, in the 0th moment, is carried out the DC operation point analysis to this electronic circuit;
Step 32 in the 1st moment, adopts Euler's discrete differential method to make up about transient analysis matrix and right-hand vector under the RLC model of this electronic circuit, and the circuit node voltage of finding the solution the 1st moment that obtains this electronic circuit then distributes;
Step 33 at other constantly, adopts trapezoidal discrete differential method to make up about each transient analysis matrix and the right-hand vector constantly under the RLC model of this electronic circuit, finds the solution then and obtains distributing at each circuit node voltage constantly of this electronic circuit.
6. method according to claim 5 is characterized in that, in described step 31, further comprises:
Ignore energy-storage travelling wave tubes all in this electronic circuit, make up static analysis matrix and right-hand vector about this electronic circuit;
Utilize the iterative device to find the solution to obtain this electronic circuit to distribute at the 0th constantly circuit node voltage, preferably utilize the AMGPCG solver.
7. method according to claim 5 is characterized in that, in described step 32, utilizes following formula to represent to adopt Euler's discrete differential method to make up about transient analysis matrix and right-hand vector under the RLC model of this electronic circuit,
Wherein, n is the circuit node number of supply network, v
n(t) and v
n(t+h) be the t moment and t+h circuit node voltage vector constantly respectively, i
l(t) be the current vector that t flows through inductive branch constantly, i
i(t+h) be that t+h receives the current source vector constantly, and
Wherein G is diagonal matrix, and its diagonal entry is the electric conductivity value of each resistance in the RLC model, and C also is diagonal matrix, its diagonal entry is the capacitance of each electric capacity in the RLC model, L also is diagonal matrix, and its diagonal entry is the inductance value of each inductance in the RLC model, and A
g, A
c, A
lAnd A
iBe the topological matrix of describing each element annexation, its every row has two non-zero entry at most, its subscript g, and c, l and i represent to be connected to the branch road of resistance, electric capacity, inductance and independent current respectively;
Utilize the iterative device to find the solution to obtain the 1st constantly circuit node voltage to distribute, preferably utilize the AMGPCG solver.
8. method according to claim 5 is characterized in that, in described step 33, utilizes following formula to represent to adopt trapezoidal discrete differential method to make up about each transient analysis matrix and the right-hand vector constantly under the RLC model of this electronic circuit,
Wherein, v
n(t) and v
n(t+h) be the t moment and t+h circuit node voltage vector constantly respectively, i
l(t) be the current vector that t flows through inductive branch constantly, i
i(t) and i
i(t+h) be respectively that the t moment and t+h receive the current source vector constantly, and
Wherein G is diagonal matrix, and its diagonal entry is the electric conductivity value of each resistance in the RLC model, and C also is diagonal matrix, its diagonal entry is the capacitance of each electric capacity in the RLC model, L also is diagonal matrix, and its diagonal entry is the inductance value of each inductance in the RLC model, and A
g, A
c, A
lAnd A
iBe the topological matrix of describing each element annexation, its every row has two non-zero entry at most, its subscript g, and c, l and i represent to be connected to the branch road of resistance, electric capacity, inductance and independent current respectively;
Utilize direct solver to find the solution and obtain each circuit node voltage distribution constantly, preferably utilize the Cholmod solver.
9. transient analysis system under the integrated circuit electricity supply network population parameter model is characterized in that, comprising:
Population parameter model information determination module, it determines the population parameter model information of integrated circuit electricity supply network to be analyzed;
Network topological diagram is set up module, and it sets up the supply network topological diagram that comprises a plurality of independent electronic circuits based on described population parameter model information;
Analysis module, it carries out DC operation point analysis and transient analysis and obtains each electronic circuit and distribute at each circuit node voltage constantly each electronic circuit in the described supply network topological diagram is parallel.
10. system according to claim 9 is characterized in that,
By the SPICE net table of integrated circuit electricity supply network to be analyzed being scanned to determine the population parameter model information of this integrated circuit electricity supply network;
The adjacency list of setting up between circuit component and the circuit node based on described population parameter model information concerns, utilizes described adjacency list relation to make up the supply network topological diagram that comprises a plurality of independent electronic circuits then.
11. according to claim 9 or 10 described systems, it is characterized in that, in described analysis module, further comprise:
The dc point analytic unit, it in the 0th moment, carries out DC operation point analysis to this electronic circuit for each electronic circuit in the described supply network topological diagram;
The transient analysis unit, it adopts Euler's discrete differential method to make up about transient analysis matrix and right-hand vector under the RLC model of this electronic circuit in the 1st moment, and the circuit node voltage of finding the solution the 1st moment that obtains this electronic circuit then distributes, and,
At other constantly, adopt trapezoidal discrete differential method to make up about each transient analysis matrix and the right-hand vector constantly under the RLC model of this electronic circuit, find the solution then and obtain distributing at each circuit node voltage constantly of this electronic circuit.
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