CN105258795B - A kind of electric capacity trans-impedance amplifier circuit with pure digi-talization output for faint light detection - Google Patents
A kind of electric capacity trans-impedance amplifier circuit with pure digi-talization output for faint light detection Download PDFInfo
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- CN105258795B CN105258795B CN201510665728.0A CN201510665728A CN105258795B CN 105258795 B CN105258795 B CN 105258795B CN 201510665728 A CN201510665728 A CN 201510665728A CN 105258795 B CN105258795 B CN 105258795B
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Abstract
The invention belongs to optical detection field, a kind of more particularly to electric capacity trans-impedance amplifier circuit with pure digi-talization output for faint light detection, including signal generating circuit, optical detection circuit and two-stage phase inverter based on CTIA, and it is sequentially connected, signal generating circuit includes sampled signal SELECT circuits and square wave reset signal RESET circuits, the input input original square wave signal of sampled signal SELECT circuits, original square wave signal gives an input of XOR gate after the first delay cell, another input of XOR gate is then original square wave signal, the pulse letter of XOR gate output is made to obtain sampled signal SELECT with computing again with original square wave signal, square wave reset signal RESET is obtained by original square wave signal by three-level delay cell.Beneficial effects of the present invention:By new CT IA structures, when detecting faint light, it is possible to achieve pure digi-talization exports, and is easy to subsequent conditioning circuit to be handled.
Description
Technical field
The invention belongs to optical detection field, more particularly to a kind of electric capacity with pure digi-talization output for faint light detection
Trans-impedance amplifier circuit.
Background technology
It is cumulative towards integrated circuit and information system sensitive information acquisition methods day with reaching its maturity for microelectric technique
It is more, it generally can be divided into non-invasive attack and invasive attack.Wherein, invasive attack passes through the means such as uncap, drill, corroding
Destruction to chip package is realized, using taking pictures and the important information such as technology, extraction domain, password such as microprobe, and encapsulate
Destruction can then be such that chip is placed under illumination.Therefore, in order to strengthen the anti-attack ability of chip or system, often design micro-
Weak photodetector sensing such as is uncapped, drilled at the information, and pre-warning signal is provided for chip or system.
It is likely to occur in view of uncapping, drilling etc. under faint light intensity, therefore designed photo-detector must be realized
Intensity of illumination sends alarm signal when being more than a certain faint light intensity.And under faint light photograph, caused photogenerated current is smaller, dark electricity
Stream has a great influence to it, therefore considers to realize the detection to intensity of illumination using electric capacity trans-impedance amplifier (CTIA) structure.
Common such as Fig. 1 of the optical detection circuit based on CTIA, it is one be made up of amplifier and feedback capacity and switch
Kind resets integral form optical detection circuit, and detector utilizes the photoproduction Ford effect of semiconductor, i.e., when the PN junction light of certain wavelength
During irradiation, because Built-in potential field produces photovoltage inside PN junction, if PN junction is accessed in loop, that is, photoproduction occurs
The phenomenon of electric current.Its principle is summarized as follows:When RESET signal is high, S is switched0Conducting, into reset mode, electric capacity C0Answered
Position, now SELECT is low to switch S1Disconnect, C1The integrated value of a upper in store upper integration time;When RESET signal is low
When, switch S0Disconnect, SELECT signal is height, switchs S0Closure, into integral mode, C1On voltage persistently rise, under
Untill one reset cycle starts, output waveform such as Fig. 2 of the common optical detection circuit based on CTIA.In order to which the waveform is turned
The signal of low and high level formula is changed into, generally in switch S1Below plus two-stage phase inverter such as Fig. 3, light intensity magnitude are embodied in pwm signal
Dutycycle on, dutycycle it is bigger explanation intensity of illumination it is stronger.The structure exports the side for dutycycle 50% in critical light intensity
Ripple, and output is low level when under critical light intensity, output waveform such as Fig. 4.
Compared to the optical detection circuit based on CTIA, add the circuit structure after two-stage phase inverter that there is output signal for digitlization
The advantages of PWM.But because the purposes of the circuit is detection faint light, for the ease of processing of the subsequent conditioning circuit to alarm signal, reason
The output alarm signal thought exports for pure digi-talization, and pwm signal then needs to use counter etc. to be converted into duty cycle information
High level or low level signal, and so do and on the one hand add system complexity, on the other hand add system power dissipation.Cause
This needs the CTIA structures that a kind of novel belt pure digi-talization for faint light detection exports.
The content of the invention
For the above mentioned problem to be solved, the present invention provides a kind of electric capacity with pure digi-talization output for faint light detection
Trans-impedance amplifier circuit.
Technical scheme:A kind of electric capacity trans-impedance amplifier electricity with pure digi-talization output for faint light detection
Road, it is characterised in that optical detection circuit and two-stage phase inverter including signal generating circuit, based on CTIA, the signal produce electricity
Road, the optical detection circuit of the basic CTIA and the two-stage phase inverter are sequentially connected, and the signal generating circuit includes being used for
Produce the sampled signal SELECT circuits and square wave reset signal RESET circuits of spike formula.
The input input original square wave signal of the sampled signal SELECT circuits, the original square wave signal is by the
An input of XOR gate is given after one-level delay is single, another input of the XOR gate is then believed for the original square wave
Number, the XOR gate output is pulse signal, and the frequency of the pulse signal is 2 times of the original square wave signal, the arteries and veins
The pulse width for rushing signal is determined by first delay unit;The pulse signal is made and transported with the original square wave signal again
Calculation obtains sampled signal SELECT, and the sampled signal SELECT has and the original square wave signal same frequency, the sampling
Signal SELECT and the original square wave signal rising edge reach simultaneously.
The square wave reset signal RESET circuit input ends input the original square wave signal, the original square wave signal
Square wave reset signal RESET signal, the square wave are produced by the first delay unit, the second delay unit and the 3rd delay unit
Reset signal RESET rising edge prolongs with the delay unit of time difference second of the trailing edge of the sampled signal SELECT and the 3rd
It is delayed caused by Shi Danyuan.
First delay unit, second delay unit and the 3rd delay unit are single for same unit or Bu Tong
Member.Beneficial effects of the present invention:By new CT IA structures, when detecting faint light, it is possible to achieve pure digi-talization exports, just
Handled in subsequent conditioning circuit.
Brief description of the drawings
Fig. 1 is the structural representation of the common optical detection circuit based on CTIA.
Fig. 2 is Fig. 1 output waveform.
Fig. 3 is the structural representation of the CTIA structures with two-stage phase inverter.
Fig. 4 is Fig. 3 output waveform.
Fig. 5 is the structural representation of circuit of the present invention.
Fig. 6 is the timing diagram under strong light of the invention.
Fig. 7 is the timing diagram under dim light of the present invention.
Fig. 8 be the present invention it is unglazed under timing diagram.
Fig. 9 is the structural representation of the signal generating circuit of the present invention.
Figure 10 is the structural representation of delay cell in Fig. 9.
Embodiment
A kind of 1 pair of embodiment of the invention is explained below in conjunction with the accompanying drawings.
The present invention relates to a kind of electric capacity trans-impedance amplifier circuit with pure digi-talization output for faint light detection, it is special
Sign is to include signal generating circuit, the optical detection circuit based on CTIA and two-stage phase inverter, signal generating circuit, basic CTIA
Optical detection circuit and two-stage phase inverter be sequentially connected.
Signal generating circuit includes being used for the sampled signal SELECT circuits and square wave reset signal for producing spike formula
RESET circuits.The input input original square wave signal of sampled signal SELECT circuits, original square wave signal prolong by the first order
An input of XOR gate is given after Shi Dan, another input of XOR gate is then original square wave signal, and XOR gate exports
For pulse signal, the frequency of pulse signal is 2 times of original square wave signal, and the pulse width of pulse signal is by the first delay unit
Determine;Pulse signal is made to obtain sampled signal SELECT with computing again with original square wave signal, sampled signal SELECT have and
Original square wave signal same frequency, sampled signal SELECT and original square wave signal rising edge reach simultaneously.
Square wave reset signal RESET circuit input ends input original square wave signal, and original square wave signal is by the first delay
Unit, the second delay unit and the 3rd delay unit produce square wave reset signal RESET signal, square wave reset signal RESET's
It is delayed caused by rising edge and the delay unit of time difference second and the 3rd delay unit of sampled signal SELECT trailing edge.The
One delay unit, the second delay unit and the 3rd delay unit are same unit or different units.
Specifically, Fig. 5 is the structural representation of circuit of the present invention, the electricity with pure digi-talization output for faint light detection
Hold trans-impedance amplifier circuit, including signal generating circuit, the optical detection circuit based on CTIA and two-stage phase inverter, signal produces electricity
Road is used for the sampled signal SELECT circuits of one spike formula of generation and the square wave reset signal RESET circuits by delay.
Wherein the turnover voltage of first order phase inverter is VTH。
Fig. 6 is the timing diagram under light of the invention strong, and Fig. 7 is the timing diagram under dim light of the present invention, Fig. 8 be the present invention it is unglazed under
Timing diagram.In T1Moment, reset signal RESET are changed into high, switch S0Closure, electric capacity C0Both end voltage resets, and is VREF, this
When S1It is off, C1Keep the magnitude of voltage at last moment, thus output valve VOUTIt will keep constant in reseting stage;In T2
Moment, reset signal RESET are changed into low level, reset switch S from high level0Disconnect, into integration phase, due to amplifier A1's
Empty short resolution, photoelectric current will pass through C as caused by PN junction0Integration, causes A1Output end voltage VC0Rise, now due to opening
Close S1Disconnect, C1On voltage VC1Remain in that initial value;In T3Moment, sampled signal SELECT are changed into high level, switch S1Close
Close, electric capacity C0And C1Redistributing for electric charge occurs so that moment VC0And VC1It is equal, and equal between originally therebetween one
Individual value;In T4At the moment, sampled signal SELECT step-downs, switch S1Disconnect, due to reset signal RESET remain as it is low, photoelectric current after
Continue to C0Charging, therefore VC0Continue to rise, and VC1Then stop rising and keep T4The value at moment is constant.To T5At the moment, reset letter
Number RESET is uprised, VC0It is changed into V againREF, and VC1Remain in that.If photogenerated current is sufficiently large, T4Before, VC1It will be greater than A2Threshold
Threshold voltage VTHSo that output VOUTFor high level, and keep whole cycle.Structure follows I*T/2=Q=C*U, wherein, I serves as reasons
The size of photoelectric current caused by photodiode, its size are determined that T/2 is the time of integration by the area of light intensity and diode,
It it is exactly the half period, Q is the quantity of electric charge change at electric capacity both ends, and C is electric capacity C0Capacitance, U is electric capacity C0The change of both end voltage difference.
When the I in formula is the photoelectric current of threshold light strong production, U VTH-VREF.C size and the sensitivity of photo-detector have closely
Relation, U and the timing of T mono-, C is smaller, and I is smaller, and detector is sensitiveer.By adjust the size of integrating capacitor, PN junction area,
VTH-VREFAnd the cycle of RESET square-wave signals can adjust the size of photoelectric current caused by PN junction, enable the structure to micro-
Weak Critical Light is detected.
Such as the structural representation of the signal generating circuit of Fig. 9 present invention, sampled signal SELECT inputs are believed for original square wave
Number, original square wave signal gives an input of XOR gate, another input of XOR gate by first order delay unit afterwards
End is then the original square wave signal, and XOR gate is exported as the pulse signal that a frequency is 2 times of original square wave signal frequency, pulse
Width is determined by delay unit.Pulse signal makees with original square wave signal and computing, and what is obtained is to have and original square wave letter
The sampled signal SELECT of number same frequency, sampled signal SELECT and original square wave signal rising edge reach simultaneously;Square wave is answered
Position signal RESET circuits are that original square wave signal prolongs by the first delay unit, the second delay unit, the 3rd delay unit three-level
Shi Danyuan produces square wave reset signal RESET, square wave reset signal RESET rising edge and sampled signal SELECT trailing edge
Time difference be delayed caused by two delay units.Delay unit as shown in Figure 10, rise the element of main time-lag action for R and
C, be delayed τ ≈ R*C, by rationally setting R and C value, can obtain certain delay time.The three-level delay shown in Fig. 9
Unit is identical, but in a practical situation, R the and C values in three-level delay unit can be different, pass through Reasonable adjustment delays at different levels
The R and C of unit value, default spike width T can be obtained4-T3And spike trailing edge and RESET signal rising edge
Between time spacing T5-T4。
, it is necessary to which extraneous provide a CLK clock signal and V in specific work processREFReference voltage.In actual test
, can be by adjusting frequency, the V of CLK signal during faint Critical LightREFSize adjust the threshold value light intensity of faint Critical Light.
CLK frequency should be chosen properly, can increase system power dissipation if too big, when can then increase the response of photo-detector if too small
Between.When being tested after setting threshold limit value light intensity, light intensity, which exceedes threshold value light intensity, can export high level, and light intensity is less than threshold value
Light intensity can then export low level.
An example of the present invention is described in detail above, but the content is only the preferable implementation of the present invention
Example, it is impossible to be considered as the practical range for limiting the present invention.All equivalent changes made according to the present patent application scope and improvement
Deng, all should still belong to the present invention patent covering scope within.
Claims (2)
1. a kind of electric capacity trans-impedance amplifier circuit with pure digi-talization output for faint light detection, it is characterised in that including letter
Number generation circuit, the optical detection circuit based on CTIA and two-stage phase inverter, the signal generating circuit, the light based on CTIA
Detection circuit and the two-stage phase inverter are sequentially connected, and the signal generating circuit includes being used for the sampling letter for producing spike formula
Number SELECT circuits and square wave reset signal RESET circuits;
The input input original square wave signal of the sampled signal SELECT circuits, the original square wave signal prolong by first
An input of XOR gate is given after Shi Danyuan, another input of the XOR gate is then the original square wave signal,
The XOR gate output is pulse signal, and the frequency of the pulse signal is 2 times of the original square wave signal, the pulse letter
Number pulse width determined by first delay unit;The pulse signal is made to obtain with computing with the original square wave signal again
There is frequency identical with the original square wave signal, the sampling letter to sampled signal SELECT, the sampled signal SELECT
Number SELECT and the original square wave signal rising edge reach simultaneously;
The square wave reset signal RESET circuit input ends input the original square wave signal, and the original square wave signal passes through
First delay unit, the second delay unit and the 3rd delay unit produce square wave reset signal RESET signal, and the square wave resets
The time difference of signal RESET rising edge and the trailing edge of the sampled signal SELECT is second delay unit and described
It is delayed caused by 3rd delay unit.
A kind of 2. electric capacity trans-impedance amplifier electricity with pure digi-talization output for faint light detection according to claim 1
Road, it is characterised in that first delay unit, second delay unit and the 3rd delay unit be same unit or
Different units.
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CN106248211A (en) * | 2016-08-24 | 2016-12-21 | 中国科学院西安光学精密机械研究所 | Light path self-coupling method, polarization interference device and polarization interference matching method |
CN106225924B (en) * | 2016-09-30 | 2018-01-26 | 京东方科技集团股份有限公司 | A kind of light-intensity test unit, light intensity detector and its detection method, display device |
CN106950429A (en) * | 2017-02-27 | 2017-07-14 | 广州市香港科大霍英东研究院 | A kind of position signalling fast decoding method and system |
CN209285376U (en) * | 2018-09-05 | 2019-08-23 | 江苏美的清洁电器股份有限公司 | A kind of signal processing circuit and device, dust catcher |
CN111337905B (en) * | 2020-03-20 | 2021-12-28 | 东南大学 | Dual-mode focal plane pixel-level circuit based on CTIA and implementation method |
WO2022027587A1 (en) * | 2020-08-07 | 2022-02-10 | 深圳市汇顶科技股份有限公司 | Laser fault injection attack detection circuit for chip, and security chip |
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CN101533636B (en) * | 2009-01-09 | 2014-06-18 | 瑞声声学科技(常州)有限公司 | Low current signal amplifier |
FR2950480B1 (en) * | 2009-09-22 | 2011-11-25 | Soc Fr Detecteurs Infrarouges Sofradir | DETECTION CIRCUIT WITH IMPROVED ANTI-GLOWING CIRCUIT |
IL212289A (en) * | 2011-04-13 | 2016-08-31 | Semi-Conductor Devices - An Elbit Systems - Rafael Partnership | Detector pixel signal readout circuit and an imaging method thereof |
CN202261578U (en) * | 2011-09-23 | 2012-05-30 | 东南大学 | Active passive imaging reading circuit of avalanche photo diode (APD) array |
US9172873B2 (en) * | 2012-06-01 | 2015-10-27 | Forza Silicon Corporation | CTIA in-pixel correlated double sampling with snapshot operation for IR readout integrated circuits |
US9787923B2 (en) * | 2014-01-13 | 2017-10-10 | Intrinsix Corporation | Correlated double sampled (CDS) pixel sense amplifier |
CN104539857B (en) * | 2014-12-26 | 2018-02-27 | 电子科技大学 | Photoelectric current reading circuit and adaptive light intensity imaging array circuit and its control method |
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