CN105258795A - Capacitive trans-impedance amplifier circuit with pure digital output for weak light detection - Google Patents
Capacitive trans-impedance amplifier circuit with pure digital output for weak light detection Download PDFInfo
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- CN105258795A CN105258795A CN201510665728.0A CN201510665728A CN105258795A CN 105258795 A CN105258795 A CN 105258795A CN 201510665728 A CN201510665728 A CN 201510665728A CN 105258795 A CN105258795 A CN 105258795A
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Abstract
The invention belongs to the field of optical detection, and particularly relates to a capacitive trans-impedance amplifier circuit with pure digital output for weak light detection. The capacitive trans-impedance amplifier circuit comprises a signal generating circuit, a CTIA-based optical detecting circuit and a two-stage inverter; and furthermore the signal generating circuit, the CTIA-based optical detecting circuit and the two-stage inverter are successively connected. The signal generating circuit comprises a sampling signal SELECT circuit and a square wave reset signal RESET circuit. An original square wave signal is input into the input end of the sampling signal SELECT circuit. The original square wave signal is transmitted to a first delay unit and then is transmitted to one input end of an XOR gate, and the original square wave signal is input to the other input end of the XOR gate. AND operation between the pulse signal which is output from the XOR gate and the original square wave signal is performed for obtaining a sampling signal SELECT. The square wave reset signal RESET is obtained from the original square wave signal through a three-stage delay unit. The capacitive trans-impedance amplifier circuit is advantageous in that pure digital output can be realized in detecting the weak light, thereby facilitating processing by a following circuit.
Description
Technical field
The invention belongs to photodetection field, particularly relate to the electric capacity trans-impedance amplifier circuit that a kind of band pure digi-talization for faint light detection exports.
Background technology
Along with reaching its maturity of microelectric technique, day by day increase towards integrated circuit and infosystem sensitive information acquisition methods, non-invasive generally can be divided into attack and invasive attack.Wherein, the destruction that invasive is attacked by uncapping, holing, the means such as corrosion realize chip package, utilize and take pictures and the technology such as microprobe, extract the important information such as domain, password, the destruction of encapsulation then can make chip be placed under illumination.Therefore, in order to strengthen the anti-attack ability of chip or system, often design the information such as dim light detector sensing is uncapped, boring, for chip or system provide early warning signal.
Consider uncap, boring etc. may occur under faint light intensity, therefore designed photo-detector must realize sending alerting signal when intensity of illumination is greater than a certain faint light intensity.And under faint light is shone, the photogenerated current of generation is less, dark current is comparatively large on its impact, therefore considers to use the detection of electric capacity trans-impedance amplifier (CTIA) structure realization to intensity of illumination.
The common photodetection circuit based on CTIA is as Fig. 1, it is the one reset integral form photodetection circuit be made up of amplifier and feedback capacity and switch, detector utilizes the photoproduction Ford effect of semiconductor, namely when PN junction is penetrated with the illumination of certain wavelength, because Built-in potential field produces photovoltage in PN junction inside, if accessed by PN junction in loop, namely there will be the phenomenon of photogenerated current.Its principle is summarized as follows: when RESET signal is high, switch S
0conducting, enters reset mode, electric capacity C
0be reset, now SELECT is low, switch S
1disconnect, C
1the integrated value of a upper in store upper integration time; When RESET signal is low, switch S
0disconnect, SELECT signal is high, switch S
0closed, enter integral mode, C
1on voltage keeps rise, until the next reset cycle, the output waveform of the common photodetection circuit based on CTIA is as Fig. 2.In order to this waveform transformation being become the signal of low and high level formula, usually in switch S
1add two-stage phase inverter below as Fig. 3, light intensity magnitude is embodied in the dutycycle of pwm signal, and dutycycle larger explanation intensity of illumination is stronger.This structure exports the square wave for dutycycle 50% when critical light intensity, and exports as low level time under critical light intensity, and output waveform is as Fig. 4.
Compare the photodetection circuit based on CTIA, the circuit structure added after two-stage phase inverter has the advantage of output signal for Digital PWM.But the purposes due to this circuit is detection faint light, for the ease of the process of subsequent conditioning circuit to alerting signal, desirable output alarm signal is that pure digi-talization exports, pwm signal then needs to use counter etc. to convert duty cycle information to high level or low level signal, and do like this and on the one hand add system complexity, add system power dissipation on the other hand.Therefore the CTIA structure that a kind of Novel belt pure digi-talization for faint light detection exports is needed.
Summary of the invention
For the problems referred to above that will solve, the invention provides the electric capacity trans-impedance amplifier circuit that a kind of band pure digi-talization for faint light detection exports.
Technical scheme of the present invention: the electric capacity trans-impedance amplifier circuit that a kind of band pure digi-talization for faint light detection exports, it is characterized in that comprising signal generating circuit, based on the photodetection circuit of CTIA and two-stage phase inverter, described signal generating circuit, described basic CTIA circuit are connected successively with described two-stage phase inverter.
Described signal generating circuit comprises sampled signal SELECT circuit for generation of spike pulse formula and square wave reset signal RESET circuit.
The input end input original square wave signal of described sampled signal SELECT circuit, described original square wave signal gives an input end of XOR gate after first postpones list, another input end of described XOR gate is then described original square wave signal, described XOR gate exports as pulse signal, the frequency of described pulse signal is 2 times of described original square wave signal, and the pulse width of described pulse signal is determined by described first delay cell; Described pulse signal is done with described original square wave signal to obtain sampled signal SELECT with computing again, described sampled signal SELECT has and described original square wave signal same frequency, and the rising edge of described sampled signal SELECT and described original square wave signal arrives simultaneously.
Described square wave reset signal RESET circuit input end inputs described original square wave signal, described original square wave signal produces square wave reset signal RESET through the first delay cell, the second delay cell and the 3rd delay cell, the delay that mistiming second delay cell of the rising edge of described square wave reset signal RESET and the negative edge of described sampled signal SELECT and the 3rd delay cell cause.
Described first delay cell, described second delay cell and described 3rd delay cell are same unit or different units.Beneficial effect of the present invention: by this new CT IA structure, when detecting faint light, can realize pure digi-talization and exporting, being convenient to subsequent conditioning circuit and processing.
Accompanying drawing explanation
Fig. 1 is the structural representation of the common photodetection circuit based on CTIA.
Fig. 2 is the output waveform of Fig. 1.
Fig. 3 is the structural representation of the CTIA structure of band two-stage phase inverter.
Fig. 4 is the output waveform of Fig. 3.
Fig. 5 is the structural representation of circuit of the present invention.
Fig. 6 is the sequential chart under high light of the present invention.
Fig. 7 is the sequential chart under the low light level of the present invention.
Fig. 8 be the present invention unglazed under sequential chart.
Fig. 9 is the structural representation of signal generating circuit of the present invention.
Figure 10 is the structural representation of delay cell in Fig. 9.
Embodiment
Below in conjunction with accompanying drawing 1, a kind of embodiment of the present invention is explained.
The present invention relates to the electric capacity trans-impedance amplifier circuit that a kind of band pure digi-talization for faint light detection exports, it is characterized in that comprising signal generating circuit, based on the photodetection circuit of CTIA and two-stage phase inverter, signal generating circuit, basic CTIA circuit are connected successively with two-stage phase inverter.
Signal generating circuit comprises sampled signal SELECT circuit for generation of spike pulse formula and square wave reset signal RESET circuit.The input end input original square wave signal of sampled signal SELECT circuit, original square wave signal gives an input end of XOR gate after first postpones list, another input end of XOR gate is then original square wave signal, XOR gate exports as pulse signal, the frequency of pulse signal is 2 times of original square wave signal, and the pulse width of pulse signal is determined by the first delay cell; Pulse signal is done with original square wave signal to obtain sampled signal SELECT with computing again, and sampled signal SELECT has and original square wave signal same frequency, and the rising edge of sampled signal SELECT and original square wave signal arrives simultaneously.
Square wave reset signal RESET circuit input end input original square wave signal, original square wave signal produces square wave reset signal RESET through the first delay cell, the second delay cell and the 3rd delay cell, the delay that mistiming second delay cell of the rising edge of square wave reset signal RESET and the negative edge of sampled signal SELECT and the 3rd delay cell cause.First delay cell, the second delay cell and the 3rd delay cell are same unit or different units.
Particularly, Fig. 5 is the structural representation of circuit of the present invention, for the electric capacity trans-impedance amplifier circuit that the band pure digi-talization of faint light detection exports, comprise signal generating circuit, based on the photodetection circuit of CTIA and two-stage phase inverter, signal generating circuit is for generation of the sampled signal SELECT circuit of a spike pulse formula and the square wave reset signal RESET circuit through postponing.Wherein the turnover voltage of the first phase inverter is V
tH.
Fig. 6 is the sequential chart under high light of the present invention, and Fig. 7 is the sequential chart under the low light level of the present invention, Fig. 8 be the present invention unglazed under sequential chart.At T
1in the moment, square wave reset signal RESET becomes height, switch S
0closed, electric capacity C
0both end voltage resets, and is V
rEF, now S
1be in off-state, C
1keep the magnitude of voltage in last moment, thus output valve V
oUTto remain unchanged at reseting stage; At T
2in the moment, square wave reset signal RESET becomes low level from high level, reset switch S
0disconnect, enter integration phase, due to amplifier A
1the short resolution of void, the photocurrent produced by PN junction will pass through C
0integration, causes A
1output end voltage V
c0rise, now due to switch S
1disconnect, C
1on voltage V
c1still initial value is kept; At T
3in the moment, sampled signal SELECT becomes high level, switch S
1closed, electric capacity C
0and C
1there is redistributing of electric charge, make moment V
c0and V
c1equal, and equal between an original value therebetween; At T
4moment, sampled signal SELECT step-down, switch S
1disconnect, because square wave reset signal RESET is still low, photocurrent continues C
0charging, therefore V
c0continue to rise, and V
c1then stop rising and keeping T
4the value in moment is constant.To T
5in the moment, square wave reset signal RESET uprises, V
c0become V again
rEF, and V
c1still keep.If photogenerated current is enough large, T
4before, V
c1a will be greater than
2threshold voltage V
tH, make to export V
oUTfor high level, and keep the whole cycle.Structure follows I*T/2=Q=C*U, and wherein, I is the size of the photocurrent produced by photodiode, and its size is determined by the area of light intensity and diode, and T/2 is integral time, namely semiperiod, and Q is the quantity of electric charge change at electric capacity two ends, and C is electric capacity C
0capacitance, U is electric capacity C
0the change of both end voltage difference.When the I in formula is the photocurrent of threshold light strong production, U is V
tH-V
rEF.The size of C and the sensitivity of photo-detector have close relationship, U and T mono-timing, C is less, and I is less, and detector is sensitiveer.By regulating size, PN junction area, the V of integrating capacitor
tH-V
rEFand the size of the cycle of the square wave reset signal RESET photocurrent that PN junction can be regulated to produce, make this structure be able to detect faint Critical Light.
The structural representation of signal generating circuit as of the present invention in Fig. 9, sampled signal SELECT is input as original square wave signal, original square wave signal gives an input end of XOR gate after the first delay cell, another input end of XOR gate is then this original square wave signal, the pulse signal of original square wave signal frequency 2 times that XOR gate exports that to be a frequency be, pulse width is determined by delay cell.Pulse signal and original square wave signal are done and computing, and what obtain is have the sampled signal SELECT with original square wave signal same frequency, and the rising edge of sampled signal SELECT and original square wave signal arrives simultaneously; Square wave reset signal RESET circuit is that original square wave signal obtains through the first delay cell, the second delay cell and the 3rd delay cell three grades of delay cells, and the mistiming of the rising edge of square wave reset signal RESET and the negative edge of sampled signal SELECT is the delay that two delay cell causes.Delay cell as shown in Figure 10, the element playing dominating delay effect is R and C, postponing τ ≈ R*C, by rationally arranging the value of R and C, just can obtain certain time delay.Shown in Fig. 9 three grade delay cell is identical, but in a practical situation, R and the C value in three grades of delay cells can be different, by the value of R and C of Reasonable adjustment delay cell at different levels, can obtain default spike pulse width T
4-T
3and the time interval T between spike pulse negative edge and RESET signal rising edge
5-T
4.
In specific works process, the external world is needed to provide a CLK clock signal and V
rEFreference voltage.When reality tests faint Critical Light, can by regulating frequency, the V of CLK signal
rEFsize regulate the threshold value light intensity of faint Critical Light.The frequency of CLK should choose suitable, too large words can increase system power dissipation, and too little words then can increase the response time of photo-detector.When testing after setting threshold limit value light intensity, light intensity exceedes threshold value light intensity can export high level, and light intensity is less than threshold value light intensity then can output low level.
Above an example of the present invention has been described in detail, but described content being only preferred embodiment of the present invention, can not being considered to for limiting practical range of the present invention.All equalizations done according to the present patent application scope change and improve, and all should still belong within patent covering scope of the present invention.
Claims (5)
1. the electric capacity trans-impedance amplifier circuit that exports of the band pure digi-talization for faint light detection, it is characterized in that comprising signal generating circuit, based on the photodetection circuit of CTIA and two-stage phase inverter, described signal generating circuit, described basic CTIA circuit are connected successively with described two-stage phase inverter.
2. the electric capacity trans-impedance amplifier circuit that exports of a kind of band pure digi-talization for faint light detection according to claim 1, is characterized in that described signal generating circuit comprises sampled signal SELECT circuit for generation of spike pulse formula and square wave reset signal RESET circuit.
3. the electric capacity trans-impedance amplifier circuit that exports of a kind of band pure digi-talization for faint light detection according to claim 2, it is characterized in that the input end input original square wave signal of described sampled signal SELECT circuit, described original square wave signal gives an input end of XOR gate after the first delay cell, another input end of described XOR gate is then described original square wave signal, described XOR gate exports as pulse signal, the frequency of described pulse signal is 2 times of described original square wave signal, the pulse width of described pulse signal is determined by described first delay cell, described pulse signal is done with described original square wave signal to obtain sampled signal SELECT with computing again, described sampled signal SELECT has and described original square wave signal same frequency, and the rising edge of described sampled signal SELECT and described original square wave signal arrives simultaneously.
4. the electric capacity trans-impedance amplifier circuit that exports of a kind of band pure digi-talization for faint light detection according to claim 2, it is characterized in that described square wave reset signal RESET circuit input end inputs described original square wave signal, described original square wave signal produces square wave reset signal RESET through the first delay cell, the second delay cell and the 3rd delay cell, and the mistiming of the rising edge of described square wave reset signal RESET and the negative edge of described sampled signal SELECT is the delay that described second delay cell and described 3rd delay cell cause.
5. the electric capacity trans-impedance amplifier circuit that exports of a kind of band pure digi-talization for faint light detection according to claim 4, is characterized in that described first delay cell, described second delay cell and described 3rd delay cell are same unit or different units.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510665728.0A CN105258795B (en) | 2015-10-15 | 2015-10-15 | A kind of electric capacity trans-impedance amplifier circuit with pure digi-talization output for faint light detection |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510665728.0A CN105258795B (en) | 2015-10-15 | 2015-10-15 | A kind of electric capacity trans-impedance amplifier circuit with pure digi-talization output for faint light detection |
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|---|---|
| CN105258795A true CN105258795A (en) | 2016-01-20 |
| CN105258795B CN105258795B (en) | 2018-01-09 |
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Cited By (6)
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| CN106225924A (en) * | 2016-09-30 | 2016-12-14 | 京东方科技集团股份有限公司 | A kind of light-intensity test unit, light intensity detector and detection method, display device |
| CN106248211A (en) * | 2016-08-24 | 2016-12-21 | 中国科学院西安光学精密机械研究所 | Light path self-coupling method, polarization interference device and polarization interference matching method |
| CN106950429A (en) * | 2017-02-27 | 2017-07-14 | 广州市香港科大霍英东研究院 | A kind of position signalling fast decoding method and system |
| WO2020048404A1 (en) * | 2018-09-05 | 2020-03-12 | 江苏美的清洁电器股份有限公司 | Signal processing circuit and device, and vacuum cleaner |
| CN111337905A (en) * | 2020-03-20 | 2020-06-26 | 东南大学 | Dual-mode focal plane pixel-level circuit based on CTIA and implementation method |
| WO2022027587A1 (en) * | 2020-08-07 | 2022-02-10 | 深圳市汇顶科技股份有限公司 | Laser fault injection attack detection circuit for chip, and security chip |
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| WO2020048404A1 (en) * | 2018-09-05 | 2020-03-12 | 江苏美的清洁电器股份有限公司 | Signal processing circuit and device, and vacuum cleaner |
| CN111337905A (en) * | 2020-03-20 | 2020-06-26 | 东南大学 | Dual-mode focal plane pixel-level circuit based on CTIA and implementation method |
| CN111337905B (en) * | 2020-03-20 | 2021-12-28 | 东南大学 | Dual-mode focal plane pixel-level circuit based on CTIA and implementation method |
| WO2022027587A1 (en) * | 2020-08-07 | 2022-02-10 | 深圳市汇顶科技股份有限公司 | Laser fault injection attack detection circuit for chip, and security chip |
| US11646276B2 (en) | 2020-08-07 | 2023-05-09 | Shenzhen GOODIX Technology Co., Ltd. | Detection circuit for laser fault injection attack on chip and security chip |
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