CN105140233A - 低温多晶硅阵列基板及其制造方法、显示装置 - Google Patents
低温多晶硅阵列基板及其制造方法、显示装置 Download PDFInfo
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Abstract
本发明提出了一种低温多晶硅阵列基板及其制造方法、显示装置。该方法包括在电极上形成平坦层,平坦层依次经过清洗、去水烘烤、疏水化处理、光阻涂布、真空干燥、预烘烤、曝光、显影、烘烤、灰化工序而形成,其中,烘烤的工序中包括至少两次烘烤温度不同的烘烤。通过上述方法能起到对平坦层的有机膜初步固化作用,从而改善过孔处因光阻流动性而导致的Taper角过小的问题。
Description
技术领域
本发明涉及液晶显示面板生产技术领域,尤其是涉及一种低温多晶硅阵列基板及其制造方法、显示装置。
背景技术
薄膜晶体管液晶显示器可分为多晶硅阵列基板和非晶硅阵列基板,两者的差异在于电晶体特性不同。多晶硅的分子结构在一颗晶粒中的排列状态是整齐而有方向性的,因此电子移动率比排列杂乱的非晶硅快了很多倍。而多晶硅产品则包括高温多晶硅(HTPS)和低温多晶硅(LTPS)两种产品。
低温多晶硅薄膜晶体管液晶显示器是在封装过程中,利用准分子镭射作为热源,镭射光经过折射系统后,会产生能量均匀分布的镭射光束,投射于非晶硅结构的玻璃基板上,当非晶硅结构玻璃基板吸收准分子镭射的能量后,会转变为多晶硅结构,因整个处理过程都是在600度以下完成,故一般玻璃基板均可适用。
低温多晶硅液晶显示器具有高分辨率、反应速度快、高亮度、高开口率等优点,加上由于低温多晶硅液晶显示器的硅结晶排量较a-si有次序,使得电子移动率相对于高100倍之上,可以将外围驱动电路同时制作在玻璃基板上,达到系统整合的目标,节省空间及驱动IC的成本,能更好的提高阵列基板的性能,大大改善器件性能。
但是,低温多晶硅阵列基板的制备工艺复杂,有可能造成其表面并不平整,以使得在彩膜基板组立后,间隔柱(PS)在按压后出现偏移,造成漏光风险。
发明内容
针对现有技术中所存在的上述技术问题,本发明提出了一种低温多晶硅阵列基板及其制造方法、显示装置。该方法通过设置平坦层,并且在形成平坦层过程中,经过至少两次烘烤温度不同的烘烤,避免设置在平坦层处的锥度角(Taper角)过小,从而保证低温多晶硅阵列基板的表面的平整。由此,通过本发明降低了间隔柱(PS)在按压后出现偏移,造成漏光的风险。
根据本发明的一方面,提出了一种低温多晶硅阵列基板的制造方法,包括在电极上形成平坦层,平坦层依次经过清洗、去水烘烤、疏水化处理、光阻涂布、真空干燥、预烘烤、曝光、显影、烘烤、灰化工序而形成,其中,烘烤的工序中包括至少两次烘烤温度不同的烘烤。通过这种设置能起到对平坦层的有机膜形成初步固化作用,有助于避免锥度角过小的问题。
在一个实施例中,在烘烤的工序中依次包括后烘烤和烤箱烘烤两步,并且后烘烤的温度低于烤箱烘烤的温度。通过上述方法,在烘烤的工序中设置至少两道烘烤工序,也就是在烤箱烘烤之前至少有一次烘烤,以对平坦层的有机膜形成初步固化作用,从而改善只进行一次烤箱烘烤,过孔因平坦层的光阻流动性而导致的锥度角过小的问题。同时,这种工艺相对简单,不需要添加额外的设备。
在一个实施例中,后烘烤的温度在110-130度之间。优选地,后烘烤的温度为120度。
在一个实施例中,后烘烤的时间为2-4分钟。
在一个实施例中,烤箱烘烤的温度为210-230度。
在一个实施例中,预烘烤的温度为80-100度,并预烘烤的时间为1.5-2分钟。
在一个实施例中,在曝光的工序中依次包括中间曝光和边缘曝光两步。
根据本发明的第二方面,提供一种低温多晶硅阵列基板,低温多晶硅阵列基板采用上述的制造方法制造。
根据本发明的第三方面,提供一种显示装置,包括上述的低温多晶硅阵列基板。
与现有技术相比,本发明的优点在于,在制造低温多晶硅阵列基板时,形成平坦层的过程中,在烘烤的工序中设置至少两道烘烤工序,也就是在烤箱烘烤之前至少具有一次烘烤,以对平坦层的有机膜形成初步固化作用,从而避免只是设置一次烤箱烘烤时,过孔因光阻流动性而导致的锥度角过小的问题。并且由于改善了锥度角过小的问题,则通过这种方法制成的阵列基板在与彩膜基板组装过程中,降低了PS位置偏移的问题,并减少了漏光的风险。
附图说明
下面将结合附图来对本发明的优选实施例进行详细地描述,在图中:
图1显示了根据本发明的一种低温多晶硅阵列基板的结构;
图2显示了根据本发明的低温多晶硅阵列基板的制作方法;
附图并未按照实际的比例绘制。
具体实施方式
下面将结合附图对本发明做进一步说明。
图1显示了低温多晶硅阵列基板100。如图1所示,在制造低温多晶硅阵列基板100过程中,在设置电极1后,需要在整个低温多晶硅阵列基板100的电极1的表面上形成平坦层2。为实现平坦层2的有助于平坦化的目的,其由有机材料制成,例如由聚酰亚胺制成。并且为了信号线的导通,在电极1区域处的平坦层2上设计有过孔3。过孔3的截面大体为梯形,并且过孔3的倾斜面与电极1的表面形成了锥度角(也就是Taper角,即图1中所标示的角α)。当此低温多晶硅阵列基板100与彩膜基板(图中未示出)贴合后,间隔柱(PS)处于平坦层2的过孔3之间。
由于现有技术中,在生产低温多晶硅阵列基板100时,在进行显影工序后,直接进行高温烘烤。而在高温烘烤过程中,由于平坦层2的光阻流动性,常出现Taper角α过小的问题。而由于Taper角α过小,容易使得两过孔3之间的平坦层2并不平整而为弧形。由此在生产低温多晶硅阵列基板100与彩膜基板组立后,PS设置在低温多晶硅阵列基板100的两过孔3之间,如果两过孔3之间的平坦层2并不平整,在PS受压后容易发生偏移,造成漏光风险。因此,在生产低温多晶硅阵列基板100的时候,在烘烤工序中可以包括两次烘烤温度不同的烘烤,也就是在对低温多晶硅阵列基板100进行烤箱烘烤之前,可对其进行后烘烤,并且后烘烤的温度低于烤箱烘烤。而后烘烤可以对平坦层2起到固化作用,以防止在烤箱烘烤过程中,由于平坦层2的光阻流动性严重而导致的过孔3处的Taper角α过小。从而,该生产低温多晶硅阵列基板100的制造方法避免过孔3过小,使得过孔3之间的平坦层2平整,以保证包含该低温多晶硅阵列基板100的显示装置的显示效果。
下面参照图2详细地论述平坦层2的形成工艺。
在形成电极1之后,对低温多晶硅阵列基板100进行清洗。在低温多晶硅阵列基板100经过制程的每道工序以及传送等,其表面都会受到一定程度的污染。这些污染微粒会引发电路的图形缺陷,使得组件的特性变差。为了清除这些污染,需要采取清洗工序。在此清洗工序中,可以采用水、紫外线或者超音波等方式进行。
在清洗低温多晶硅阵列基板100之后,可利用去水烘烤进行干燥处理,以防止低温多晶硅阵列基板100表面留下残留水痕或者杂质。例如可以采用气刀干燥、甩干干燥等方式进行。
在进行光阻涂布之前,对低温多晶硅阵列基板100进行疏水化处理,以使其表面能更好的与后续设置的平坦层2相粘附。
然后,进行光阻涂布,即在多晶硅阵列基板100的电极1的表面上涂布有机膜层以形成平坦层2。可以采用旋转涂布或者毛细管现象涂布等方式进行。
为使涂布的有机溶剂挥发出来,需要对多晶硅阵列基板100进行真空干燥。接下来,还要进行预烘烤。即将多晶硅阵列基板100设置在80-100度的范围内,预烘烤1.5-2分钟。优选地,预烘烤温度可设置为90度。
接着,进行曝光处理,而为了控制所需要的电路图形及显示图像用的像素图形,根据曝光的部位不同,曝光工序依次包括中间曝光和边缘曝光。
为了形成曝光后的图形,要选择性地去除部分有机膜层,因此在曝光工序之后需要进行显影工序。例如,可以选用喷淋显影、浸渍显影或者旋转显影等方式进行。
再次,进行烘烤工序。根据本发明,烘烤的工序中包括至少两次烘烤温度不同的烘烤。也就是在烤箱烘烤之前,增加至少一次后烘烤,对有机膜层进行初步固化,以防止Taper角α过小的问题。优选地,后烘烤的温度范围为110-130度,并且时间为2-4分钟。例如,可以在120度的温度下,对低温多晶硅阵列基板100进行2.5分钟的烘烤。然后,再对低温多晶硅阵列基板100进行烤箱烘烤,其烘烤温度为210-230度之间,烘烤时间设定为35-50分钟。
最后,对过孔3处进行修饰,即进行灰化处理。由此,低温多晶硅阵列基板100的平坦层2设置完成。
本发明还涉及通过上述方法形成的低温多晶硅阵列基板100,而低温多晶硅阵列基板100的其它结构和部件是本领域技术人员熟知的,在此不再进行赘述。
根据本发明,还提供包括低温多晶硅阵列基板100的显示装置。
以上所述仅为本发明的优选实施方式,但本发明保护范围并不局限于此,任何本领域的技术人员在本发明公开的技术范围内,可容易地进行改变或变化,而这种改变或变化都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以权利要求书的保护范围为准。
Claims (10)
1.一种低温多晶硅阵列基板的制造方法,其特征在于,包括在电极上形成平坦层,所述平坦层依次经过清洗、去水烘烤、疏水化处理、光阻涂布、真空干燥、预烘烤、曝光、显影、烘烤、灰化工序而形成,其中,所述烘烤的工序中包括至少两次烘烤温度不同的烘烤。
2.根据权利要求1所述的制造方法,其特征在于,在所述烘烤的工序中依次包括后烘烤和烤箱烘烤两步,并且所述后烘烤的温度低于所述烤箱烘烤的温度。
3.根据权利要求2所述的制造方法,其特征在于,所述后烘烤的温度在110-130度之间。
4.根据权利要求3所述的制造方法,其特征在于,所述后烘烤的温度为120度。
5.根据权利要求4所述的制造方法,其特征在于,所述后烘烤的时间为2-4分钟。
6.根据权利要求2到5中任一项所述的制造方法,其特征在于,所述烤箱烘烤的温度为210-230度。
7.根据权利要求6所述的制造方法,其特征在于,所述预烘烤的温度为80-100度,并所述预烘烤的时间为1.5-2分钟。
8.根据权利要求1所述的制造方法,其特征在于,在所述曝光的工序中依次包括中间曝光和边缘曝光两步。
9.一种低温多晶硅阵列基板,其特征在于,所述低温多晶硅阵列基板采用根据权利要求1-8中任一项所述的制造方法制造。
10.一种显示装置,其特征在于,包括根据权利要求9所述的低温多晶硅阵列基板。
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CN106129062A (zh) * | 2016-07-01 | 2016-11-16 | 深圳市华星光电技术有限公司 | 绝缘层的制造方法、阵列基板的制造方法及阵列基板 |
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