CN105006488A - Polysilicon floating gate memorizer based on organic field effect transistor and preparation method therefor. - Google Patents

Abstract

The invention discloses a polysilicon floating gate memory based on an organic field effect transistor and a preparation method thereof. The gate electrode adopts a heavily doped low-resistance single crystal silicon substrate with a thickness of 100-300nm; the gate insulation formed on the surface of the gate electrode silicon substrate dielectric layer; a polysilicon floating gate embedded between the gate insulating dielectric layer and the tunneling insulating dielectric layer as a charge storage unit; a tunneling insulating dielectric layer formed on the surface of the floating gate; growing an organic semiconductor on the surface of the tunneling insulating dielectric layer material to form the active layer of the device; on the surface of the active layer, metal is vacuum-evaporated through a metal mask to form the source and drain of the device. The beneficial effect of the invention is to reduce the working voltage of the floating gate memory based on the organic field effect transistor, realize high-density storage of the device, improve the retention characteristic of the device, and reduce the manufacturing cost of the device.

Description

Polysilicon floating gate memory based on organic field effect transistor and its preparation method

technical field

The invention belongs to the technical field of electronic components, and relates to a polysilicon floating gate memory based on an organic field effect transistor and a preparation method thereof.

Background technique

With the continuous development of electronic information technology, electronic information products have gradually penetrated into every aspect of people's life, work and study. People's demand for low-cost, low-power, portable and miniaturized electronic devices is increasing. The traditional silicon-based It is difficult for non-volatile memory to meet the above new requirements. Organic floating gate memory is a new type of organic electronic device developed based on organic thin film field effect transistor. Attention is a new type of electronic device with very promising application prospects in the future.

The structure of organic floating gate memory is similar to that of organic thin film field effect transistors (organic field effect transistors referred to as OFETs). unit. The tunneling insulating dielectric layer is between the active layer and the charge storage layer, and plays an isolation role; the charge storage unit (such as a metal nanoparticle layer, a dielectric layer, etc.) is embedded in the tunneling insulating dielectric layer and the gate insulation layer. The floating gate of the device between the dielectric layers is a key factor affecting the size of the storage window of the device, and the storage window is one of the important indicators to characterize the performance of the organic floating gate memory.

The experimental results show that the metal nanoparticle layer as the floating gate of the device shows great advantages in improving the storage window performance of the device, but its preparation conditions are relatively harsh, which increases the manufacturing cost of the device while improving the storage window of the device ; In addition, according to the current relevant research, the main problem of the floating gate memory based on the organic field effect transistor is that the device has poor retention characteristics and requires a very high operating voltage (higher than 20V). Therefore, it is of great scientific significance and practical value to reduce the operating voltage of floating gate memory based on organic field effect transistors and realize high-density storage of devices.

Contents of the invention

The object of the present invention is to provide a polysilicon floating gate memory based on an organic field effect transistor and a preparation method thereof, so as to solve the problems of high working voltage and high manufacturing cost of the existing organic field effect transistor floating gate memory.

The technical scheme adopted by the polysilicon floating gate memory based on the organic field effect transistor of the present invention is:

The gate electrode adopts a heavily doped low-resistance single crystal silicon substrate with a thickness of 100-300nm;

A gate insulating dielectric layer formed on the surface of the gate electrode silicon substrate;

A polysilicon floating gate embedded between the gate insulating dielectric layer and the tunneling insulating dielectric layer is used as a charge storage unit;

A tunnel insulating dielectric layer formed on the surface of the floating gate;

growing an organic semiconductor material on the surface of the tunneling insulating dielectric layer to form the active layer of the device;

On the surface of the active layer, metal is vacuum-evaporated through a metal mask to form the source and drain of the device.

Further, the conductive channel length of the active layer is 10 μm.

Preparation method of polysilicon floating gate memory based on organic field effect transistor:

(1) The cleaned silicon wafer is heavily doped by ion implantation or diffusion with a doping concentration of 10 ¹⁸ to 10 ²⁰ /cm ³ to form an ohmic contact between the gate and the probe;

(2) A layer of SiO ₂ is grown on the surface of the heavily doped silicon wafer with a thickness of 150-300nm, and a gate insulating dielectric layer is formed by thermal oxidation growth or chemical vapor deposition (CVD);

(3) Use LPCVD (low pressure chemical vapor deposition) to grow a polysilicon film with a thickness of 20-80 nm on the surface of the gate insulating dielectric layer as the floating gate of the device, and then use ion implantation or diffusion to lightly dope the polysilicon floating gate , the doping concentration is 10 ¹⁵ ~ 10 ¹⁷ /cm ³ , after doping, the sample is annealed at 800 ~ 900 ° C for 5 ~ 10 minutes to eliminate lattice damage and realize impurity ions in the polysilicon floating gate. Evenly distributed;

(4) Prepare a tunneling insulating dielectric layer on the surface of the polysilicon, and the tunneling insulating dielectric layer is a high-K thin film dielectric material with a thickness of 10 to 30 nm grown on the polycrystalline surface by LPCVD;

(5) The active layer is formed by vacuum evaporation or solution spin coating, the thickness is about 50-70nm, the length of the conductive channel of the active layer is 10-70μm, and the material of the active layer is p-type pentacene and copper phthalocyanine , 3-hexylthiophene polymer (P ₃ HT) or n-type fullerene (C ₆₀ ), one of perfluoropentacene, and then put the sample in the oven, in a vacuum atmosphere, 50 ~ Annealing for 30 minutes at 80°C;

(6) Perform low-temperature rapid annealing treatment on the device to form a dense and uniform active layer and improve the mobility of carriers in the active layer;

(7) Prepare the drain and source on the active layer by vacuum evaporation or magnetron sputtering. The source and drain electrodes are one of Au, Cu, Al, and Ni materials, with a thickness of 40-100nm. The length is 2 to 4 μm.

Further, the high-K thin-film dielectric material in the step (4) is silicon dioxide, aluminum oxide, or halo.

The beneficial effect of the invention is to reduce the working voltage of the floating gate memory based on the organic field effect transistor, realize high-density storage of the device, improve the retention characteristic of the device, and reduce the manufacturing cost of the device.

Description of drawings

1 is a schematic cross-sectional view of a polysilicon floating gate memory based on an organic field effect transistor according to an embodiment of the present invention;

Figure 2 shows the thermal oxidation growth of SiO2 in the memory manufacturing process;

Fig. 3 is low-pressure chemical vapor deposition (LPCVD) growth polysilicon in memory preparation process;

Figure 4 shows the LPCVD growth of SiO2 in the memory manufacturing process;

Fig. 5 is the vacuum vapor deposition of pentacene (pentacene) in the memory preparation process;

FIG. 6 shows the vapor deposition of Au electrodes on a metal mask in the memory manufacturing process.

Detailed ways

The present invention will be described in detail below in combination with specific embodiments.

The structure of the polysilicon floating gate memory based on the organic field effect transistor of the present invention is as shown in Figure 1, and its preparation process is as follows:

1) Put the cleaned heavily doped silicon wafer into a thermal oxidation furnace, and thermally oxidize and grow a thin layer of SiO ₂ with a thickness of about 150-300 nm on the silicon surface 1 to form the gate insulating dielectric layer 2 of the device, as shown in Figure 2 .

2) Using the CVD method, grow a polysilicon layer with a thickness of 20-40nm (deposition rate is about 5nm/minute) on the surface of SiO ₂ as the floating gate 3 of the device, as shown in Figure 3 .

3) Doping low-concentration arsenic ions (the doping concentration is about 10 ¹⁶ /cm ³ ) in the polysilicon floating gate region by ion implantation.

4) Primary annealing, the above sample is annealed at 800-900° C. for 5 minutes to eliminate lattice damage and achieve uniform distribution of impurity ions in the polysilicon floating gate.

5) A uniform high-purity _SiO2 layer with a thickness of 10nm (deposition rate of 1nm/min) is grown on the surface of the polysilicon floating gate by LPCVD method as the tunneling insulating dielectric layer 4 of the device, as shown in Figure 4.

6) Deposit pentacene with a thickness of 60nm (deposition rate: 2nm/min) on the surface of the tunneling insulating dielectric layer by vacuum organic evaporation as the active layer 5 of the device, as shown in FIG. 5 .

7) Secondary annealing, the above samples are placed in a baking oven, and annealed for 30 minutes in a vacuum atmosphere at 50-80°C to eliminate lattice damage, form a uniform and dense active layer, and increase the carrier density. Mobility within the active layer.

8) Using a vacuum evaporation method and a metal mask, evaporate Au with a thickness of 40 nm and a length of 2 μm on the surface of the above-mentioned active layer as the source 6 and drain 7 of the device, and the source 6 and drain 7 are connected to the active layer The contact barrier is about 0.1-0.3eV, and the edge is flush with the edge of the device, as shown in Figure 6.

When programming a floating gate memory based on an organic field effect transistor, the charge is first injected from the source and drain electrodes to the active layer to form accumulation under the action of the gate voltage. When the gate voltage is large enough, the active layer and the tunneling insulating dielectric layer The energy band between them will be bent, and the charge will cross the potential barrier between the active layer and the tunneling insulating dielectric layer to reach the floating gate layer under the action of a large gate voltage, and finally be trapped by the charge trap on the floating gate layer. Capture, the present invention is based on the polysilicon floating gate memory of the organic field effect transistor, preferably adopts high-mobility pentacene and Au as the active layer and the source and drain electrode materials of the device respectively, and through the corresponding annealing process, reduce the active The contact barrier between the layer and the metal electrode improves the charge injection efficiency; at the same time, a new charge storage unit is provided, using polysilicon as the floating gate layer of the device, and the floating gate layer is increased by doping the polysilicon at a low concentration. The charge traps on the gate layer help to increase the storage window of the device and achieve high-density storage, and the newly added charge traps reduce the formation of charge leakage channels and improve the retention characteristics of the device; in addition, the use of extremely thin gate insulation The dielectric layer and high-K tunneling insulating dielectric material can reduce its own voltage drop. Therefore, compared with the current technology, the polysilicon floating gate memory based on the organic field effect transistor of the present invention can increase its storage window on the basis of reducing the operating voltage of the floating gate memory, realize high-density storage, and improve charge retention characteristics, thereby The comprehensive performance of the floating gate memory based on the organic field effect transistor can be significantly improved.

The present invention has the advantages of:

(1) Using polysilicon as the floating gate of the device, the polysilicon floating gate is doped at a low concentration by ion implantation to provide more charge storage traps for storing charges, increase the charge storage density, improve the device storage window, and achieve high density storage; and, the deep charge storage traps will not generate new charge leakage channels due to partial charge leakage, thereby improving the retention characteristics of the device.

(2) The polysilicon floating gate memory based on the organic field effect transistor adopts a relatively thin inorganic gate insulating dielectric layer (100-200nm) and a high-K tunneling insulating dielectric layer (8-15nm), and through the corresponding annealing process, and A low contact barrier is formed between the source-drain electrodes and the active layer, which reduces the self-voltage drop between the gate insulating dielectric layer and the tunneling insulating dielectric layer, increases gate control sensitivity, and improves carrier injection efficiency.

(3) The polysilicon floating gate memory based on the organic field effect transistor has a simple structure, utilizes a mature manufacturing process, improves the yield of the device, and reduces the manufacturing cost.

The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Any simple modifications made to the above embodiments according to the technical essence of the present invention, equivalent changes and modifications, all belong to this invention. within the scope of the technical solution of the invention.

Claims (4)

1., based on the multi-crystal silicon floating bar memory of organic field effect tube, it is characterized in that:

Gate electrode adopts thickness to be the heavily doped low-resistance single crystal silicon substrate of 100 ~ 300nm;

Be formed at the gate insulation dielectric layer of gate electrode surface of silicon;

Be embedded in the multi-crystal silicon floating bar between gate insulation dielectric layer and tunnelling insulating medium layer, as charge storage elements;

Be formed at the tunnelling insulating medium layer on floating boom surface;

At tunnelling insulating medium layer surface-borne organic semiconducting materials, form the active layer of device;

In active layer surface, by metal mask vacuum evaporation metal, form the source electrode of device, drain electrode.

2. according to the multi-crystal silicon floating bar memory based on organic field effect tube described in claim 1, it is characterized in that: described active layer conducting channel length is 10 μm.

3. prepare the method based on the multi-crystal silicon floating bar memory of organic field effect tube described in claim 1, it is characterized in that:

(1) adopt the method for ion implantation or diffusion to carry out heavy doping to cleaned silicon chip, doping content is 10 ¹⁸~ 10 ²⁰/ cm ³, to form the ohmic contact between grid and probe;

(2) silicon chip surface after heavy doping grows one deck SiO ₂, thickness is 150 ~ 300nm, adopts thermal oxide growth or chemical gas-phase deposition method, forms gate insulation dielectric layer;

(3) utilize LPCVD method to be the floating boom of polysilicon membrane as device of 20 ~ 80nm at gate insulation dielectric layer surface growth thickness, then utilize the method for ion implantation or diffusion to carry out light dope to multi-crystal silicon floating bar, doping content is 10 ¹⁵~ 10 ¹⁷/ cm ³, after doping by sample under the condition of 800 ~ 900 DEG C, carry out 5 minutes annealing in process, eliminate lattice damage, realize foreign ion being uniformly distributed in multi-crystal silicon floating bar;

(4) prepare tunnelling insulating medium layer at polysilicon surface, tunnelling insulating medium layer utilizes LPCVD growth thickness to be the high K thin film dielectrics material of 10 ~ 30nm at polysilicon surface;

(5) active layer is formed by vacuum evaporation or solution spin coating method, thickness is 50 ~ 70nm, active layer conducting channel length 10 ~ 70 μm, active layer material is the one in the pentacene of p-type, CuPc, the polymer of 3-hexyl thiophene, the fullerene of N-shaped, perfluor pentacene, then sample is placed in baking box, under vacuum, 50 ~ 80 DEG C of conditions, carries out 30 minutes annealing in process;

(6) low temperature short annealing process is carried out to device, form the active layer of dense uniform, improve the mobility of charge carrier at active layer;

(7) adopt vacuum vapour deposition or magnetron sputtering method on active layer, prepare drain electrode and source electrode, source-drain electrode is the one in Au, Cu, Al, Ni material, and thickness is 40 ~ 100nm, length 2 ~ 4 μm.

4. according to described in claim 3 based on the method for the multi-crystal silicon floating bar memory of organic field effect tube, it is characterized in that: in described step (4), high K thin film dielectrics material is silicon dioxide, aluminium oxide, oxidation breathe out.