CN105006488B - Multi-crystal silicon floating bar memory based on organic field effect tube and preparation method thereof - Google Patents
Multi-crystal silicon floating bar memory based on organic field effect tube and preparation method thereof Download PDFInfo
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
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Abstract
The invention discloses the low-resistance single crystal silicon substrates that the multi-crystal silicon floating bar memory and preparation method thereof based on organic field effect tube, gate electrode use with a thickness of 100~300nm heavy doping;It is formed in the gate insulation dielectric layer of gate electrode surface of silicon;Multi-crystal silicon floating bar between gate insulation dielectric layer and tunnelling insulating medium layer, as charge storage elements;It is formed in the tunnelling insulating medium layer on floating gate surface;Organic semiconducting materials are grown in tunnelling dielectric layer surface, form the active layer of device;Source electrode, the drain electrode of device are formed by metal mask vacuum evaporation metal in active layer surface.The beneficial effects of the invention are as follows the operating voltage based on organic field effect tube floating-gate memory is reduced, realizes the high density storage of device, improve device retention performance, reduce device manufacturing cost.
Description
Technical field
The invention belongs to technical field of electronic components, it is related to the multi-crystal silicon floating bar storage based on organic field effect tube
Device and preparation method thereof.
Background technique
With the continuous development of electronic information technology, electronics and IT products have gradually penetrated into people's life and work
The each link practised, people increasingly increase the demand of electronic device of low cost, low-power consumption, Portable small, based on silicon
Traditional non-volatility memorizer be difficult to meet the needs of above new, organic floating-gate memory is based on organic film field
The novel organic electronic device that effect transistor grows up, because it is incomparable with typical structure and legacy memory
Feature, and get more and more people's extensive concerning, it is following very with a kind of Novel electronic devices of application prospect.
The structure and organic film FET (organic field effect of organic floating-gate memory
Transistors abbreviation OFETs) it is similar, except that organic floating-gate memory is in addition to the basic composition with OFETs
Part is outer, and there are also tunnelling insulating medium layer and charge storage elements.Tunnelling insulating medium layer is between active layer and charge storage
Between layer, buffer action is played;Charge storage elements (such as metal nano-particle layer, dielectric layer etc.) insulate embedded in tunnelling
It is the key factor for influencing device memory window size, storage as the floating gate of device between dielectric layer and gate insulation dielectric layer
Window is one of the important indicator for characterizing organic floating-gate memory performance.
The experimental results showed that metal nano-particle layer as device floating gate improve device memory window aspect of performance
Very big superiority is shown, but its preparation condition is harsher, while improving device memory window, increases device
Manufacturing cost;In addition, according to presently relevant studies have shown that mainly being asked existing for the floating-gate memory based on organic field effect tube
Topic is that the retention performance of device is poor, and needs very high operating voltage (being higher than 20V).Therefore, it reduces brilliant based on organic effect
The operating voltage of body pipe floating-gate memory and realization device high density storage are great scientific meaning and practical value.
Summary of the invention
The purpose of the present invention is to provide based on organic field effect tube multi-crystal silicon floating bar memory and its preparation side
Method, the operating voltage for solving existing organic field effect tube floating-gate memory is excessively high, the high problem of manufacturing cost.
Technical solution used by multi-crystal silicon floating bar memory the present invention is based on organic field effect tube is:
The low-resistance single crystal silicon substrate that gate electrode uses with a thickness of 100~300nm heavy doping;
It is formed in the gate insulation dielectric layer of gate electrode surface of silicon;
Multi-crystal silicon floating bar between gate insulation dielectric layer and tunnelling insulating medium layer, as charge storage elements;
It is formed in the tunnelling insulating medium layer on floating gate surface;
Organic semiconducting materials are grown in tunnelling dielectric layer surface, form the active layer of device;
Source electrode, the drain electrode of device are formed by metal mask vacuum evaporation metal in active layer surface.
Further, the active layer conducting channel length is 10 μm.
The preparation method of multi-crystal silicon floating bar memory based on organic field effect tube:
(1) heavy doping, doping concentration 10 are carried out to cleaned silicon wafer using ion implanting or the method for diffusion18~
1020/cm3, to form the Ohmic contact between grid and probe;
(2) silicon chip surface after heavy doping grows one layer of SiO2, with a thickness of 150~300nm, using thermal oxide growth or
Chemical vapor deposition (CVD) method forms gate insulation dielectric layer;
(3) using LPCVD (low-pressure chemical vapour deposition technique) gate insulation dielectric layer surface growth thickness be 20~
Then floating gate of the polysilicon membrane of 80nm as device carries out multi-crystal silicon floating bar using ion implanting or the method for diffusion light
Doping, doping concentration 1015~1017/cm3, after doping by sample under conditions of 800~900 DEG C, move back within 5~10 minutes
Fire processing, eliminates lattice damage, realizes foreign ion being uniformly distributed in multi-crystal silicon floating bar;
(4) tunnelling insulating medium layer is prepared in polysilicon surface, tunnelling insulating medium layer is utilized in polycrystalline surface
LPCVD growth thickness is the high K thin film dielectrics material of 10~30nm;
(5) active layer is formed by vacuum evaporation or solution spin coating method, and thickness is about 50~70nm, active layer conduction ditch
10~70 μm of road length, active layer material is the pentacene of p-type, CuPc, the polymer (P of 3- hexyl thiophene3) or N-shaped HT
Fullerene (C60), then sample is placed in baking box by one of perfluor pentacene, under the conditions of vacuum, 50~80 DEG C
Make annealing treatment within 30 minutes;
(6) low temperature short annealing processing is carried out to device, forms the active layer of dense uniform, improve carrier in active layer
Mobility;
(7) drain electrode is prepared on active layer using vacuum vapour deposition or magnetron sputtering method and source electrode, source-drain electrode is Au,
One of Cu, Al, Ni material, with a thickness of 40~100nm, 2~4 μm of length.
Further, high K thin film dielectrics material is silica, aluminium oxide, oxidation Kazakhstan in the step (4).
The beneficial effects of the invention are as follows the operating voltage based on organic field effect tube floating-gate memory is reduced, device is realized
The high density of part stores, and improves device retention performance, reduces device manufacturing cost.
Detailed description of the invention
Fig. 1 is that the structural profile of multi-crystal silicon floating bar memory of the embodiment of the present invention based on organic field effect tube is illustrated
Figure;
Fig. 2 is thermal oxide growth SiO2 in memory preparation process;
Fig. 3 is memory preparation process mesolow chemical vapor deposition (LPCVD) growing polycrystalline silicon;
Fig. 4 is that LPCVD grows SiO2 in memory preparation process;
Fig. 5 is vacuum evaporation pentacene (pentacene) in memory preparation process;
Fig. 6 is that Au electrode is deposited in metal mask in memory preparation process.
Specific embodiment
The present invention is described in detail With reference to embodiment.
The structure of multi-crystal silicon floating bar memory based on organic field effect tube of the invention is as shown in Figure 1, it is prepared
Technique is as follows:
1) cleaned heavy doping silicon wafer is put into thermal oxidation furnace, is about 150 in 1 thermal oxide growth a layer thickness of silicon face
The SiO of~300nm2Thin layer forms the gate insulation dielectric layer 2 of device, such as Fig. 2.
2) CVD method is utilized, in SiO2Surface growth thickness is the more of 20~40nm (deposition rate is about 5nm/ minutes)
Floating gate 3 of the crystal silicon layer as device, such as Fig. 3.
3) ion implantation is utilized, carrying out the arsenic ion doping of low concentration in floating polysilicon gate region, (doping concentration is about
1016/cm3)。
4) primary annealing make annealing treatment within 5 minutes to above-mentioned sample under conditions of 800~900 DEG C, eliminates lattice
Foreign ion being uniformly distributed in multi-crystal silicon floating bar is realized in damage.
5) growing a layer thickness on multi-crystal silicon floating bar surface using LPCVD method is 10nm (deposition rate is 1nm/ minutes)
Uniform high-purity SiO2Tunnelling insulating medium layer 4 of the layer as device, such as Fig. 4.
6) use vacuum organic vapor deposition method in tunnelling insulating medium layer surface deposition with a thickness of 60nm (deposition rate 2nm/
Minute) pentacene as device active layer 5, such as Fig. 5.
7) above-mentioned sample is placed in baking box by double annealing, under the conditions of vacuum, 50~80 DEG C, carries out 30 points
Clock annealing, eliminates lattice damage, forms the active layer of even compact, improves mobility of the carrier in active layer.
8) vacuum vapour deposition is utilized, metal mask is the Au that 40nm length is 2 μm in above-mentioned active layer surface evaporation thickness
Source electrode 6 and drain electrode 7 as device, source electrode 6 and drain electrode 7 and active layer contact berrier are about 0.1~0.3eV, edge and device
Edge is concordant, such as Fig. 6.
To based on organic field effect tube floating-gate memory program when, charge gate voltage effect under first from
Source, drain electrode are injected into active layer and form accumulation, the energy when gate voltage is sufficiently large, between active layer and tunnelling insulating medium layer
Band will bend, and charge will cross the potential barrier between active layer and tunnelling insulating medium layer under big gate voltage effect
Floating gate layer is reached, is finally captured by the charge trap above floating gate layer, the present invention is based on the polycrystalline of organic field effect tube
Silicon floating gate memory, preferential pentacene and Au using high mobility respectively as device active layer and source-drain electrode materials,
And handled by corresponding annealing process, the contact berrier between active layer and metal electrode is reduced, the injection effect of charge is improved
Rate;Meanwhile a kind of new charge storage elements being provided, it is low by being carried out to polysilicon using polysilicon as the floating gate layer of device
The method of doped in concentrations profiled increases the charge trap on floating gate layer, facilitates the memory window for increasing device, realizes that high density is deposited
Storage, and the charge trap newly increased reduces the formation of charge bleed-off path, improves the retention performance of device;In addition, adopting
With very thin gate insulation dielectric layer and high K tunnelling insulating dielectric materials, itself pressure drop can be reduced.Therefore, compared to current
Technology, the present invention is based on the multi-crystal silicon floating bar memories of organic field effect tube, can reduce floating-gate memory work electricity
On the basis of pressure, increase its memory window, realizes high density storage, charge-retention property is improved, so as to significantly improve base
In the comprehensive performance of the floating-gate memory of organic field-effect transistor.
It is also an advantage of the present invention that:
(1) low concentration is carried out to multi-crystal silicon floating bar by the method for ion implanting and is mixed as the floating gate of device using polysilicon
It is miscellaneous, more charge storage traps are provided for storage charge, increases charge storage density, improves device memory window, are realized high
Density storage;Also, deep charge storage trap will not generate new charge bleed-off path because Partial charge leaks, to mention
The retention performance of high device.
(2) the multi-crystal silicon floating bar memory based on organic field effect tube is used than relatively thin inorganic gate insulation medium
Layer (100-200nm) and high K tunnelling insulating medium layer (8-15nm), and pass through corresponding annealing process and source-drain electrode
Low contact berrier is formed with active interlayer, reduces itself pressure drop of gate insulation dielectric layer and tunnelling dielectric interlayer, is increased
Grid-control sensitivity improves the injection efficiency of carrier.
(3) the multi-crystal silicon floating bar memory construction based on organic field effect tube is simple, using mature preparation process,
The yield rate of device is improved, manufacturing cost is reduced.
The above is only not to make limit in any form to the present invention to better embodiment of the invention
System, any simple modification that embodiment of above is made according to the technical essence of the invention, equivalent variations and modification,
Belong in the range of technical solution of the present invention.
Claims (6)
1. the multi-crystal silicon floating bar memory based on organic field effect tube, it is characterised in that:
The low-resistance single crystal silicon substrate that gate electrode uses with a thickness of 100~300nm heavy doping;
It is formed in the gate insulation dielectric layer of gate electrode surface of silicon;
Multi-crystal silicon floating bar between gate insulation dielectric layer and the high K insulating medium layer of tunnelling as charge storage elements;
It is formed in the high K insulating medium layer of tunnelling on floating gate surface;
The organic semiconducting materials grown in the high K dielectric layer surface of tunnelling form the active layer of device;
In active layer surface, the source electrode and drain electrode of device is formed by metal mask vacuum evaporation metal;
Wherein:
The floating gate is 20~80nm of thickness, arsenic ion is lightly doped, doping concentration 1015~1017/ cm3;
The high K insulating medium layer of tunnelling for being formed in floating gate surface is made of the aluminium oxide of 10~30 nm of thickness or hafnium oxide
Thin film dielectrics material;
The active layer is with a thickness of 50~70 nm, and 10~70 μm of active layer conducting channel length, and active layer material is p-type
When for pentacene, CuPc, 3- when any one of polymer of base thiophene or active layer material are N-shaped be fullerene
Or one of perfluor pentacene;
The source electrode and drain electrode is any one of Au, Cu, Al or Ni, is 2~4 μm with a thickness of 40~100nm, length,
Source electrode and drain electrode and active layer contact berrier are 0.1~0.3eV.
2. according to the multi-crystal silicon floating bar memory described in claim 1 based on organic field effect tube, it is characterised in that above-mentioned
Active layer conduction ditch length is 10 μm, and the high K insulating medium layer of the tunnelling on floating gate surface is with a thickness of 10 nm, the thickness of source electrode and drain electrode
Degree is 40nm, length is 2 μm.
3. according to the multi-crystal silicon floating bar memory as claimed in claim 1 or 2 based on organic field effect tube, it is characterised in that grid
Insulating layer is the SiO of thickness 150nm2, the high K insulating medium layer of tunnelling is the high-purity SiO of thickness 10nm2, active layer is thickness
The pentacene of 60nm.
4. the preparation method of the multi-crystal silicon floating bar memory of any of claims 1 or 2 based on organic field effect tube, special
Sign is:
(1) heavy doping is carried out to cleaned silicon wafer using ion implanting or the method for diffusion, to be formed between grid and probe
Ohmic contact;
(2)Silicon chip surface after heavy doping grows one layer of SiO2, using thermal oxide growth or chemical gas-phase deposition method, formed
Gate insulation dielectric layer;
(3)Using LPCVD method in gate electrode insulation surface preparing polysilicon film as the floating gate of device, then using ion infuse
Multi-crystal silicon floating bar is lightly doped in the method for entering or spreading, and after doping by sample under conditions of 800 DEG C~900 DEG C, carries out 5
Minute annealing, eliminates lattice damage, realizes foreign ion being uniformly distributed in multi-crystal silicon floating bar;
(4)The high K insulating medium layer of tunnelling is prepared in polysilicon surface, the high K insulating medium layer of tunnelling is to utilize on the polysilicon
LPCVD method grows high K thin film dielectrics material;
(5)Active area forms the active layer of organic semiconducting materials by vacuum deposition method, and sample is then placed in baking box,
It carries out making annealing treatment for 30 minutes under the conditions of vacuum, 50 DEG C~80 DEG C;
(6)Low temperature short annealing processing is carried out to device, forms the active layer of dense uniform, improves carrier moving in active layer
Shifting rate;
(7)Drain electrode and the source electrode of metal material are prepared on active layer using vacuum vapour deposition or magnetron sputtering method.
5. the preparation method of the multi-crystal silicon floating bar memory based on organic field effect tube according to claim 4, special
Sign is the step(4)Middle high K thin film dielectrics material is aluminium oxide or hafnium oxide.
6. the method for preparing the multi-crystal silicon floating bar memory based on organic field effect tube described in claim 3, feature exist
In:
(1) heavy doping, doping concentration 10 are carried out to cleaned silicon wafer using ion implanting or the method for diffusion18~1020/
cm3, to form the Ohmic contact between grid and probe;
(2)Silicon chip surface after heavy doping grows one layer of SiO2, with a thickness of 150~300nm, using thermal oxide growth or chemistry
Gas-phase deposition method forms gate insulation dielectric layer;
(3)Using LPCVD method gate electrode insulation surface growth thickness be 20~80nm polysilicon membrane as device floating
Then grid are lightly doped multi-crystal silicon floating bar using ion implanting or the method for diffusion, doping concentration 1015~1017/cm3,
After doping by sample under conditions of 800 DEG C~900 DEG C, carry out 5 minutes make annealing treatment, eliminate lattice damage, realize impurity from
Son being uniformly distributed in multi-crystal silicon floating bar;
(4)In the high K insulating medium layer of tunnelling that polysilicon surface grows high K thin film dielectrics material using LPCVD;
(5)Active area is formed by vacuum evaporation or solution spin coating method, 50~70nm of thickness, active layer conducting channel length 10
~70 μm, active layer material is the pentacene of p-type, sample is then placed in baking box, in vacuum, 50 DEG C~80 DEG C conditions
It is lower make annealing treatment within 30 minutes;
(6)Low temperature short annealing processing is carried out to device, forms the active layer of dense uniform, improves carrier moving in active layer
Shifting rate;
(7)Drain electrode and source electrode, source-drain electrode Au, Cu, Al are prepared on active layer using vacuum vapour deposition or magnetron sputtering method
Or one of Ni material, with a thickness of 40~100nm, 2~4 μm of length.
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