CN104993574A - Power switching circuit applicable to OTP memories - Google Patents
Power switching circuit applicable to OTP memories Download PDFInfo
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- CN104993574A CN104993574A CN201510392355.4A CN201510392355A CN104993574A CN 104993574 A CN104993574 A CN 104993574A CN 201510392355 A CN201510392355 A CN 201510392355A CN 104993574 A CN104993574 A CN 104993574A
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Abstract
The invention provides a power switching circuit applicable to OTP memories, comprising a substrate switching module, a power switching module, a first voltage input end, a second voltage input end, and a voltage output end. The substrate switching module includes a third PMOS tube, a fourth PMOS tube, a fifth PMOS tube, and a weak pull-down device. Through the substrate switching module, the substrates of all the PMOS tubes are always connected to the highest potential of the first voltage input end and the second voltage input end. The power switching module includes a first PMOS tube and a second PMOS tube. Through the power switching module, the voltage output end is always connected to the highest potential of the first voltage input end and the second voltage input end. Vgs, Vgd, Vds of all the PMOS tubes are within the required withstand voltage range. Through the power switching circuit of the invention, transmission of high-voltage power is realized by low-voltage MOS tubes in a simple and practical manner based on the specific requirements of an OTP memory circuit, the chip area and cost are reduced, and the circuit performance is improved.
Description
Technical field
The invention belongs to integrated circuit fields, relate to One Time Programmable (OTP) memory circuitry, especially relate to a kind of power supply switch circuit being applicable to otp memory, be applicable in monolithic integrated circuit chip.
Background technology
In integrated circuit otp memory circuit field, usually need to use different voltage sources and circuit is powered.When such as write operation being carried out to OTP circuit, supply voltage may need 6V, and when read operation is carried out to OTP circuit, supply voltage only may need 3V, so we need power supply switch circuit to power to select suitable voltage to OTP circuit, as shown in Figure 1, wherein VDD is 3V power supply, and VPP is 6V power supply.
Because 3V and 6V two kinds of power supplys exist simultaneously, so the metal-oxide-semiconductor be connected with 6V power supply needs to stand the withstand voltage of 6V, at this time usually have two kinds of solutions:
1) high-voltage MOS pipe is directly used to be used for realizing the transmission of 6V power supply.The advantage of this mode is that circuit is simple, and directly just can realize the Kai Heguan of power supply with a high-voltage MOS pipe, but shortcoming also clearly, because it needs extra mask layer (Mask), production cost is high.
2) 3V metal-oxide-semiconductor is only used to realize the transmission of 6V power supply.This mode needs to ensure all their Vgs of metal-oxide-semiconductor be connected with 6V power supply, and Vgd, Vds within the scope of requirement of withstand voltage (usually at about 3.6V), but can not affect the life-span of chip, and this needs to adopt exquisite circuit structure to realize.
In addition, US 6774704 B2 proposes a kind of high voltage source automatic selection circuit, as shown in Figure 2, it selects voltage Gao mono-road power supply more automatically by current ratio, its advantage is that choice accuracy is high, and shortcoming is if supply voltage is 6V, and it still needs to use high-voltage MOS pipe to prevent from puncturing.
US 7215043 B2 proposes a kind of high pressure resistant power switch circuit, as shown in Figure 3, it achieves the function that 3V metal-oxide-semiconductor transmits 6V power supply, blemish in an otherwise perfect thing be to OTP power supply switch circuit, this circuit is comparatively complicated, can also more simplify.Fig. 2 and Fig. 3 all wins from former patent, specifically please check former patent.
Therefore, a kind of power supply switch circuit being applicable to otp memory is newly provided to be the problem that those skilled in the art need to solve.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of power supply switch circuit being applicable to otp memory, the problem that low pressure metal-oxide-semiconductor cannot realize high voltage source transmission can be solved, brief and practical again, save chip area and cost, improve circuit performance.
For achieving the above object and other relevant objects, the invention provides a kind of power supply switch circuit being applicable to otp memory, described in be applicable to otp memory power supply switch circuit at least comprise: substrate handover module, electrical source exchange module, the first voltage input end, the second voltage input end and voltage output end; Wherein,
Described substrate handover module comprises: the 3rd PMOS, the 4th PMOS, the 5th PMOS and weak pull-down device; The drain terminal of described 5th PMOS and the drain terminal of the 4th PMOS are connected to substrate; The grid end of described 5th PMOS is connected with the drain terminal of the 3rd PMOS, and is connected to ground by described weak pull-down device; The source of described 5th PMOS, the grid end of the 4th PMOS are all connected with described first voltage input end with the grid end of the 3rd PMOS; The source of described 4th PMOS is all connected with described second voltage input end with the source of the 3rd PMOS;
Described electrical source exchange module comprises: the first PMOS and the second PMOS; The source of described first PMOS is connected to the second voltage input end; The grid end of described first PMOS and the source of described second PMOS are connected to the first voltage input end; The drain terminal of described first PMOS and the drain terminal of the second PMOS are connected to voltage output end; The grid end of described second PMOS is connected with the grid end of described 5th PMOS and the drain terminal of the 3rd PMOS, and is connected to ground by described weak pull-down device.
Be applicable to the scheme of a kind of optimization of the power supply switch circuit of otp memory as the present invention, described electrical source exchange mould also comprises a control switch pipe.
The scheme of a kind of optimization of the power supply switch circuit of otp memory is applicable to as the present invention, described control switch Guan Wei six PMOS, the grid termination control signal of described 6th PMOS, the source of described 6th PMOS is connected to the first voltage input end, and the drain terminal of described 6th PMOS is connected with the source of described second PMOS.
Be applicable to the scheme of a kind of optimization of the power supply switch circuit of otp memory as the present invention, described weak pull-down device is current source device or resistance.
The scheme of a kind of optimization of the power supply switch circuit of otp memory is applicable to as the present invention, described current source device by the first NMOS tube and the second NMOS tube in series, wherein, the drain terminal of described second NMOS tube is connected with the grid end of the 5th PMOS, the grid end of described second NMOS tube is connected to the first voltage input end, and the source of described second NMOS tube is connected with the drain terminal of the first NMOS tube; The grid termination bias voltage of described first NMOS tube, the source ground connection of described first NMOS tube.
The scheme of a kind of optimization of the power supply switch circuit of otp memory is applicable to as the present invention, described 5th PMOS and the 4th PMOS are for realizing the voltage switching of underlayer voltage output, and described 3rd PMOS is for the switching of the potentiometric detection and the 5th gate pmos terminal potential that realize the first voltage input end and the second voltage input end.
Be applicable to the scheme of a kind of optimization of the power supply switch circuit of otp memory as the present invention, described weak pull-down device is for realizing the weak pull-down of the 5th gate pmos terminal potential.
The scheme of a kind of optimization of the power supply switch circuit of otp memory is applicable to as the present invention, the threshold voltage of described first PMOS, the second PMOS, the 3rd PMOS, the 4th PMOS and the 5th PMOS is Vth, the voltage of the first voltage input end is VDD, the voltage of the second voltage input end is VPP, then as VPP<VDD+Vth, the voltage of described voltage output end is VDD; As VPP>VDD+Vth, the voltage switching of described voltage output end is VPP.
As mentioned above, the power supply switch circuit being applicable to otp memory of the present invention, comprising: substrate handover module, electrical source exchange module, the first voltage input end, the second voltage input end and voltage output end; Described substrate handover module comprises: the 3rd PMOS, the 4th PMOS, the 5th PMOS and weak pull-down device; The drain terminal of described 5th PMOS and the drain terminal of the 4th PMOS are connected to substrate; The grid end of described 5th PMOS is connected with the drain terminal of the 3rd PMOS, and is connected to ground by described weak pull-down device; The source of described 5th PMOS, the grid end of the 4th PMOS are all connected with described first voltage input end with the grid end of the 3rd PMOS; The source of described 4th PMOS is all connected with described second voltage input end with the source of the 3rd PMOS; Described electrical source exchange module comprises: the first PMOS and the second PMOS; The source of described first PMOS is connected to the second voltage input end; The grid end of described first PMOS and the source of described second PMOS are connected to the first voltage input end; The drain terminal of described first PMOS and the drain terminal of the second PMOS are connected to voltage output end; The grid end of described second PMOS is connected with the grid end of described 5th PMOS and the drain terminal of the 3rd PMOS, and is connected to ground by described weak pull-down device.By power supply switch circuit of the present invention, for the specific demand of otp memory circuit, in the mode of brief and practical, use low pressure metal-oxide-semiconductor to realize the transmission of high voltage source, save chip area and cost, improve circuit performance.
Accompanying drawing explanation
Fig. 1 is the electric power-feeding structure schematic diagram of existing otp memory circuit.
Fig. 2 is the structural representation of patent US 6774704 B2 power supply switch circuit.
Fig. 3 is the structural representation of patent US 7215043 B2 power supply switch circuit.
Fig. 4 is the structural representation that the present invention is applicable to the power supply switch circuit of otp memory.
Fig. 5 is the structural representation of a kind of execution mode in the embodiment of the present invention one.
Fig. 6 is the structural representation of another execution mode in the embodiment of the present invention one.
Fig. 7 is the structural representation of execution mode in the embodiment of the present invention two.
Fig. 8 is power supply switch circuit operating diagram in the embodiment of the present invention two.
Element numbers explanation
10 substrate handover modules
11 electrical source exchange modules
M1 first PMOS
M2 second PMOS
M3 the 3rd PMOS
M4 the 4th PMOS
M5 the 5th PMOS
Mpd control switch pipe
I1 weak pull-down device
R1 resistance
Mb1 first NMOS tube
Mb2 second NMOS tube
The voltage of VDD first voltage input end
The voltage of VPP second voltage input end
The voltage of VOUT voltage output end
Nsub substrate
Embodiment
Below by way of specific instantiation, embodiments of the present invention are described, those skilled in the art the content disclosed by this specification can understand other advantages of the present invention and effect easily.The present invention can also be implemented or be applied by embodiments different in addition, and the every details in this specification also can based on different viewpoints and application, carries out various modification or change not deviating under spirit of the present invention.
Refer to accompanying drawing 4 ~ Fig. 8.It should be noted that, the diagram provided in the present embodiment only illustrates basic conception of the present invention in a schematic way, then only the assembly relevant with the present invention is shown in graphic but not component count, shape and size when implementing according to reality is drawn, it is actual when implementing, and the kenel of each assembly, quantity and ratio can be a kind of change arbitrarily, and its assembly layout kenel also may be more complicated.
Embodiment one
The present embodiment provides a kind of power supply switch circuit being applicable to otp memory, as shown in Figure 4, the power supply switch circuit being applicable to otp memory described in comprises: substrate handover module 10, electrical source exchange module 11, first voltage input end, the second voltage input end and voltage output end.
The voltage of described first voltage input end is VDD, and the voltage of the second voltage input end is VPP, and the voltage of voltage output end is VOUT.
Described substrate handover module 10 comprises three PMOS and a weak pull-down device, and wherein, three PMOS are respectively the 3rd PMOS M3, the 4th PMOS M4, the 5th PMOS M5, and weak pull-down device is I1.
The drain terminal of described 5th PMOS M5 and the drain terminal of the 4th PMOS M4 are connected to substrate nsub; The grid end of described 5th PMOS M5 is connected with the drain terminal of the 3rd PMOS M3, and is connected to ground by described weak pull-down device I1; The source of described 5th PMOS M5, the grid end of the 4th PMOS M4 are all connected with described first voltage input end VDD with the grid end of the 3rd PMOS M3; The source of described 4th PMOS M4 is all connected with described second voltage input end VPP with the source of the 3rd PMOS M3, thus forms described substrate handover module 10.By described substrate handover module 10, the substrate nsub that can realize all PMOS is connected in the maximum potential in VDD and VPP all the time.Vgs, Vgd and Vds of the 3rd PMOS M3 in described substrate handover module 10, the 4th PMOS M4, the 5th PMOS M5 are within the scope of requirement of withstand voltage.
In described substrate handover module 10, described 5th PMOS M5 and the 4th PMOS M4 is for realizing the voltage switching of substrate nsub, and described 3rd PMOS M3 is for the switching of the potentiometric detection and the 5th PMOS M5 grid terminal potential that realize the first voltage input end VDD and the second voltage input end VPP.In addition, described weak pull-down device I1 is for realizing the weak pull-down of the 5th PMOS M5 grid terminal potential.
Described electrical source exchange module 11 comprises: the first PMOS M1 and the second PMOS M2; The source of described first PMOS M1 is connected to the second voltage input end VPP; The grid end of described first PMOS M1 and the source of described second PMOS M2 are connected to the first voltage input end VDD; The drain terminal of described first PMOS M1 and the drain terminal of the second PMOS M2 are connected to voltage output end VOUT; The grid end of described second PMOS M2 is connected with the grid end of described 5th PMOS M5 and the drain terminal of the 3rd PMOS M3, and is connected to ground by described weak pull-down device I1.The substrate nsub of all PMOS links together.The first PMOS M1 in described electrical source exchange module 11, Vgs, Vgd and Vds of the second PMOS M2 are within the scope of requirement of withstand voltage.
The power supply switch circuit being applicable to otp memory specific works principle in handoff procedure of the present embodiment is: suppose described first PMOS M1, the second PMOS M2, the threshold voltage of the 3rd PMOS M3, the 4th PMOS M4 and the 5th PMOS M5 is Vth.
As VPP<VDD+Vth, the grid end nwpd of described 5th PMOS M5 pulls down to ground by weak pull-down device I1, and the 5th PMOS M5 is in conducting state, thus Vnsub=VDD, namely the voltage of substrate nsub equals the voltage of first input end.Like this, the 3rd PMOS M3 and the 4th PMOS M4 is in cut-off state, and the voltage due to substrate is VDD, and the first PMOS is also in cut-off state, thus makes the voltage VDD that voltage output end keeps stable.
And as VPP>VDD+Vth, 3rd PMOS M3 and the 4th PMOS M4 is in conducting state, the grid end nwpd voltage Vnwpd of described 5th PMOS M5 is pulled to VPP, described 5th PMOS M5 is now in cut-off state, thus makes substrate be connected to VPP, i.e. Vnsub=VPP, first PMOS M1 is in conducting state, make the voltage VPP that substrate nsub keeps stable, the second PMOS is in cut-off state simultaneously, can prevent electric current from flowing to VDD from VPP.
By the power supply switch circuit being applicable to otp memory of the present embodiment, can ensure that the voltage VOUT of voltage output end is in use all connected on the highest voltage, thus can power to otp memory under different electrical power voltage, carry out read-write operation, improve circuit performance.
It should be noted that, in the present embodiment, described weak pull-down device is current source device or resistance.In one embodiment, described weak pull-down device can be chosen as resistance, as shown in Figure 6.The weak pull-down of the 5th gate pmos terminal potential is realized by resistance R1.
In another embodiment, described weak pull-down device is current source device, and described current source device is in series by the first NMOS tube Mb1 and the second NMOS tube Mb2, as shown in Figure 5.The weak pull-down of the 5th gate pmos terminal potential is realized by the first NMOS tube Mb1 and the second NMOS tube.Wherein, the drain terminal of described second NMOS tube Mb2 is connected with the grid end of the 5th PMOS M5, and the grid end of described second NMOS tube Mb2 is connected to the first voltage input end, and the source of described second NMOS tube Mb2 is connected with the drain terminal of the first NMOS tube Mb1; The grid termination bias voltage Vnbias of described first NMOS tube Mb1, the source ground connection of described first NMOS tube Mb1.
Embodiment two
The present embodiment provides a kind of Power transfer system of otp memory, and as shown in Figure 7, the difference of the present embodiment and embodiment one is, in the electrical source exchange module 11 of the present embodiment, increase by a control switch pipe Mpd, other circuit structures are identical with embodiment one.Particularly, described control switch pipe Mpd is the 6th PMOS, the grid termination control signal of described 6th PMOS, the source of described 6th PMOS is connected to the first voltage input end VDD, and the drain terminal of described 6th PMOS is connected with the source of described second PMOS M2.
The Power transfer system of otp memory of the present invention in handoff procedure each potential change as shown in Figure 8, specific works principle is: suppose described first PMOS M1, the second PMOS M2, the threshold voltage of the 3rd PMOS M3, the 4th PMOS M4 and the 5th PMOS M5 be Vth.
As VPP<VDD+Vth, the grid end nwpd of described 5th PMOS M5 pulls down to ground by weak pull-down device I1, and the 5th PMOS M5 is in conducting state, thus Vnsub=VDD, namely the voltage of substrate nsub equals the voltage of first input end.Like this, 3rd PMOS M3 and the 4th PMOS M4 is in cut-off state, voltage due to substrate is VDD, first PMOS is also in cut-off state, now, the voltage VOUT of voltage output end is decided by the control signal pd of control switch pipe Mpd grid end, when voltage Vpd=" 0 " of control switch pipe Mpd grid end, described control switch pipe Mpd and the second PMOS M2 is in conducting state, VOUT=VDD; As Vpd=" VDD ", described control switch pipe Mpd is in cut-off state, thus makes the voltage VOUT of voltage output end be in high-impedance state.As the interlude in Fig. 8 represent Vpd=" 0 " time, voltage output end exports ceiling voltage VDD.
And as VPP>VDD+Vth, 3rd PMOS M3 and the 4th PMOS M4 is in conducting state, the grid end nwpd voltage Vnwpd of described 5th PMOS M5 is pulled to VPP, described 5th PMOS M5 is now in cut-off state, thus makes substrate be connected to VPP, i.e. Vnsub=VPP, first PMOS M1 is in conducting state, make the voltage VPP that substrate nsub keeps stable, the second PMOS is in cut-off state simultaneously, can prevent electric current from flowing to VDD from VPP.As the two end portions in Fig. 8.
Due to the particularity of otp memory circuit, write operation is normally disposable, and after writing, VPP will disconnect with circuit, so VPP branch road does not need breaking circuit (i.e. control switch pipe Mpd) in Fig. 7; And read operation is regular, VDD and circuit connectionist all the time, so VDD branch road increases breaking circuit (Mpd) in Fig. 7.
It should be noted that, in the present embodiment, described weak pull-down device is current source device, identical with embodiment one, and described weak pull-down device can also be chosen as resistance.Current source device in the present embodiment is by the first NMOS tube Mb1 and the second NMOS tube Mb2 weak pull-down realizing the 5th gate pmos terminal voltage in series.As illustrated in Fig. 7, current source device is by the first NMOS tube Mb1 and the second NMOS tube Mb2 situation in series.
In sum, the invention provides a kind of power supply switch circuit being applicable to otp memory, comprising: substrate handover module, electrical source exchange module, the first voltage input end, the second voltage input end and voltage output end; Wherein said substrate handover module comprises: the 3rd PMOS, the 4th PMOS, the 5th PMOS and weak pull-down device, and the substrate realizing all PMOS by substrate handover module is connected to the maximum potential in the first voltage input end, the second voltage input end all the time; Described electrical source exchange module comprises: the first PMOS and the second PMOS, realizes voltage output end be connected to maximum potential in the first voltage input end, the second voltage input end all the time by electrical source exchange module.The Vgs of all PMOS in the present invention, Vgd, Vds is within the scope of requirement of withstand voltage, by power supply switch circuit of the present invention, for the specific demand of otp memory circuit, in the mode of brief and practical, low pressure metal-oxide-semiconductor is used to realize the transmission of high voltage source, save chip area and cost, improve circuit performance.
So the present invention effectively overcomes various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.
Claims (8)
1. one kind is applicable to the power supply switch circuit of otp memory, it is characterized in that, described in be applicable to otp memory power supply switch circuit at least comprise: substrate handover module, electrical source exchange module, the first voltage input end, the second voltage input end and voltage output end; Wherein,
Described substrate handover module comprises: the 3rd PMOS, the 4th PMOS, the 5th PMOS and weak pull-down device; The drain terminal of described 5th PMOS and the drain terminal of the 4th PMOS are connected to substrate; The grid end of described 5th PMOS is connected with the drain terminal of the 3rd PMOS, and is connected to ground by described weak pull-down device; The source of described 5th PMOS, the grid end of the 4th PMOS are all connected with described first voltage input end with the grid end of the 3rd PMOS; The source of described 4th PMOS is all connected with described second voltage input end with the source of the 3rd PMOS;
Described electrical source exchange module comprises: the first PMOS and the second PMOS; The source of described first PMOS is connected to the second voltage input end; The grid end of described first PMOS and the source of described second PMOS are connected to the first voltage input end; The drain terminal of described first PMOS and the drain terminal of the second PMOS are connected to voltage output end; The grid end of described second PMOS is connected with the grid end of described 5th PMOS and the drain terminal of the 3rd PMOS, and is connected to ground by described weak pull-down device.
2. the power supply switch circuit being applicable to otp memory according to claim 1, is characterized in that: described electrical source exchange mould also comprises a control switch pipe.
3. the power supply switch circuit being applicable to otp memory according to claim 2, it is characterized in that: described control switch Guan Wei six PMOS, the grid termination control signal of described 6th PMOS, the source of described 6th PMOS is connected to the first voltage input end, and the drain terminal of described 6th PMOS is connected with the source of described second PMOS.
4. the power supply switch circuit being applicable to otp memory according to claim 1, is characterized in that: described weak pull-down device is current source device or resistance.
5. the power supply switch circuit being applicable to otp memory according to claim 4, it is characterized in that: described current source device by the first NMOS tube and the second NMOS tube in series, wherein, the drain terminal of described second NMOS tube is connected with the grid end of the 5th PMOS, the grid end of described second NMOS tube is connected to the first voltage input end, and the source of described second NMOS tube is connected with the drain terminal of the first NMOS tube; The grid termination bias voltage of described first NMOS tube, the source ground connection of described first NMOS tube.
6. the power supply switch circuit being applicable to otp memory according to claim 1, it is characterized in that: described 5th PMOS and the 4th PMOS are for realizing the voltage switching of underlayer voltage output, and described 3rd PMOS is for the switching of the potentiometric detection and the 5th gate pmos terminal potential that realize the first voltage input end and the second voltage input end.
7. the power supply switch circuit being applicable to otp memory according to claim 1, is characterized in that: described weak pull-down device is for realizing the weak pull-down of the 5th gate pmos terminal potential.
8. the power supply switch circuit being applicable to otp memory according to claim 1, it is characterized in that: the threshold voltage of described first PMOS, the second PMOS, the 3rd PMOS, the 4th PMOS and the 5th PMOS is Vth, the voltage of the first voltage input end is VDD, the voltage of the second voltage input end is VPP, as VPP<VDD+Vth, the voltage of described voltage output end is VDD; As VPP>VDD+Vth, the voltage switching of described voltage output end is VPP.
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| CN110994770A (en) * | 2019-12-30 | 2020-04-10 | 武汉瑞纳捷电子技术有限公司 | Dual-power switching circuit and Internet of things chip adopting same |
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| CN110120699B (en) * | 2018-02-06 | 2023-08-08 | 意法半导体(鲁塞)公司 | Method for precharging an integrated circuit power supply and corresponding integrated circuit |
| CN109346123A (en) * | 2018-10-24 | 2019-02-15 | 上海华力微电子有限公司 | A kind of novel test port external high pressure switching circuit |
| WO2020098404A1 (en) * | 2018-11-14 | 2020-05-22 | 珠海格力电器股份有限公司 | Low-power-consumption pmos tube substrate switching circuit with voltage isolation function, and integrated chip |
| CN111193506A (en) * | 2018-11-14 | 2020-05-22 | 珠海格力电器股份有限公司 | Low-power consumption PMOS pipe substrate switching circuit with voltage isolation |
| CN111193506B (en) * | 2018-11-14 | 2021-08-31 | 珠海格力电器股份有限公司 | Low-power consumption PMOS pipe substrate switching circuit with voltage isolation |
| US11418171B2 (en) | 2018-11-14 | 2022-08-16 | Gree Electric Appliances, Inc. Of Zhuhai | Low power consumption switching circuit with voltage isolation function for PMOS transistor bulk, and integrated chip |
| CN110994770A (en) * | 2019-12-30 | 2020-04-10 | 武汉瑞纳捷电子技术有限公司 | Dual-power switching circuit and Internet of things chip adopting same |
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| CN104993574B (en) | 2017-06-06 |
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Address after: No. 8, 3rd Floor, Building 72, Jinrun Industrial Park, Gaoxin Community, Gaochang Town, Xuzhou District, Yibin City, Sichuan Province, 644609 Patentee after: Sichuan Giant Micro Integrated Circuit Co.,Ltd. Address before: Room 808, Building B, No. 2305, Zuchong Road, Pudong New Area, Shanghai, 201203 Patentee before: SHANGHAI MACROGIGA ELECTRONICS Co.,Ltd. |
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