CN206224465U - The circuit of the variable bus address of IIC devices - Google Patents
The circuit of the variable bus address of IIC devices Download PDFInfo
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- CN206224465U CN206224465U CN201621337951.9U CN201621337951U CN206224465U CN 206224465 U CN206224465 U CN 206224465U CN 201621337951 U CN201621337951 U CN 201621337951U CN 206224465 U CN206224465 U CN 206224465U
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Abstract
The utility model is related to IIC device bus address control field, discloses a kind of circuit of the variable bus address of IIC devices, and in solving the system of more than two main control chips, certain chip occur can not normally and the problem that is communicated of IIC devices.Including an IIC device, multiple main control chips for communicating with are connected with the communication ends of IIC devices, each address pin of IIC devices is connected by a control circuit with one of signal control end of each main control chip；Control circuit includes power end, metal-oxide-semiconductor, resistance one and resistance two, wherein, the drain electrode of metal-oxide-semiconductor is connected with one end of resistance one, the address pin of IIC devices, the source ground of metal-oxide-semiconductor, the grid of metal-oxide-semiconductor is connected with one end of resistance two, the other end of resistance one is connected with power end, and the other end of resistance two is connected with the signal control end of main control chip.The utility model is applied to the IIC device bus communication systems for possessing more than two main control chips.
Description
Technical field
The utility model is related to IIC device bus address control field, the more particularly to electricity of the variable bus address of IIC devices
Road.
Background technology
In electronic product, various functions are largely realized using integrated circuit, each integrated circuit has respective independence
Effect.In a complete system, typically there are one or several main control chips, along with the integrated circuit of periphery, reach
To the realization of function.In the integrated circuit of periphery, there is the device that some are needed and main control chip is communicated, various logical
In news agreement, iic bus communication occupies the application of most reality.For the device communicated using iic bus, in system
In, it is normal to reach communication, can only possess a unique bus address.In current design of electronic products, usually producing
In the design planning of product early stage, realized by assigning the fixed bus address of to IIC devices.This fixed IIC devices
The method of bus address, in an independence, closing, fixed system, is easily achieved, but, if having two or with
On complication system, realize interconnect during, to be communicated to same IIC devices, it is possible to exist due to
Bus address that main control chip is defined to the device is different, and causes certain system can not normally and asking of being communicated of the device
Topic.
Utility model content
The technical problems to be solved in the utility model is：A kind of circuit of the variable bus address of IIC devices is provided, two are solved
In the system of the main control chip more than individual, certain chip occur can not normally and the problem that is communicated of IIC devices.
To solve the above problems, the technical solution adopted in the utility model is：The circuit of the variable bus address of IIC devices,
Including an IIC device, multiple main control chips for communicating with are connected with the communication ends of IIC devices, IIC devices it is every
One address pin is all connected by a control circuit with one of signal control end of each main control chip；The control electricity
Road includes power end, metal-oxide-semiconductor, resistance one and resistance two, wherein, the drain electrode of metal-oxide-semiconductor and one end of resistance one, the ground of IIC devices
Location pin connection, the source ground of metal-oxide-semiconductor, the grid of metal-oxide-semiconductor is connected with one end of resistance two, the other end and power end of resistance one
Connection, the other end of resistance two is connected with the signal control end of main control chip.
Further, the quantity of above-mentioned main control chip is two.
Further, it is connected with signal isolator between the other end of resistance two and the signal control end of main control chip
Part.
The beneficial effects of the utility model are：By in main control chip and IIC devices, control circuit, each master control core are set
Piece can be changed its bus address to meet the address of main control chip itself and defined requirement with the same IIC devices of independent control, from
And ensure that communication is normal.
Brief description of the drawings
Fig. 1 is circuit diagram of the present utility model.
Numbered in figure：U1 is IIC devices, and master1 is the first main control chip, and master2 is the second main control chip, SCL/
SDA is the communication ends of IIC devices, and VCC is power end, and A0-An is the first to the (n+1)th address pin of IIC devices, and Rn1 is (n+1)th
Pull-up resistor at the pin of address, Rn2 is the resistance two at the (n+1)th address pin, and R01 is the pull-up resistor at the first address pin, R02
It is the resistance two at the first address pin, R11 is resistance one at the second address pin, and R12 is the resistance two at the second address pin, Q0-
Qn is respectively the metal-oxide-semiconductor at the address pin at the first to the (n+1)th place, and C0-Cn is respectively each signal control end of main control chip.
Specific embodiment
Below in conjunction with the accompanying drawings and specific embodiment is described further with regard to the technical solution of the utility model.
As shown in figure 1, IIC devices U1 its communication terminal SDA/SCL connect simultaneously two main control chip master1,
The first address pin A0 of master2, IIC device U1 is connected to one end of pull-up resistor R01, and the other end of pull-up resistor R01 connects
Power end VCC is connected to, the magnitude of voltage of wherein power end VCC is the value of the high level definition that disclosure satisfy that IIC devices U1, the first ground
Location pin A0 is connected to the drain electrode of metal-oxide-semiconductor Q0 simultaneously, and the source ground of metal-oxide-semiconductor Q0, the grid of metal-oxide-semiconductor Q0 connects the R02's of resistance two
One end, the other end of the R02 of resistance two connects the signal control end C0 of the first main control chip master1, when the first main control chip
When master1 controls its signal control end C0 for low level, then the first address pin A0 is high level, when the first main control chip
When master1 controls its signal control end C0 for high level, then the first address pin A0 is low level.Similarly, for IIC devices U1
Other addresses pin A1......An, using it is identical with the first address pin A0 control circuit be designed.In embodiment, by changing
Become the output level of the signal control end of the first main control chip master1 or the second main control chip master2, determine IIC devices
The bus address of part U1, so as to realize the normal implementation of communication.
Above-mentioned resistance R01, R01......Rn1, R02, R12......Rn2 are variable resistance, and specific value is according to full
Depending on the sufficiently conductive actual demand of sufficient metal-oxide-semiconductor circuit.Above-mentioned metal-oxide-semiconductor can also be using transistor come instead of realizing.
Additionally, to avoid being interacted between the signal control end of multiple main control chips, can respectively in the letter of main control chip
Increase signal isolation device, such as optocoupler number between control end C0-Cn and the R02-Rn2 of resistance two.
General principle of the present utility model and main feature are the foregoing described, the description of specification is to illustrate this practicality
New principle, on the premise of the utility model spirit and scope are not departed from, the utility model also has various change and changes
Enter, these changes and improvements are both fallen within the range of claimed the utility model.
Claims (3)
- The circuit of the variable bus address of 1.IIC devices, including an IIC device, it is characterised in that in the communication ends of IIC devices Be connected with multiple main control chips for communicating with, each address pin of IIC devices by a control circuit with it is every One of signal control end connection of individual main control chip；The control circuit includes power end, metal-oxide-semiconductor, resistance one and resistance Two, wherein, the drain electrode of metal-oxide-semiconductor is connected with the address pin of one end of resistance one, IIC devices, the source ground of metal-oxide-semiconductor, metal-oxide-semiconductor Grid is connected with one end of resistance two, and the other end of resistance one is connected with power end, the other end and the main control chip of resistance two Signal control end is connected.
- 2. the circuit of the variable bus address of IIC devices according to claim 1, it is characterised in that the quantity of main control chip It is two.
- 3. the circuit of the variable bus address of IIC devices according to claim 1, it is characterised in that in the another of resistance two Signal isolation device is connected between end and the signal control end of main control chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621337951.9U CN206224465U (en) | 2016-12-07 | 2016-12-07 | The circuit of the variable bus address of IIC devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201621337951.9U CN206224465U (en) | 2016-12-07 | 2016-12-07 | The circuit of the variable bus address of IIC devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206224465U true CN206224465U (en) | 2017-06-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201621337951.9U Active CN206224465U (en) | 2016-12-07 | 2016-12-07 | The circuit of the variable bus address of IIC devices |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112504460A (en) * | 2020-07-30 | 2021-03-16 | 河南科技大学 | Electronic temperature measuring box integrating harmful gas detection function |
| CN112597732A (en) * | 2020-11-20 | 2021-04-02 | 南京天易合芯电子有限公司 | Method and system for changing IIC device address through software configuration |
-
2016
- 2016-12-07 CN CN201621337951.9U patent/CN206224465U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112504460A (en) * | 2020-07-30 | 2021-03-16 | 河南科技大学 | Electronic temperature measuring box integrating harmful gas detection function |
| CN112597732A (en) * | 2020-11-20 | 2021-04-02 | 南京天易合芯电子有限公司 | Method and system for changing IIC device address through software configuration |
| CN112597732B (en) * | 2020-11-20 | 2024-03-26 | 南京天易合芯电子有限公司 | Method and system for changing IIC device address through software configuration |
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