CN204205704U - A kind of power selection circuit - Google Patents
A kind of power selection circuit Download PDFInfo
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- CN204205704U CN204205704U CN201420633432.1U CN201420633432U CN204205704U CN 204205704 U CN204205704 U CN 204205704U CN 201420633432 U CN201420633432 U CN 201420633432U CN 204205704 U CN204205704 U CN 204205704U
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- output
- power supply
- selection circuit
- pmos
- nmos tube
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Abstract
The utility model discloses a kind of power selection circuit, first switch of described power selection circuit, be connected between described first power supply and described first output, in order to control the break-make between described first power supply and described first output, described load is connected between described first output and described second output; Second switch is connected between described second power supply and described first output, in order to control the break-make between described second power supply and described first output; Selection circuit comprises two outputs, and the first output of described selection circuit connects the control end of described first switch, and the second output of described selection circuit connects the control end of described second switch.This circuit structure is simple, and the space taking PCB is little, and cost is low.
Description
Technical field
The utility model relates to Power Management Design field, particularly relates to a kind of power selection circuit.
Background technology
Along with the fast development of scientific and technological level, embedded device has come into the life of people, and the life of it and people is closely bound up.Therefore the requirement of its embedded device reliability is constantly increased, and power supply determines that can embedded device one of the key factor of steady operation.Have a lot of embedded device to have two or more power supplys to system power supply at present, when a road power failure, other power supplys changeable are system power supply, to prevent equipment from cannot normally work because of power interruptions, so that the unnecessary economic loss brought.
Existing power selection circuit is mainly contained and is overlapped by components and parts, utilizes the on-off action of metal-oxide-semiconductor to realize the selection of power supply or to be realized the selection of power supply by chip internal mode selection circuit.Adopt chip internal logic control circuit and internal schema to select module to realize the selection of power supply, there is the problem that cost is high.Utilize metal-oxide-semiconductor, diode and triode to build complicated power selection circuit, because the components and parts increased are more, not only cost is high, but also takies a large amount of PCB spaces.
Summary of the invention
For the problems referred to above that existing power selection circuit exists, one is now provided to be intended to implementation structure simple, strong operability, and the little power selection circuit that takes up room.
Concrete technical scheme is as follows:
A kind of power selection circuit, comprising:
First power supply;
Second power supply;
First output;
Second output;
First switch, is connected between described first power supply and described first output, and in order to control the break-make between described first power supply and described first output, load is connected between described first output and described second output;
Second switch, is connected between described second power supply and described first output, in order to control the break-make between described second power supply and described first output;
Selection circuit, described selection circuit comprises two outputs, and the first output of described selection circuit connects the control end of described first switch, and the second output of described selection circuit connects the control end of described second switch;
When described first power supply work, when described second power supply does not work, the first output of described selection circuit controls described first switch conduction, and described second switch disconnects, and makes conducting between described first power supply and described first output;
When described first power supply does not work, during described second power supply work, the second output of described selection circuit controls described second switch conducting, and described first switch disconnects, and makes conducting between described second power supply and described first output.
Preferably, described first switch adopts the first PMOS, the drain electrode of described first PMOS connects described first power supply, and the grid of described first PMOS forms the control end of described first switch, and the source electrode of described first PMOS connects described first output.
Preferably, described second switch adopts the second PMOS, the source electrode of described second PMOS connects described first output, and the grid of described second PMOS forms the control end of described second switch, and the drain electrode of described second PMOS connects described second power supply.
Preferably, described selection circuit comprises:
First NMOS tube, the grid of described first NMOS tube connects described first power supply, the source ground of described first NMOS tube; The drain electrode of described first NMOS tube forms the first output of described selection circuit.
Preferably, described selection circuit comprises:
Second NMOS tube, the source ground of described second NMOS tube, the drain electrode of described second NMOS tube forms the second output of described selection circuit.
Preferably, described selection circuit also comprises:
Commutation circuit, described commutation circuit comprises three inputs and an output, the first input end of described commutation circuit connects the grid of described first NMOS tube, second input of described commutation circuit connects described second power supply, 3rd input end grounding of described commutation circuit, the output of described commutation circuit connects the grid of described second NMOS tube.
Preferably, described commutation circuit also comprises: the 3rd NMOS tube and the 3rd PMOS, the grid of described 3rd NMOS tube and the gate connected in parallel of described 3rd PMOS form the first input end of described commutation circuit, the drain electrode of described 3rd PMOS forms the second input of described commutation circuit, the source electrode of described 3rd NMOS tube forms the 3rd input of described commutation circuit, the source electrode of described 3rd PMOS and the drain electrode output forming described commutation circuit in parallel of described 3rd NMOS tube.
Preferably, described selection circuit also comprises:
First resistance, described first resistant series is between the first input end and earth terminal of described commutation circuit.
The beneficial effect of technique scheme:
The selection of corresponding power supply only need can be realized by the conducting of the transistor of four in selection circuit and cut-off.If there is fault can carry out electrical source exchange voluntarily, circuit structure is simple, and decrease the space taking PCB, cost is low, and workable.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of a kind of embodiment of power selection circuit described in the utility model;
Fig. 2 is the circuit diagram of the another kind of embodiment of power selection circuit described in the utility model.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, the every other embodiment that those of ordinary skill in the art obtain under the prerequisite of not making creative work, all belongs to the scope of the utility model protection.
It should be noted that, when not conflicting, the embodiment in the utility model and the feature in embodiment can combine mutually.
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail, but not as restriction of the present utility model.
As shown in Figure 1, a kind of power selection circuit can comprise:
First power supply VCC;
Second power supply VDD;
First output terminals A;
Second output;
First switch, is connected between the first power supply VCC and the first output terminals A, and in order to control the break-make between the first power supply VCC and the first output terminals A, load is connected between the first output terminals A and the second output;
Second switch, is connected between the second power supply VDD and the first output terminals A, in order to control the break-make between the second power supply VDD and the first output terminals A;
Selection circuit, selection circuit comprises two outputs, and the first output of selection circuit connects the control end of the first switch, and the second output of selection circuit connects the control end of second switch;
When the first power supply VCC works, when the second power supply VDD does not work, the first output of selection circuit controls the first switch conduction, and second switch disconnects, and makes conducting between the first power supply VCC and the first output;
When the first power supply VCC does not work, when the second power supply VDD works, the second output of selection circuit controls second switch conducting, and the first switch disconnects, and makes conducting between the second power supply VDD and the first output.
In the present embodiment, the switching of the first power supply VCC and the second power supply VDD can be realized by selection circuit, if the first power supply VCC has during fault can carry out electrical source exchange voluntarily, make the second power supply VDD and the first output terminals A conducting, this circuit structure is simple, decrease the space taking PCB, cost is low, and workable.
Further, as shown in Figure 1, wherein load is represented by the load resistance RL of an equivalence, and it is that load resistance RL powers that selection circuit switches the first power supply VCC or the second power supply VDD.
As shown in Figure 2, in a preferred embodiment, the first switch adopts the first PMOS Q1, and the drain electrode of the first PMOS Q1 connects the first power supply VCC, the grid of the first PMOS Q1 forms the control end of the first switch, and the source electrode of the first PMOS Q1 connects the first output terminals A.
When the first power supply VCC normally works, the first output output low level of selection circuit, the first PMOS Q1 conducting, makes the first power supply VCC be that load resistance RL powers.
In a preferred embodiment, second switch adopts the second PMOS Q2, and the source electrode of the second PMOS Q2 connects the first output terminals A, and the grid of the second PMOS forms the control end of second switch, and the drain electrode of the second PMOS connects the second power supply VDD.
When the first power supply VCC breaks down, the first output of selection circuit exports high level, and the first PMOS Q1 cut-off, the second output output low level, the second PMOS Q2 conducting, makes the second power supply VDD be that load resistance RL powers.
In a preferred embodiment, selection circuit can comprise:
The grid of the first NMOS tube Q4, the first NMOS tube Q4 connects the first power supply VCC, the source ground of the first NMOS tube Q4; The drain electrode of the first NMOS tube Q4 forms the first output of selection circuit.
When the first power supply VCC normally works, when second power supply VDD does not work, the gate source voltage Vgs of the first NMOS tube Q4 is greater than cut-in voltage Vth, therefore, first NMOS tube Q4 is in conducting state, and the grid of the first PMOS Q1 is equivalent to ground connection, therefore, first PMOS Q1 is in conducting state, thus the first power supply VCC is load resistance RL powers; When the first power supply VCC breaks down and can not work, when second power supply VDD works, the gate source voltage Vgs of the first NMOS tube Q4 equals 0, so cut-off, first PMOS Q1 cut-off, thus make the first power supply VCC cannot power for load resistance RL, the second power supply VDD is that load resistance RL powers.
In a preferred embodiment, selection circuit also can comprise:
Second NMOS tube Q6, the source ground of the second NMOS tube Q6, the drain electrode of the second NMOS tube Q6 forms the second output of selection circuit.
In a preferred embodiment, selection circuit also can comprise:
Commutation circuit, commutation circuit comprises three inputs and an output, the first input end of commutation circuit connects the grid of the first NMOS tube Q4, second input of commutation circuit connects the second power supply VDD, 3rd input end grounding of commutation circuit, the output of commutation circuit connects the grid of the second NMOS tube Q6.
In a preferred embodiment, commutation circuit also can comprise: the 3rd NMOS tube Q5 and the 3rd PMOS Q3, the grid of the 3rd NMOS tube Q5 and the gate connected in parallel of the 3rd PMOS Q3 form the first input end of commutation circuit, the drain electrode of the 3rd PMOS Q3 forms the second input of commutation circuit, the source electrode of the 3rd NMOS tube Q5 forms the 3rd input of commutation circuit, the source electrode output that form commutation circuit in parallel with the drain electrode of the 3rd NMOS tube Q5 of the 3rd PMOS Q3.
From in Fig. 2, when the first power supply VCC works, when second power supply VDD does not work, the gate source voltage Vgs of the first NMOS tube Q4 is greater than cut-in voltage Vth, therefore, first NMOS tube Q4 is in conducting state, the grid of the first PMOS Q1 is equivalent to ground connection, therefore, the first PMOS Q1 is in conducting state, the 3rd NMOS tube Q5 conducting, 3rd PMOS Q3 cut-off, second NMOS tube Q6 cut-off, so the second PMOS Q2 is in cut-off state, therefore only has the first power supply VCC to power to load resistance RL.
When the first power supply VCC does not work, and when the second power supply VDD works, the gate source voltage Vgs of a NMOS pipe Q4 equals 0, so cut-off, and the first PMOS Q1 cut-off.In like manner, the 3rd PMOS Q3 conducting and the 3rd NMOS tube Q5 cut-off, the second NMOS tube Q6 conducting, the grid of the second PMOS Q2 is equivalent to ground connection, so the second PMOS Q2 conducting.To sum up, the second PMOS Q2 conducting when the first PMOS Q1 cut-off, the second power supply VDD just can power directly to load resistance RL.That is, when the first power supply VCC breaks down time, system can automatically switch to the second power supply VDD and power.
In a preferred embodiment, selection circuit also can comprise:
First resistance R1, the first resistance R1 is series between the first input end of commutation circuit and earth terminal GND, in order to protection power source selection circuit.
In the present embodiment, only used several simple discrete device: transistor and resistance etc. just can realize mains switch controlling functions, realized selection and the standby functions of power supply by the conducting of metal-oxide-semiconductor and cut-off, have logical circuit simple, increase the advantage that device is less, greatly save device cost.
The foregoing is only the utility model preferred embodiment; not thereby execution mode of the present utility model and protection range is limited; to those skilled in the art; should recognize and all should be included in the scheme that equivalent replacement done by all utilization the utility model specifications and diagramatic content and apparent change obtain in protection range of the present utility model.
Claims (8)
1. a power selection circuit, is characterized in that, comprising:
First power supply;
Second power supply;
First output;
Second output;
First switch, is connected between described first power supply and described first output, and in order to control the break-make between described first power supply and described first output, load is connected between described first output and described second output;
Second switch, is connected between described second power supply and described first output, in order to control the break-make between described second power supply and described first output;
Selection circuit, described selection circuit comprises two outputs, and the first output of described selection circuit connects the control end of described first switch, and the second output of described selection circuit connects the control end of described second switch;
When described first power supply work, when described second power supply does not work, the first output of described selection circuit controls described first switch conduction, and described second switch disconnects, and makes conducting between described first power supply and described first output;
When described first power supply does not work, during described second power supply work, the second output of described selection circuit controls described second switch conducting, and described first switch disconnects, and makes conducting between described second power supply and described first output.
2. power selection circuit as claimed in claim 1, it is characterized in that, described first switch adopts the first PMOS, the drain electrode of described first PMOS connects described first power supply, the grid of described first PMOS forms the control end of described first switch, and the source electrode of described first PMOS connects described first output.
3. power selection circuit as claimed in claim 1, it is characterized in that, described second switch adopts the second PMOS, the source electrode of described second PMOS connects described first output, the grid of described second PMOS forms the control end of described second switch, and the drain electrode of described second PMOS connects described second power supply.
4. power selection circuit as claimed in claim 1, it is characterized in that, described selection circuit comprises:
First NMOS tube, the grid of described first NMOS tube connects described first power supply, the source ground of described first NMOS tube; The drain electrode of described first NMOS tube forms the first output of described selection circuit.
5. power selection circuit as claimed in claim 4, it is characterized in that, described selection circuit comprises:
Second NMOS tube, the source ground of described second NMOS tube, the drain electrode of described second NMOS tube forms the second output of described selection circuit.
6. power selection circuit as claimed in claim 5, it is characterized in that, described selection circuit also comprises:
Commutation circuit, described commutation circuit comprises three inputs and an output, the first input end of described commutation circuit connects the grid of described first NMOS tube, second input of described commutation circuit connects described second power supply, 3rd input end grounding of described commutation circuit, the output of described commutation circuit connects the grid of described second NMOS tube.
7. power selection circuit as claimed in claim 6, it is characterized in that, described commutation circuit also comprises: the 3rd NMOS tube and the 3rd PMOS, the grid of described 3rd NMOS tube and the gate connected in parallel of described 3rd PMOS form the first input end of described commutation circuit, the drain electrode of described 3rd PMOS forms the second input of described commutation circuit, the source electrode of described 3rd NMOS tube forms the 3rd input of described commutation circuit, the source electrode of described 3rd PMOS and the drain electrode output forming described commutation circuit in parallel of described 3rd NMOS tube.
8. power selection circuit as claimed in claim 6, it is characterized in that, described selection circuit also comprises:
First resistance, described first resistant series is between the first input end and earth terminal of described commutation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420633432.1U CN204205704U (en) | 2014-10-28 | 2014-10-28 | A kind of power selection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420633432.1U CN204205704U (en) | 2014-10-28 | 2014-10-28 | A kind of power selection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204205704U true CN204205704U (en) | 2015-03-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420633432.1U Expired - Fee Related CN204205704U (en) | 2014-10-28 | 2014-10-28 | A kind of power selection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204205704U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109283992A (en) * | 2017-07-21 | 2019-01-29 | 华为终端（东莞）有限公司 | A kind of bidirectional power supply protection circuit |
| CN109617040A (en) * | 2018-12-24 | 2019-04-12 | 出门问问信息科技有限公司 | A kind of power supply circuit |
-
2014
- 2014-10-28 CN CN201420633432.1U patent/CN204205704U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109283992A (en) * | 2017-07-21 | 2019-01-29 | 华为终端（东莞）有限公司 | A kind of bidirectional power supply protection circuit |
| CN109283992B (en) * | 2017-07-21 | 2020-09-29 | 华为终端有限公司 | Bidirectional power supply protection circuit |
| CN109617040A (en) * | 2018-12-24 | 2019-04-12 | 出门问问信息科技有限公司 | A kind of power supply circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150311 Termination date: 20181028 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |