CN104967844A - Automatic LVDS (Low Voltage Differential Signaling) video signal testing method and device - Google Patents
Automatic LVDS (Low Voltage Differential Signaling) video signal testing method and device Download PDFInfo
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Abstract
The invention discloses an automatic LVDS (Low Voltage Differential Signaling) video signal testing method and a device. The method comprises steps: according to LVDS transmission configuration parameters, LVDS transmission reference parameters, LVDS electrical reference parameters, LVDS signal synchronization deviation range parameters, LVDS clock transmission sequence parameters, LVDS signal source image time sequence parameters and LVDS receiving setting parameters which are received from an upper layer, inputted LVDS video signals are detected, detection results generate a LVDS transmission detection report, a LVDS electrical detection report, a LVDS signal synchronization deviation detection report, a LVDS video clock detection report, an image data error code detection report and a synchronization signal error code detection report which are sent to upper-layer software to be displayed. LVDS video signals of multiple LINKs are detected, transmission features, electrical features, the LVDS transmission clock, and the LVDS image data themselves are detected, the operation is simple, no other complicated and expensive testing device is needed, the testing efficiency is high, and the method and the device can be used in a large scale in a factory.
Description
Technical field
The present invention relates to display and the field tests of liquid crystal module, refer to a kind of LVDS vision signal automatic test approach and device particularly.
Background technology
At LVDS (Low Voltage Differential Signaling, Low Voltage Differential Signal) liquid crystal module uses client and production firm when carrying out production and detecting, often needs to detect the minimum requirements whether LVDS vision signal can reach required display effect.General image signal source or video flap often do not possess this function, and often check signal with oscilloscope at test in laboratory LVDS signal.But then cannot do so aborning, because the clock signal in LVDS vision signal is separated with data-signal, and data signal line is more, be difficult to check all signals with oscilloscope; And every bar LVDS holding wire all requires transmission according to VESA or JESDALVDS video protocols, and a lot of oscilloscope is protocol analysis function often, artificially need analyze data, and this non-generic operating personnel can be competent at.
For this reason, need the rapid analysis of a kind of automatic test equipment energy and go out LVDS vision signal and whether correctly can show on LVDS display, and can be used in the production process of Related product.
Summary of the invention
For the deficiencies in the prior art, the object of this invention is to provide one and can analyze LVDS video signal transmission quality, test, and produce LVDS vision signal automatic test approach and the device of corresponding test report.
For achieving the above object, a kind of LVDS vision signal automatic test approach designed by the present invention, its special character is, comprises the steps:
1) receive LVDS transmission configuration parameter from upper strata, LVDS transmission basic parameter, LVDS electrical reference parameter, LVDS signal synchronism deviation range parameter, LVDS clock transfer sequential parameter, LVDS signal source image time sequence parameter and LVDS receive parameters;
2) receive LVDS vision signal, detect the LVDS transformation parameter of received signal, and compared with transmit basic parameter with described LVDS, then comparative result is produced LVDS and transmit examining report and be sent to upper strata and show;
3) electrical characteristic of received signal is sampled, and sampled signal is electrically detected, compared with described LVDS electrical reference parameter, then comparative result is produced the electric examining report of LVDS be sent to upper strata display;
4) LVDS clock and data syn-chronization detection is carried out, frequency multiplication is carried out to the LVDS clock in received signal, produce sampling clock, sample with sampling clock each LVDS data signal line to received signal, calculate the delay distortion between each holding wire, and compare with described LVDS signal synchronism deviation range parameter, then comparative result is produced LVDS signal synchronism deviation examining report be sent to upper strata display, then received signal is carried out cache synchronization;
5) carry out LVDS clock transfer bit sequence pattern to detect, first LVDS clock to received signal carries out the reception sampling clock that frequency multiplication is reduced into LVDS video data, then according to described LVDS clock transfer sequential parameter, picture synchronization signal is gone out to the signal receiving received, local LVDS picture synchronization signal is produced again according to described LVDS signal source image time sequence parameter, by local LVDS picture synchronization signal compared with the picture synchronization signal demodulated, then comparative result is produced LVDS video clock examining report be sent to upper strata display;
6) transmission error code carrying out view data detects, first according to described LVDS transmission configuration parameter, the signal receiving received is gone out to the RGB image pixel clock of each LVDS data signal line, rgb image data and RGB synchronizing signal, then input reference picture signal, under the control of RGB image pixel clock and reference amble signal, by the rgb image data of each LVDS data signal line compared with the reference image data in benchmark image signal, by RGB synchronizing signal compared with the reference amble signal in benchmark image signal, again comparative result is produced respectively view data Error detection report and synchronizing signal Error detection report be sent to upper strata show.
Preferably, described step 3) also comprise before: receive parameters according to described LVDS, to the signal received be terminated impedance adjustment, receive and balanced to arrange, receive the operation that Slew Rate and shake arrange, ensure that LVDS signal recuperation gives subsequent operation to optimum state.
Preferably, described step 4) also comprise before: shaping operation is carried out to the signal received, ensures that LVDS signal recuperation gives subsequent operation to optimum state.
Preferably, described LVDS transmission basic parameter comprises signal jitter, preemphasis overshoot/undershoot, rising edge/trailing edge, high frequency attenuation.
Preferably, described LVDS electrical reference parameter comprises LVDS differential level, level zero deviation, drive current intensity.
Preferably, described LVDS transmission configuration parameter comprises LVDS transmission of video coding VESA/JEIDA parameters, LVDS transmits color range 6bit/8bit/10bit parameters, LVDS transmits Link number parameters.
Preferably, described LVDS reception parameters comprises LVDS termination impedance adjustment parameter, receives balanced parameters, receives Slew Rate and shake parameters.
A kind of device realizing above-mentioned LVDS vision signal automatic test approach, its special character is, comprises high-level interface module, LVDS signal transmission characteristics detection module, LVDS signal electrical characteristic sampling module, LVDS signal electrical characteristic detection module, LVDS video clock data syn-chronization detection module, LVDS video demodulator module, LVDS video clock transfer sequence detection module, benchmark image signal generator module and LVDS view data detection module;
Described high-level interface module is used for receiving LVDS transmission configuration parameter from upper strata, LVDS transmits basic parameter, LVDS electrical reference parameter, LVDS signal synchronism deviation range parameter, LVDS clock transfer sequential parameter, LVDS signal source image time sequence parameter and LVDS receive parameters and transfer to LVDS signal transmission characteristics detection module respectively, LVDS signal electrical characteristic detection module, LVDS video clock data syn-chronization detection module, LVDS video demodulator module, LVDS video clock transfer sequence detection module and benchmark image signal generator module,
Described LVDS signal transmission characteristics detection module is for the LVDS signal that receives and detect the LVDS transformation parameter of received signal, produces LVDS and transmits examining report and be sent to high-level interface module;
Described LVDS signal electrical characteristic sampling module is used for the sampling LVDS signal received being carried out to electrical characteristic, and sampled signal is sent to LVDS signal electrical characteristic detection module;
Described LVDS signal electrical characteristic detection module is used for the LVDS transformation parameter according to described LVDS electrical reference parameter detecting received signal, produces the electric examining report of LVDS and is sent to high-level interface module;
Described LVDS video clock data syn-chronization detection module, for according to the delay distortion between each holding wire of described LVDS signal synchronism deviation range parameter detection received signal, produces LVDS signal synchronism deviation examining report and is sent to high-level interface module;
It is RGB image pixel clock, rgb image data and RGB synchronizing signal that described LVDS video demodulator module is used for according to LVDS transmission configuration parameter demodulating received signal, and is sent to LVDS image detection module;
Described LVDS video clock transfer sequence detection module is used for the LVDS video clock transmission bit sequence detecting Received signal strength according to LVDS clock transfer sequential parameter and LVDS signal source image time sequence parameter, produces LVDS video clock examining report and is sent to high-level interface module;
Described benchmark image signal generator module is used for, according to described LVDS transmission configuration parameter, the benchmark image signal of input is sent to LVDS view data detection module;
Described LVDS view data detection module be used for will receive from LVDS video demodulator module RGB image pixel clock, rgb image data with RGB synchronizing signal with the reference image data received from benchmark image signal generator module compared with, then comparative result is produced view data Error detection report and synchronizing signal Error detection report be sent to high-level interface module.
Further, also comprise the LVDS Signal reception matching module be connected with high-level interface module, LVDS signal transmission characteristics detection module, LVDS signal electrical characteristic sampling module, LVDS video clock data syn-chronization detection module respectively, the signal that described LVDS Signal reception matching module is used for receiving carries out reception match control.
Further, also comprise the electric Shaping Module of LVDS signal be connected with LVDS Signal reception matching module and LVDS video clock data syn-chronization detection module respectively, the signal that the electric Shaping Module of described LVDS signal is used for receiving carries out shaping operation.
Beneficial effect of the present invention is:
(1) the present invention can detect the LVDS vision signal of multiple LINK, comprises its transmission characteristic, electrical characteristic carries out testing and testing result being issued upper strata.
(2) the present invention can detect it to LVDS transfer clock and whether meets transmission mode sequence, to LVDS clock and its transmitting synchronous of Data Detection, and testing result is issued upper strata.
(3) the present invention itself can detect the view data of LVDS, to detect in generation and transmitting image, whether has data errors phenomenon.And testing result is issued upper strata.
(4) the present invention is simple to operate, and without the need to the testing equipment of other complex and expensive, testing efficiency is high, is convenient to use on a large scale in factory.
(5) the present invention is by with FPGA (field programmable logic array) chip, not only working stability, realize easily, and low price, easy to operate.
Accompanying drawing explanation
Fig. 1 is the block diagram of LVDS vision signal automatic testing equipment of the present invention.
In figure: high-level interface module 1, LVDS signal transmission characteristics detection module 2, LVDS Signal reception matching module 3, LVDS signal electrical characteristic sampling module 4, LVDS signal electrical characteristic detection module 5, the electric Shaping Module 6 of LVDS signal, LVDS video clock data syn-chronization detection module 7, LVDS video demodulator module 8, LVDS video clock transfer sequence detection module 9, benchmark image signal generator module 10, LVDS view data detection module 11.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail.
As shown in Figure 1, a kind of LVDS vision signal automatic testing equipment provided by the present invention, comprises high-level interface module 1, LVDS signal transmission characteristics detection module 2, LVDS Signal reception matching module 3, LVDS signal electrical characteristic sampling module 4, LVDS signal electrical characteristic detection module 5, the electric Shaping Module 6 of LVDS signal, LVDS video clock data syn-chronization detection module 7, LVDS video demodulator module 8, LVDS video clock transfer sequence detection module 9, benchmark image signal generator module 10 and LVDS view data detection module 11.
High-level interface module 1 respectively with LVDS signal transmission characteristics detection module 2, LVDS Signal reception matching module 3, LVDS signal electrical characteristic detection module 5, LVDS video clock data syn-chronization detection module 7, LVDS video demodulator module 8, LVDS video clock transfer sequence detection module 9 is connected with benchmark image signal generator module 10, LVDS signal transmission characteristics detection module 2 is connected with LVDS signal electrical characteristic detection module 5 by LVDS signal electrical characteristic sampling module 4, LVDS signal transmission characteristics detection module 2 is also connected with LVDS Signal reception matching module 3, LVDS Signal reception matching module 3 is connected with LVDS video clock data syn-chronization detection module 7 by the electric Shaping Module 6 of LVDS signal, LVDS video clock data syn-chronization detection module 7 is connected with LVDS video demodulator module 8 and LVDS video clock transfer sequence detection module 9 respectively, LVDS video clock transfer sequence detection module 9 respectively with LVDS video demodulator module 8, benchmark image signal generator module 10 is connected with LVDS view data detection module 11, LVDS video demodulator module 8 and benchmark image signal generator module 10 are all connected with LVDS view data detection module 11.
High-level interface module 1 is for receiving LVDS transmission configuration parameter from upper strata, LVDS transmits basic parameter, LVDS electrical reference parameter, LVDS signal synchronism deviation range parameter, LVDS clock transfer sequential parameter, LVDS signal source image time sequence parameter and LVDS receive parameters and transfer to LVDS signal transmission characteristics detection module 2 respectively, LVDS signal electrical characteristic detection module 5, LVDS video clock data syn-chronization detection module 7, LVDS video demodulator module 8, LVDS video clock transfer sequence detection module 9 and benchmark image signal generator module 10.
LVDS signal transmission characteristics detection module 2 is for the LVDS signal that receives and detect the LVDS transformation parameter of received signal, produces LVDS and transmits examining report and be sent to high-level interface module 1.
LVDS Signal reception matching module 3 is for carrying out reception match control to the signal received.
Sampled signal for carrying out the sampling of electrical characteristic to the LVDS signal received, and is sent to LVDS signal electrical characteristic detection module 5 by LVDS signal electrical characteristic sampling module 4.
LVDS signal electrical characteristic detection module 5, for the LVDS transformation parameter according to LVDS electrical reference parameter detecting received signal, produces the electric examining report of LVDS and is sent to high-level interface module 1.
The electric Shaping Module 6 of LVDS signal is for carrying out shaping operation to the signal received.
LVDS video clock data syn-chronization detection module 7, for according to the delay distortion between each holding wire of LVDS signal synchronism deviation range parameter detection received signal, produces LVDS signal synchronism deviation examining report and is sent to high-level interface module 1.
LVDS video demodulator module 8 for being RGB image pixel clock, rgb image data and RGB synchronizing signal according to LVDS transmission configuration parameter demodulating received signal, and is sent to LVDS image detection module 11.
LVDS video clock transfer sequence detection module 9, for detecting the LVDS video clock transmission bit sequence of Received signal strength according to LVDS clock transfer sequential parameter and LVDS signal source image time sequence parameter, produces LVDS video clock examining report and is sent to high-level interface module 1.
Benchmark image signal generator module 10 is for being sent to LVDS view data detection module 11 according to LVDS transmission configuration parameter by the benchmark image signal of input.
LVDS view data detection module 11 for by the RGB image pixel received from LVDS video demodulator module 8 clock, rgb image data and RGB synchronizing signal compared with the reference image data received from benchmark image signal generator module 10, then comparative result is produced view data Error detection report and synchronizing signal Error detection report be sent to high-level interface module 1.
The concrete steps realizing LVDS vision signal automatic test approach according to said apparatus comprise:
1) after powering on, upper layer software (applications) sends high-level interface signal to high-level interface module 1, comprise LVDS transmission configuration parameter (as LVDS transmission of video coding VESA/JEIDA is arranged, LVDS transmits color range 6bit/8bit/10bit and arranges, LVDS transmits Link number and arranges), LVDS transmits basic parameter (as signal jitter, preemphasis overshoot/undershoot, Skew, rising edge/trailing edge, the parameters such as high frequency attenuation), LVDS electrical reference parameter (LVDS differential level, level inconsistency, level zero deviation etc., drive current intensity etc.), LVDS signal synchronism deviation range parameter (the delay scope between each line signal that receiving terminal allows), LVDS clock transfer sequential parameter is (as 1110001, 1100011 etc.), LVDS signal source image time sequence parameter and LVDS receive parameters (as the adjustment of LVDS termination impedance, receive balanced setting, reception Slew Rate and shake are arranged).
LVDS is transmitted basic parameter and is sent to LVDS signal transmission characteristics detection module 2 by high-level interface module 1, LVDS is received parameters and be sent to LVDS Signal reception matching module 3, LVDS electrical reference parameter is sent to LVDS signal electrical characteristic detection module 5, LVDS signal synchronism deviation range parameter is sent to LVDS video clock data syn-chronization detection module 7, LVDS clock transfer sequential parameter is sent to LVDS video clock transfer sequence detection module 9, LVDS signal source image time sequence parameter is sent to LVDS video clock transfer sequence detection module 9, LVDS transmission configuration parameter is sent to LVDS video demodulator module 8 and benchmark image signal generator module 10 respectively.
2) LVDS signal transmission characteristics detection module 2 receives LVDS vision signal, the LVDS vision signal received comprises LVDS video clock signal and each LVDS data signal line of Link-0 ~ Link-n, the LVDS transformation parameter that basic parameter detects received signal is transmitted according to the LVDS that high-level interface module 1 sends, and compared with transmitting basic parameter with LVDS, if the data fit basic parameter detected, passed through by high-level interface module 1 report, otherwise report unsuccessfully, the data of detection are transmitted examining report by LVDS simultaneously and be sent to high-level interface module 1.
3) received LVDS signal is sent into LVDS Signal reception matching module 3 by LVDS signal transmission characteristics detection module 2, for guaranteeing that follow-up detection operation is not subject to the impact of Signal transmissions distortion, therefore carry out reception match control at LVDS Signal reception matching module 3, by arranging, receiving Slew Rate and shake setting the adjustment of LVDS termination impedance, reception equilibrium, thus give subsequent operation by LVDS signal recuperation to optimum state.
4) electrical characteristic of the LVDS signal of LVDS signal electrical characteristic sampling module 4 pairs of LVDS Signal reception matching modules 3 outputs is sampled, and sends into LVDS signal electrical characteristic detection module 5 and electrically detect after obtaining sampled signal.
The LVDS electrical reference parameter that LVDS signal electrical characteristic detection module 5 sends according to high-level interface module 1 electrically detects sampled signal, produces the electric examining report of LVDS and is sent to high-level interface module 1.
5) electrically detecting follow-up detection, being digital bit input, for guaranteeing best LVDS electrical characteristic, therefore in the electric Shaping Module 6 of LVDS signal, shaping being carried out to the LVDS signal of input, making it revert to best condition.
6) synchronism detecting LVDS clock and data is carried out.Now, image signal source needs the square wave test signal each holding wire sending the data to LVDS video clock signal and each Link 1010.When this signal reaches LVDS video clock data syn-chronization detection module 7, frequency multiplication (more than at least 4 frequencys multiplication) is carried out to the test signal that LVDS clock cable produces in LVDS video clock data syn-chronization detection module 7 inside, to produce sampling clock, each LVDS data signal line is sampled, thus be benchmark with clock line, contrast is made to the jump position of the bit1 on data wire, thus the delay distortion calculated between its each holding wire, and compare with LVDS signal synchronism deviation range parameter, again comparative result is produced LVDS signal synchronism deviation examining report and be sent to high-level interface module 1.
7) for carry out follow-up clock bit transfer sequence pattern and view data Error detection reliably, each LVDS data signal line of the Link-0 ~ Link-n of input is also carried out buffer memory by LVDS video clock data syn-chronization detection module 7, export again, to guarantee that sending into follow-up is the signal of Complete Synchronization simultaneously.
8) then carry out LVDS clock transfer bit sequence pattern to detect.LVDS video clock signal after synchronous is sent into LVDS video clock transfer sequence detection module 9 by LVDS video clock data syn-chronization detection module 7, the reception sampling clock that frequency multiplication operation is reduced into LVDS video data is crossed at LVDS video clock transfer sequence detection module 9 back warp, send in LVDS video demodulator module 8, simultaneously LVDS video clock transfer sequence detection module 9 produces LVDS data receiver sampling aligned signal according to LVDS clock transfer sequential parameter (be 1100011 as arranged transmitting bit sequence parameter), to carry out the demodulation operation of the serioparallel exchange of LVDS data, obtain correct parallel demodulation data.Based on this mode of operation, due to the picture synchronization signal (VSYNC on each holding wire, HSYNC, DE) transmission time sequence is identical, and the signal of Link0 must transmit, therefore LVDS video demodulator module 8 first demodulates in picture synchronization signal feeding LVDS video clock transfer sequence detection module 9 on the holding wire of Link0, simultaneously in LVDS video clock transfer sequence detection module 9 according to LVDS signal source image time sequence parameter, produce local LVDS picture synchronization signal (i.e. benchmark Link RGB synchronizing signal), local LVDS picture synchronization signal is compared with the picture synchronization signal on the Link0 of the receiving demodulation of input, if both are identical, represent that LVDS clock transfer bit sequence pattern is correct, otherwise mistake, and the LVDS video clock examining report of generation is sent to high-level interface module 1.
9) transmission error code carrying out view data detects.LVDS video demodulator module 8, according to LVDS transmission configuration parameter, comprises LVDS Video coding (VESA, JEIDA), color range (6bit, 8bit, 10bit) goes out the RGB image pixel clock of each holding wire, rgb image data, RGB synchronizing signal send into LVDS image detection module 11 to the LVDS signal receiving received.
10) benchmark image signal generator module 10 by the equipment such as USB, SD card input with LVDS vision signal transmit identical reference map image source, and according to LVDS Video coding, color range, Link number parameter and benchmark Link RGB synchronizing signal, produce the reference image data of each holding wire and send into LVDS image detection module 11.In LVDS image detection module 11, under the control of RGB image pixel clock and reference amble signal, by the rgb image data of each LVDS data signal line compared with the reference image data in benchmark image signal, by RGB synchronizing signal compared with the reference amble signal in benchmark image signal, then comparative result is produced respectively view data Error detection report and synchronizing signal Error detection report be sent to high-level interface module 1.
11) LVDS of reception is transmitted examining report, the electric examining report of LVDS, LVDS signal synchronism deviation examining report, LVDS video clock examining report by high-level interface module 1, view data Error detection reports and the report of synchronizing signal Error detection is sent to upper layer software (applications) display.
Below be only the preferred embodiment of the present invention, it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention, can also design some improvement, these improvement also should be considered as protection scope of the present invention.
The content that this specification is not described in detail belongs to the known prior art of professional and technical personnel in the field.
Claims (10)
1. a LVDS vision signal automatic test approach, is characterized in that: comprise the steps:
1) receive LVDS transmission configuration parameter from upper strata, LVDS transmission basic parameter, LVDS electrical reference parameter, LVDS signal synchronism deviation range parameter, LVDS clock transfer sequential parameter, LVDS signal source image time sequence parameter and LVDS receive parameters;
2) receive LVDS vision signal, detect the LVDS transformation parameter of received signal, and compared with transmit basic parameter with described LVDS, then comparative result is produced LVDS and transmit examining report and be sent to upper strata and show;
3) electrical characteristic of received signal is sampled, and sampled signal is electrically detected, compared with described LVDS electrical reference parameter, then comparative result is produced the electric examining report of LVDS be sent to upper strata display;
4) LVDS clock and data syn-chronization detection is carried out, frequency multiplication is carried out to the LVDS clock in received signal, produce sampling clock, sample with sampling clock each LVDS data signal line to received signal, calculate the delay distortion between each holding wire, and compare with described LVDS signal synchronism deviation range parameter, then comparative result is produced LVDS signal synchronism deviation examining report be sent to upper strata display, then received signal is carried out cache synchronization;
5) carry out LVDS clock transfer bit sequence pattern to detect, first LVDS clock to received signal carries out the reception sampling clock that frequency multiplication is reduced into LVDS video data, then according to described LVDS clock transfer sequential parameter, picture synchronization signal is gone out to the signal receiving received, local LVDS picture synchronization signal is produced again according to described LVDS signal source image time sequence parameter, by local LVDS picture synchronization signal compared with the picture synchronization signal demodulated, then comparative result is produced LVDS video clock examining report be sent to upper strata display;
6) transmission error code carrying out view data detects, first according to described LVDS transmission configuration parameter, the signal receiving received is gone out to the RGB image pixel clock of each LVDS data signal line, rgb image data and RGB synchronizing signal, then input reference picture signal, under the control of RGB image pixel clock and reference amble signal, by the rgb image data of each LVDS data signal line compared with the reference image data in benchmark image signal, by RGB synchronizing signal compared with the reference amble signal in benchmark image signal, again comparative result is produced respectively view data Error detection report and synchronizing signal Error detection report be sent to upper strata show.
2. LVDS vision signal automatic test approach according to claim 1, it is characterized in that: described step 3) before also comprise: receive parameters according to described LVDS, to the signal received be terminated impedance adjustment, receive and balancedly to arrange, receive the operation that Slew Rate and shake arrange.
3. the LVDS vision signal automatic test approach according to claims 1 or 2, is characterized in that: described step 4) also comprise before: shaping operation is carried out to the signal received.
4. LVDS vision signal automatic test approach according to claim 3, is characterized in that: described LVDS transmits basic parameter and comprises signal jitter, preemphasis overshoot/undershoot, rising edge/trailing edge, high frequency attenuation.
5. LVDS vision signal automatic test approach according to claim 3, is characterized in that: described LVDS electrical reference parameter comprises LVDS differential level, level zero deviation, drive current intensity.
6. LVDS vision signal automatic test approach according to claim 3, is characterized in that: described LVDS transmission configuration parameter comprises LVDS transmission of video coding VESA/JEIDA parameters, LVDS transmits color range 6bit/8bit/10bit parameters, LVDS transmits Link number parameters.
7. LVDS vision signal automatic test approach according to claim 2, is characterized in that: described LVDS receives parameters and comprises LVDS termination impedance adjustment parameter, receives balanced parameters, receives Slew Rate and shake parameters.
8. one kind realizes the device of LVDS vision signal automatic test approach according to claim 1, it is characterized in that: comprise high-level interface module (1), LVDS signal transmission characteristics detection module (2), LVDS signal electrical characteristic sampling module (4), LVDS signal electrical characteristic detection module (5), LVDS video clock data syn-chronization detection module (7), LVDS video demodulator module (8), LVDS video clock transfer sequence detection module (9), benchmark image signal generator module (10) and LVDS view data detection module (11),
Described high-level interface module (1) is for receiving LVDS transmission configuration parameter from upper strata, LVDS transmits basic parameter, LVDS electrical reference parameter, LVDS signal synchronism deviation range parameter, LVDS clock transfer sequential parameter, LVDS signal source image time sequence parameter and LVDS receive parameters and transfer to LVDS signal transmission characteristics detection module (2) respectively, LVDS signal electrical characteristic detection module (5), LVDS video clock data syn-chronization detection module (7), LVDS video demodulator module (8), LVDS video clock transfer sequence detection module (9) and benchmark image signal generator module (10),
Described LVDS signal transmission characteristics detection module (2) is for the LVDS signal that receives and detect the LVDS transformation parameter of received signal, produces LVDS and transmits examining report and be sent to high-level interface module (1);
Sampled signal for carrying out the sampling of electrical characteristic to the LVDS signal received, and is sent to LVDS signal electrical characteristic detection module (5) by described LVDS signal electrical characteristic sampling module (4);
Described LVDS signal electrical characteristic detection module (5), for the LVDS transformation parameter according to described LVDS electrical reference parameter detecting received signal, produces the electric examining report of LVDS and is sent to high-level interface module (1);
Described LVDS video clock data syn-chronization detection module (7), for according to the delay distortion between each holding wire of described LVDS signal synchronism deviation range parameter detection received signal, produces LVDS signal synchronism deviation examining report and is sent to high-level interface module (1);
Described LVDS video demodulator module (8) for being RGB image pixel clock, rgb image data and RGB synchronizing signal according to LVDS transmission configuration parameter demodulating received signal, and is sent to LVDS image detection module (11);
Described LVDS video clock transfer sequence detection module (9), for detecting the LVDS video clock transmission bit sequence of Received signal strength according to LVDS clock transfer sequential parameter and LVDS signal source image time sequence parameter, produces LVDS video clock examining report and is sent to high-level interface module (1);
Described benchmark image signal generator module (10) is for being sent to LVDS view data detection module (11) according to described LVDS transmission configuration parameter by the benchmark image signal of input;
Described LVDS view data detection module (11) for by the RGB image pixel received from LVDS video demodulator module (8) clock, rgb image data and RGB synchronizing signal compared with the reference image data received from benchmark image signal generator module (10), then comparative result is produced view data Error detection report and synchronizing signal Error detection report be sent to high-level interface module (1).
9. LVDS vision signal automatic testing equipment according to claim 8, it is characterized in that: also comprise the LVDS Signal reception matching module (3) be connected with high-level interface module (1), LVDS signal transmission characteristics detection module (2), LVDS signal electrical characteristic sampling module (4), LVDS video clock data syn-chronization detection module (7) respectively, described LVDS Signal reception matching module (3) is for carrying out reception match control to the signal received.
10. LVDS vision signal automatic testing equipment according to claim 9, it is characterized in that: also comprise the electric Shaping Module of LVDS signal (6) be connected with LVDS Signal reception matching module (3) and LVDS video clock data syn-chronization detection module (7) respectively, the electric Shaping Module of described LVDS signal (6) is for carrying out shaping operation to the signal received.
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| CN105491373A (en) * | 2015-12-05 | 2016-04-13 | 武汉精测电子技术股份有限公司 | Device and method for switching LVDS video signals from one way to multiple ways |
| CN106126380A (en) * | 2016-06-21 | 2016-11-16 | 福州瑞芯微电子股份有限公司 | A kind of LVDS interface method of testing based on FPGA and system |
| CN106157859A (en) * | 2016-09-27 | 2016-11-23 | 京东方科技集团股份有限公司 | For detecting the method and device of Low Voltage Differential Signal |
| CN106373511A (en) * | 2016-09-07 | 2017-02-01 | 广州视源电子科技股份有限公司 | Multipath LVDS clock line detection method and system |
| CN110299975A (en) * | 2019-06-28 | 2019-10-01 | 苏州浪潮智能科技有限公司 | A kind of the verifying system and equipment of fpga chip interconnection parallel interface |
| CN111263138A (en) * | 2018-12-03 | 2020-06-09 | 中国科学院沈阳自动化研究所 | LVDS digital video fault automatic detection system and implementation method thereof |
| CN112422954A (en) * | 2020-10-23 | 2021-02-26 | 中国科学院西安光学精密机械研究所 | LVDS video acquisition, detection and transmission system and method |
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| CN106373511B (en) * | 2016-09-07 | 2019-03-26 | 广州视源电子科技股份有限公司 | Multichannel LVDS clock line detection method and system |
| CN106157859A (en) * | 2016-09-27 | 2016-11-23 | 京东方科技集团股份有限公司 | For detecting the method and device of Low Voltage Differential Signal |
| US10705140B2 (en) | 2016-09-27 | 2020-07-07 | Boe Technology Group Co., Ltd. | Method and device for detecting low voltage differential signal |
| CN111263138A (en) * | 2018-12-03 | 2020-06-09 | 中国科学院沈阳自动化研究所 | LVDS digital video fault automatic detection system and implementation method thereof |
| CN111263138B (en) * | 2018-12-03 | 2020-12-15 | 中国科学院沈阳自动化研究所 | LVDS digital video fault automatic detection system and implementation method thereof |
| CN110299975A (en) * | 2019-06-28 | 2019-10-01 | 苏州浪潮智能科技有限公司 | A kind of the verifying system and equipment of fpga chip interconnection parallel interface |
| CN112422954A (en) * | 2020-10-23 | 2021-02-26 | 中国科学院西安光学精密机械研究所 | LVDS video acquisition, detection and transmission system and method |
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