CN104938040A - Component-embedded substrate and method for manufacturing same - Google Patents

Component-embedded substrate and method for manufacturing same Download PDF

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Publication number
CN104938040A
CN104938040A CN201380070770.7A CN201380070770A CN104938040A CN 104938040 A CN104938040 A CN 104938040A CN 201380070770 A CN201380070770 A CN 201380070770A CN 104938040 A CN104938040 A CN 104938040A
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China
Prior art keywords
path
insulator
outside
mentioned
built
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Granted
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CN201380070770.7A
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Chinese (zh)
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CN104938040B (en
Inventor
关保明
长田知之
户田光昭
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Meiko Electronics Co Ltd
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Meiko Electronics Co Ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
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    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
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    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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    • H05K1/113—Via provided in pad; Pad over filled via
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    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
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    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A component-embedded substrate (20), provided with: an insulation layer (12) including an insulation resin material; an electric or electronic component (4) embedded in the insulation layer (12); terminals (15) representing electrodes of the component (4); a conductor pattern (18) formed on the surface of the insulation layer (12); and conducting vias (21) for electrically connecting the conductor pattern (18) and the terminals (15) to each other. Each of the conducting vias (21) is formed from, in sequence from the conductor pattern (18) to the terminal (15), a large-diameter section (21a) having a large diameter and a small-diameter section (21b) having a smaller diameter than the large-diameter section (21a). A step section (17) is formed between the large-diameter section (21a) and the small-diameter section (21b). The large-diameter section (21a) is formed so as to penetrate a sheet-shaped glass cloth (11) disposed in the insulation layer (12).

Description

Be built-in with substrate and the manufacture method thereof of part
Technical field
The present invention relates to a kind of substrate (Japanese: component Nei KURA substrate) and the manufacture method thereof that are built-in with part.
Background technology
A kind of substrate being built-in with part is described in patent documentation 1.As described in Patent Document 1, to become on the conductive layer of conductive pattern by the part of electric or electronics is loaded in, and this conductive layer is embedded in the insulating barrier of prepreg (Japanese: プ リ プ レ グ) etc., form the substrate being built-in with part.When burying part underground, make part pass this part part by the hole of the perforate prepreg (Japanese: hole あ I プ リ プ レ グ) that hollows out and perforate core (Japanese: hole あ I コ ア material), the lid formula prepreg not forming hole is stacked in the top of above described holes to carry out punching press.Carry out stacked after, form hole, the i.e. path (Japanese: PVC ア) that arrive the electrode terminal had to part, and plating carried out to the inside of this path, or do not form path and realized the conducting of terminal and conductive pattern by scolding tin.
The formation of this path generally adopts and utilizes CO 2laser carries out the method for processing.In laser processing, time, often set power, pulse duration and injection number etc. as required.
On the other hand, when hope realizes conducting on the two sides (top and bottom) of part, on the face of opposition side, also form the path arriving part terminal.In addition, the conducting that plating realizes part terminal and conductive pattern is implemented to this path.
Prior art document
Patent documentation
Patent documentation 1: Japanese Patent Laid No. 4874305 publication
Summary of the invention
Invent technical problem to be solved
But the upside of part exists lid formula prepreg, this lid formula prepreg as mentioned above from the viewpoint of stacked fold and flatness or intensity, and does not form the hole passed for part.Thus, when forming path, need the glass cross be present in lid formula prepreg is run through.When carrying out stacked, owing to being provided with space between lid formula prepreg and part front, therefore, lid formula prepreg is sagging at this part place, and glass cross is also correspondingly near part front.In the laser processing for making above-mentioned glass cross run through, being difficult to the control carrying out glass cross, if the close together of glass cross and part, then there is the possibility of part of damage itself.
The present invention considers above-mentioned prior art and does, even if its object is to provide a kind of when being formed with the path run through for glass cross, also can not add in the formation of path the substrate being built-in with part and manufacture method thereof that make man-hour part sustain damage.
The technical scheme that technical solution problem adopts
To achieve these goals, in the present invention, provide a kind of substrate being built-in with part, it is characterized in that, comprising: insulating barrier, above-mentioned insulating barrier comprises dielectric resin material; Electrically or the part of electronics, electrically or the above-mentioned part of electronics be embedded in this insulating barrier; Terminal, the electrode that above-mentioned terminal has as above-mentioned part; Conductive pattern, above-mentioned conductive pattern is formed on the surface of above-mentioned insulating barrier; And conduction path, above-mentioned conduction path is by above-mentioned conductive pattern and the electrical connection of above-mentioned terminal, above-mentioned conduction path is formed from above-mentioned conductive pattern towards above-mentioned terminal by the large-diameter portion in large footpath with than the minor diameter part of this large-diameter portion path, between above-mentioned large-diameter portion and above-mentioned minor diameter part, be formed with stage portion, above-mentioned large-diameter portion is by running through the glass cross of the sheet be configured in above-mentioned insulating barrier and being formed.
In addition, in the present invention, a kind of manufacture method being built-in with the substrate of part is provided, it is characterized in that, comprising: load operation, in above-mentioned loading operation, metal film is pasted onto and has on the support plate of rigidity, and part that is electric or electronics is loaded on above-mentioned metal film; Coating operation, in above-mentioned coating operation, makes above-mentioned part through being pre-formed with in the above-mentioned through hole of perforate insulator of the through hole run through for above-mentioned part, and the atresia insulator being built-in with the glass cross of sheet is configured in the position of closed above-mentioned through hole; Lamination process, in above-mentioned lamination process, forms insulating barrier by above-mentioned perforate insulator and above-mentioned atresia insulator are mutually pressed and heated, and is embedded in above-mentioned insulating barrier by above-mentioned part; Path formation process, in above-mentioned path formation process, forms the path arriving the terminal that above-mentioned part has from the outside of above-mentioned insulating barrier; And pattern formation process, in above-mentioned pattern formation process, form conductive pattern on the surface of above-mentioned insulating barrier, and in above-mentioned path, fill the electric conductor be used for above-mentioned conductive pattern and the electrical connection of above-mentioned terminal, form conduction path,
In above-mentioned coating operation, by the liquid with mobility and there is rigidity rigid body to form above-mentioned perforate insulator, the thickness of above-mentioned liquid is 30% ~ 90% of the thickness of above-mentioned perforate insulator, in above-mentioned path formation process, when after the large footpath path defining the large footpath run through for above-mentioned glass cross, in the path of above-mentioned large footpath, form stage portion, and formed arrive above-mentioned terminal, than the path path of above-mentioned large footpath path path.
It is desirable that in above-mentioned path formation process, glass etching process is utilized to be removed by the above-mentioned glass cross be projected in above-mentioned path.
It is desirable that in above-mentioned coating operation, adopting the melting of above-mentioned atresia insulator to start temperature and the melting of above-mentioned perforate insulator, to start temperature identical or start the high material of temperature than the melting of above-mentioned perforate insulator.
It is desirable that by the Position Control of above-mentioned glass cross between 40% ~ 90% of the thickness of the insulator of above-mentioned perforate insulator and above-mentioned atresia.
It is desirable to, after above-mentioned pattern formation process, also carry out outside lamination process, in the lamination process of above-mentioned outside, from the outside of above-mentioned conductive pattern, the outside insulator pressing that is made up of dielectric resin material is stacked, form multilager base plate, in the lamination process of above-mentioned outside, by be applied to the above-mentioned conduction path that is made up of above-mentioned large footpath path and above-mentioned path path each on pressure be set to below 50gf.
It is desirable to, after above-mentioned pattern formation process, also carry out outside lamination process, in the lamination process of above-mentioned outside, from the outside of above-mentioned conductive pattern, the outside insulator pressing that is made up of dielectric resin material is stacked, form multilager base plate, the thickness of above-mentioned large footpath path and above-mentioned path path is less than 15% of the thickness of above-mentioned multilager base plate.
It is desirable to, after above-mentioned pattern formation process, also carry out outside lamination process, in the lamination process of above-mentioned outside, from the outside of above-mentioned conductive pattern, the outside insulator pressing that is made up of dielectric resin material is stacked, form multilager base plate, the thickness of the above-mentioned terminal arrived by above-mentioned path path is set to more than 12 μm.
Invention effect
According to the present invention, arrange large-diameter portion and minor diameter part in conduction path, large-diameter portion runs through for glass cross.This large-diameter portion and minor diameter part are formed as large footpath path and path path when forming path.Thus, the perforate processing for running through glass cross and the perforate processing for arriving terminal can be carried out respectively under optimum conditions.By arranging stage portion between above-mentioned large footpath path and path path, glass cross can be prevented to be projected into (particularly in path path) in path.Thus, when implement plating when forming conduction path time, plating thing can be made reliably to be attached on whole of path inwall.
On the other hand, if the thickness of liquid to be set to 30% ~ 90% of the thickness of perforate insulator, then, in lamination process, first liquid enters in through hole, therefore, it is possible to prevent atresia insulator from hanging down in through hole.Thus, glass cross to be prevented in lamination process near part, and the processing that run through by glass cross can be carried out in the position away from part.Therefore, can prevent from being formed at path adding man-hour part and sustaining damage.
In addition, by being removed by the glass cross be projected in path with glass etching process, thus plating thing can be made further to become reliable to the attachment in path.
In addition, by adopt make the melting of atresia insulator start temperature and the melting of perforate insulator to start temperature identical or start the high material of temperature than the melting of perforate insulator, thus can in lamination process, reliably make perforate insulator flow in through hole at first.Therefore, it is possible to prevent atresia insulator sagging.
Accompanying drawing explanation
Fig. 1 is in order to the schematic diagram that the manufacture method being built-in with the substrate of part of the present invention is described.
Fig. 2 is in order to the schematic diagram that the manufacture method being built-in with the substrate of part of the present invention is described.
Fig. 3 is in order to the schematic diagram that the manufacture method being built-in with the substrate of part of the present invention is described.
Fig. 4 is in order to the schematic diagram that the manufacture method being built-in with the substrate of part of the present invention is described.
Fig. 5 is in order to the schematic diagram that the manufacture method being built-in with the substrate of part of the present invention is described.
Fig. 6 is in order to the schematic diagram that the manufacture method being built-in with the substrate of part of the present invention is described.
Fig. 7 is the detail view be described path formation process.
Fig. 8 is the detail view be described path formation process.
Fig. 9 is the schematic diagram of the example representing multilager base plate.
Embodiment
First, the manufacture method being built-in with the substrate of part of the present invention is described.
As shown in Figures 1 and 2, loading operation is carried out.First, as shown in Figure 1, metal film 2 is pasted onto has on the support plate 1 of rigidity.Metal film 2 is the components that will become conductive pattern subsequently.Support plate 1 adopts the plate of the rigidity with required degree in process conditions.Such as, formed by SUS (stainless steel) plate or the aluminium sheet etc. with rigidity.When support plate 1 is SUS plate, metal film 2 can be formed by making copper facing separate out, when support plate 1 is aluminium sheet, metal film 2 can be formed by copper foil.Then, as shown in Figure 2, by the such as mode such as distributor or printing, the bonding agent 3 be made up of insulating material is coated on metal film 2.Part 4 that is electric or electronics is loaded on above-mentioned bonding agent 3.In addition, also can adopt scolding tin on metal film 2, carry out the loading of part 4.In this example, two faces of part 4 are formed with the terminal 5,15 as electrode.
Then, as shown in Figure 3, coating operation (Japanese: レ イ ア ッ プ engineering) is carried out.First perforate insulator 6 is prepared.By the liquid 7 with mobility and rigid body 8 overlap with rigidity are formed above-mentioned perforate insulator 6.Liquid 7 is prepregs.Rigid body 8 is so-called core (without cladding materials (Japaneses: ア Application Network ラ ッ De (unclad) material)), and it is by being placed in the metallic plate of multilayer printed circuit board inside as core or forming figuratum plywood is formed.The through hole 9 inserted for part 4 is formed in above-mentioned liquid 7 and rigid body 8.Drill bit, router (Japanese: ル ー タ) and mould etc. are used to form above-mentioned through hole 9.In figure 3, show a slice rigid body 8 is clipped in the perforate insulator 6 of stacked formation in two panels liquid 7.Part 4 is inserted in the through hole 9 of this perforate insulator 6.Then, atresia insulator 10 is layered in again on above-mentioned perforate insulator 6, to close above-mentioned through hole 9.Above-mentioned atresia insulator 10 is also prepreg.Owing to being prepreg, therefore, in atresia insulator 10, be built-in with the glass cross 11 of sheet.Glass cross 11 is the cloth become with the silk weaving of glass fibre.In addition, atresia insulator 10 with the face of part 4 opposite side on be configured with another metal film 13.This metal film 13 also becomes conductive pattern.In addition, the thickness of liquid 7 is set as 30% ~ 90% of the thickness of perforate insulator 6.
Then, as shown in Figure 4, lamination process is carried out.This lamination process is that perforate insulator 6 and atresia insulator 10 are pressed heating mutually, thus forms insulating barrier 12, and part 4 is embedded in the operation in this insulating barrier 12.By heating, the atresia insulator 10 be made up of prepreg is flowed while become to be integrated with liquid 7, enter in through hole 9.Now, owing to there is rigid body 8, therefore when having carried out pressing, can suitably bury part 4 underground.In addition, in above-mentioned coating operation, if use the melting of atresia insulator 10 to start temperature start the high material of temperature than the melting of perforate insulator 6 (particularly liquid 7), then liquid 7 can be reliably made first to flow in through hole 9 and prevent the sagging of atresia insulator 10.Remove support plate 1 subsequently.Now, by the Position Control of glass cross 11 between 40% ~ 90% of the thickness of perforate insulator 6 and atresia insulator 10.
After completing lamination process, the glass cross 11 be configured in the insulator 10 of atresia is made to keep the state parallel with rigid body 8 with metal film 2.That is, even if make the insulator 10 of atresia that melting occurs because of heating, glass cross 11 also can not hang down in through hole 9.This is due in above-mentioned coating operation, the thickness of liquid 7 is set as 30% ~ 90% of the thickness of perforate insulator 6.In addition, the upper thickness limit of liquid 7 being set to 90% is consider that the thickness of rigid body 8 is at least more than 10% of atresia insulator 10.By such setting, in lamination process, first liquid 7 enters in through hole 9.The liquid 7 pairs of atresia insulators 10 entered in this through hole 9 support, and prevent the atresia insulator 10 comprising glass cross 11 sagging.Therefore, glass cross 11 can be prevented in lamination process near part 4.By this, when can form the large footpath path 14a for glass cross 11 is through in ensuing path formation process, perforate processing is carried out in the position away from part 4.Thus, can prevent from being formed and adding man-hour part and sustain damage carrying out path.It is desirable that glass cross 11 preferably separates 30 μm ~ more than 70 μm with part 4.Inventor confirms by experiment when 30% of the thickness thickness of liquid 7 being set smaller than perforate insulator 6, atresia insulator 10 and then to be that glass cross 11 can occur sagging.
Then, as shown in Figure 5, path formation process is carried out.This operation forms the operation arriving the path 14,16 of the terminal 5,15 that part 4 has from the outside of insulating barrier 12.Utilize common laser processing to be formed the path 16 arrived to the terminal 5 of bonding agent 3 side.Path 14 between the terminal 15 of arrival and bonding agent 3 opposite side is formed in the following way.First, as shown in Figure 7, formed and glass cross 11 run through and does not arrive the large footpath path 14a in the large footpath to part 4.This large footpath path 14a less needs the precision of working depth, therefore, also can utilize CO 2laser is formed, but also can use the high frequency lasers such as UV-YAG or excimers (Japanese: エ キ シ マ (excimer)).Such as when using UV-YAG, beam modality be gaussian model (Japanese: ガ ウ シ ア Application), power is 2.6W, injection number is carry out under the condition of three times.The degree of depth of large footpath path 14a is such as 50 μm ~ 100 μm.
After the large footpath path 14a of formation, when glass cross 11 is projected in large footpath path 14a, it is desirable to utilize glass etching process to remove this glass cross 11.By this, can, to when implementing plating in path 14 in subsequent handling, plating thing be made to become reliable to the attachment in path 14.
Then, as shown in Figure 8, the path path 14b than large footpath path 14a path is formed.When forming this path path 14b, in order to not injuring part 4, it is desirable to the high frequency lasers that service precision is high.Such as when utilizing UV-YAG to carry out, beam modality be contracting top-mould type (Japanese: ト ッ プ Ha ッ ト), power is 0.1W ~ 0.4W, injection number carries out under being the condition of five times ~ ten times.In addition, the inwall of large footpath path 14a and path path 14b is formed across stage portion 17.By arranging stage portion 17 like this between large footpath path 14a and path path 14b, even if such as make glass cross 11 be positioned on the face of stage portion 17 because forming large footpath path 14a, glass cross 11 also can be prevented to be projected into (particularly in path path 14b) in path 14.Therefore, can, to when implementing plating in path 14 in subsequent handling, plating thing be reliably attached on whole of the inwall of path 14.The aperture of large footpath path 14a is such as 80 μm ~ 150 μm, and the aperture of path path 14b is in the scope less than large footpath path 14a, is 50 μm ~ 100 μm.
Like this, in the present invention, when when part 4 with load side face opposite side face on realize conducting, utilize across the large footpath path 14a of stage portion 17 and path path 14b to form above-mentioned path 14.Thus, the perforate processing (the perforate processing of large footpath path 14a) for being run through by glass cross 11 and the perforate processing (the perforate processing of path path 14b) for arriving terminal 15 can be carried out respectively under optimum conditions.
Then, as shown in Figure 6, pattern formation process is carried out.This operation is being filled into by electric conductor 19 in path 14,16, forms conductive pattern 18, and utilize the operation that terminal 5,15 is electrically connected with conductive pattern 18 by electric conductor 19 on the surface of insulating barrier 12.Specifically, as required the plating such as electroless copper or electro-coppering is carried out to path 14,16 enforcement scrubbing (Japanese: デ ス ミ ア) or half-etching process, make the precipitation of plating thing in path 14,16 and electric conductor 19 is filled in path 14,16.Then, by carrying out etch processes to the metal film 2,13 in two faces being configured in insulating barrier 12, conductive pattern 18 is formed.
The substrate 20 being built-in with part made as mentioned above comprises insulating barrier 12, part 4, conductive pattern 18 and conduction path 21.Insulating barrier 12 comprises the prepreg (liquid in perforate insulator 6 and atresia insulator 10) as dielectric resin material.Part 4 is electric or the part of electronics, and is embedded in insulating barrier 12.In addition, part 4 can be driven part, also can be active parts.This part 4 is formed the terminal 5,15 as electrode.Be formed with conductive pattern 18 on the surface of insulating barrier 12 and be used as circuit pattern.Conductive pattern 18 is electrically connected with terminal 5,15 by conduction path 21.Particularly, being formed from conductive pattern 18 towards terminal 15 by the large-diameter portion 21a in large footpath with than the minor diameter part 21b of this large-diameter portion 21a path with the conduction path 21 on the terminal 15 of loading surface side opposite side of part 4 is connected to.Large-diameter portion 21a is by running through the glass cross 11 of the sheet be configured in insulating barrier 12 and being formed.In addition, between large-diameter portion 21a and minor diameter part 21b, stage portion 17 is formed with.
As shown in Figure 9, also can after carrying out pattern formation process, then to carry out from outside, by outside lamination process stacked for outside insulator 22, forming so-called multilager base plate 25.In this case, after the insulator 22 of stacked outside, form path 23, realize conductive pattern 18 and the conducting of conductive pattern 24 on surface being formed in outside insulator 22.Form conduction path 26 by implementing electroplating processes to the path 23 be formed between conductive pattern 18 and conductive pattern 24, thus above-mentioned conducting can be realized.The implementation of this conducting is identical with above-mentioned example.Outside insulator 22 uses prepreg in the same manner as above-mentioned atresia insulator 10.
At this, it is desirable that in the lamination process of outside, by be applied to the conduction path 21 that is made up of large footpath path 14a and path path 14b each on pressure be set to below 50gf.In addition, it is desirable that the thickness of large footpath path 14a and path path 14b is less than 15% of the thickness of multilager base plate 25.In addition, it is desirable that the thickness of the terminal 15 arrived by path path 14b is set to more than 12 μm (thickness of multilager base plate 400 μm).
By such setting, can prevent in the outside lamination process when forming multilager base plate 25, at terminal 15, place cracks.Inventor confirms, by reducing to be applied to the pressure in the conduction path 21 that is made up of large footpath path 14a and path path 14b, just can prevent this crackle.Thus, pressure when reducing stacked can be considered or improve via density or increase passage diameters or be formed as there is no the path of filled conductive body 19 to relax stress.In addition, also can consider that the thickness by reducing path 14 realizes the dispersion of stress.In addition, the thickness of electrode that it is also conceivable to by increasing terminal 15 makes stress dispersion.
(symbol description)
1 support plate
2 metal films
3 bonding agents
4 electrically or the part of electronics
5 terminals
6 perforate insulators
7 liquids
8 rigid bodies
9 through holes
10 atresia insulators
11 glass crosses
12 insulating barriers
13 metal films
14 paths
14a large footpath path
14b path path
15 terminals
16 paths
17 stage portion
18 conductive patterns
19 electric conductors
20 substrates being built-in with part
21 conduction path
21a large-diameter portion
21b minor diameter part
Insulator outside 22
23 paths
24 conductive patterns
25 multilager base plates
26 conduction path.

Claims (8)

1. be built-in with a substrate for part, it is characterized in that, comprising:
Insulating barrier, described insulating barrier comprises dielectric resin material;
Electrically or the part of electronics, electrically or the described part of electronics be embedded in described insulating barrier;
Terminal, the electrode that described terminal has as described part;
Conductive pattern, described conductive pattern is formed on the surface of described insulating barrier; And
Conduction path, described conductive pattern and described terminal are electrically connected by described conduction path,
Described conduction path is formed from described conductive pattern towards described terminal by the large-diameter portion in large footpath with than the minor diameter part of this large-diameter portion path,
Stage portion is formed between described large-diameter portion and described minor diameter part,
Described large-diameter portion is by running through the glass cross of the sheet be configured in described insulating barrier and being formed.
2. be built-in with a manufacture method for the substrate of part, it is characterized in that, comprising:
Load operation, in described loading operation, metal film is pasted onto and has on the support plate of rigidity, and part that is electric or electronics is loaded on described metal film;
Coating operation, in described coating operation, makes described part through being pre-formed with in the described through hole of perforate insulator of the through hole run through for described part, and the atresia insulator being built-in with the glass cross of sheet is configured in the position of closed described through hole;
Lamination process, in described lamination process, forms insulating barrier by described perforate insulator and described atresia insulator are mutually pressed and heated, and is embedded in described insulating barrier by described part;
Path formation process, in described path formation process, forms the path arriving the terminal that described part has from the outside of described insulating barrier; And
Pattern formation process, in described pattern formation process, forms conductive pattern on the surface of described insulating barrier, and in described path, fill the electric conductor be used for described conductive pattern and the electrical connection of described terminal, forms conduction path,
In described coating operation, by the liquid with mobility and there is rigidity rigid body to form described perforate insulator, the thickness of described liquid is 30% ~ 90% of the thickness of described perforate insulator,
In described path formation process, when after the large footpath path defining the large footpath run through for described glass cross, in the path of described large footpath, form stage portion, and formed arrive described terminal, than the path path of described large footpath path path.
3. be built-in with the manufacture method of the substrate of part as claimed in claim 2, it is characterized in that,
In described path formation process, glass etching process is utilized to be removed by the described glass cross be projected in described path.
4. be built-in with the manufacture method of the substrate of part as claimed in claim 2, it is characterized in that,
In described coating operation, adopting the melting of described atresia insulator to start temperature and the melting of described perforate insulator, to start temperature identical or start the high material of temperature than the melting of described perforate insulator.
5. be built-in with the manufacture method of the substrate of part as claimed in claim 2, it is characterized in that,
By the Position Control of described glass cross between 40% ~ 90% of the thickness of described perforate insulator and described atresia insulator.
6. be built-in with the manufacture method of the substrate of part as claimed in claim 2, it is characterized in that,
After described pattern formation process, also carry out outside lamination process, in the lamination process of described outside, from the outside of described conductive pattern, the outside insulator pressing that is made up of dielectric resin material is stacked, form multilager base plate,
In the lamination process of described outside, by be applied to the described conduction path that is made up of described large footpath path and described path path each on pressure be set to below 50gf.
7. be built-in with the manufacture method of the substrate of part as claimed in claim 2, it is characterized in that,
After described pattern formation process, also carry out outside lamination process, in the lamination process of described outside, from the outside of described conductive pattern, the outside insulator pressing that is made up of dielectric resin material is stacked, form multilager base plate,
The thickness of described large footpath path and described path path is less than 15% of the thickness of described multilager base plate.
8. be built-in with the manufacture method of the substrate of part as claimed in claim 2, it is characterized in that,
After described pattern formation process, also carry out outside lamination process, in the lamination process of described outside, from the outside of described conductive pattern, the outside insulator pressing that is made up of dielectric resin material is stacked, form multilager base plate,
The thickness of the described terminal arrived by described path path is set to more than 12 μm.
CN201380070770.7A 2013-01-18 2013-01-18 It is built-in with the substrate and its manufacture method of part Expired - Fee Related CN104938040B (en)

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US20150327369A1 (en) 2015-11-12

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