CN113873786A - Circuit board processing method and circuit board - Google Patents

Circuit board processing method and circuit board Download PDF

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Publication number
CN113873786A
CN113873786A CN202010623428.7A CN202010623428A CN113873786A CN 113873786 A CN113873786 A CN 113873786A CN 202010623428 A CN202010623428 A CN 202010623428A CN 113873786 A CN113873786 A CN 113873786A
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China
Prior art keywords
surface copper
target surface
copper
base material
hole
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CN202010623428.7A
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Chinese (zh)
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CN113873786B (en
Inventor
杨之诚
王亮
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Shennan Circuit Co Ltd
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Shennan Circuit Co Ltd
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Priority to CN202010623428.7A priority Critical patent/CN113873786B/en
Publication of CN113873786A publication Critical patent/CN113873786A/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The application discloses processing method of circuit board and circuit board, wherein the processing method of circuit board includes: providing at least two target surface copper and at least one base material, laminating after respectively arranging the target surface copper and the base material at intervals in a laminated manner, and ensuring that the outermost layer is the target surface copper; drilling a first through hole on at least two laminated target surface copper and at least one substrate, and electroplating the first through hole; filling the first through hole with a metal paste; respectively laminating at least one surface copper and at least one base material at intervals after the at least one surface copper and the at least one base material are arranged on one side of at least two target surface copper and at least one base material after lamination, and ensuring that two sides of each base material are both surface copper or target surface copper; and drilling a pin blind hole on the first through hole filled with the metal slurry to obtain the circuit board. By means of the mode, the circuit board product with the pin blind holes of any thickness-diameter ratio can be manufactured.

Description

Circuit board processing method and circuit board
Technical Field
The present disclosure relates to the field of circuit board processing technologies, and in particular, to a circuit board processing method and a circuit board.
Background
Nowadays, a Printed Circuit Board (PCB) product is manufactured to form a pin blind hole, which is usually realized by drilling a hole through an outer layer depth control hole and electroplating, that is, the blind hole is firstly processed by controlling the depth of the drilled hole according to the depth or level requirement of the product requirement, and then a layer of metal is plated on the side wall and the bottom of the blind hole through electroplating liquid medicine, so as to realize connection of corresponding electrical properties in the PCB product.
However, the above-mentioned process is limited by the deep plating capability of the electroplating solution, and can only process the PCB product with the ratio of the thickness to the diameter of the blind hole being less than or equal to 0.8:1, and when the ratio of the thickness to the diameter of the blind hole being more than 0.8:1 is required, the process is difficult to be implemented.
Disclosure of Invention
The application provides a processing method of a circuit board and the circuit board, which aim to solve the problem that a PCB product with a large blind hole thickness cannot be manufactured in the prior art.
In order to solve the technical problem, the application adopts a technical scheme that: provided is a processing method of a circuit board, wherein the processing method of the circuit board comprises the following steps: providing at least two target surface copper and at least one base material, laminating after respectively arranging the target surface copper and the base material at intervals in a laminated manner, and ensuring that the outermost layer is the target surface copper; drilling a first through hole on at least two laminated target surface copper and at least one substrate, and electroplating the first through hole; filling the first through hole with a metal paste; respectively laminating at least one surface copper and at least one base material at intervals after the at least one surface copper and the at least one base material are arranged on one side of at least two target surface copper and at least one base material after lamination, and ensuring that two sides of each base material are both surface copper or target surface copper; and drilling a pin blind hole on the first through hole filled with the metal slurry to obtain the circuit board.
Wherein, provide at least two target face copper and at least one substrate to respectively after interval stromatolite sets up, carry out the lamination to guarantee that the outmost layer is the step of target face copper and include: providing at least two target surface copper and at least one base material, and carrying out circuit pattern manufacturing on the target surface copper which is pre-laminated and arranged in the at least two target surface copper and the inner layer of the at least one base material; and laminating after respectively stacking at least two target surface copper and at least one base material at intervals, and ensuring that the outermost layer is the target surface copper.
Wherein, after the step of filling the first through-hole with the metal paste, laminating at least one surface copper and at least one substrate respectively at intervals after one side of at least two target surface copper and at least one substrate after laminating, and before the step of ensuring that both sides of each substrate are surface copper or target surface copper, the method further comprises: carrying out circuit pattern manufacturing on at least two laminated target surface copper and at least one target surface copper on the outermost layer of the base material; and carrying out circuit pattern manufacturing on the copper of each surface in the at least one surface, the at least one base material, the laminated at least two target surface copper and the laminated inner layer of the at least one base material.
Wherein, with at least one face copper and at least one substrate interval stromatolite respectively set up and carry out the lamination behind one side of two at least target face copper and at least one substrate after the lamination to after the step of guaranteeing that the both sides of each substrate are face copper or target face copper, drill the contact pin blind hole on filling the first through-hole of metal thick liquids, in order to obtain before the step of circuit board, still include: and drilling a second through hole at preset positions on the at least one laminated copper surface, the at least two target copper surfaces and the at least two base materials, and electroplating the second through hole.
Drilling a first through hole on at least two laminated target surface copper and at least one base material, and electroplating the first through hole, wherein the step of electroplating the first through hole comprises the following steps: and drilling a first through hole on at least two laminated target surface copper and at least one base material by a drill bit which is at least 0.2mm larger than the diameter of the pin blind hole, and electroplating the first through hole.
Wherein, it includes to bore the contact pin blind hole on the first through-hole that is filled with metal paste to the step of obtaining the circuit board: and drilling a pin blind hole on the first through hole filled with the metal slurry, and ensuring that the depth of the pin blind hole is at least 0.1mm smaller than that of the first through hole so as to obtain the circuit board.
Wherein, provide at least two target face copper and at least one substrate to respectively after interval stromatolite sets up, carry out the lamination to guarantee that the outmost layer is the step of target face copper and include: providing at least two target surface copper, at least one base material and at least four prepregs, respectively arranging each base material and the corresponding two target surface copper at intervals in a laminated mode through the two prepregs, and ensuring that the outermost layer is the target surface copper.
In order to solve the above technical problem, the present application adopts another technical solution: provided is a circuit board, wherein the circuit board includes: the circuit board comprises at least three patterned surface copper layers and at least two base materials, wherein the patterned surface copper layers are arranged at intervals in a laminated mode, blind holes are formed in the circuit board, and the bottoms of the blind holes are flush with one side, away from the blind holes, of the patterned surface copper layer of one inner layer; the copper electroplating layer is arranged on the inner wall of the blind hole; the metal copper layer, the metal copper layer is including the first metal copper layer and the second metal copper layer that link up each other and be integrative structure, and wherein, first metal copper layer sets up on the copper layer of electroplating, and the second metal copper layer sets up on the bottom of blind hole.
Wherein the sum of the thicknesses of the electroplated copper layer and the first metal copper layer is more than 0.1 mm.
Wherein the thickness of the second metallic copper layer is more than 0.1 mm.
The beneficial effect of this application is: different from the situation of the prior art, the processing method of the circuit board in the application comprises the steps of respectively stacking at least two target surface copper and at least one base material at intervals, laminating, and ensuring that the outermost layer is the target surface copper, drilling a first through hole on the at least two target surface copper and the at least one base material after lamination, electroplating the first through hole, filling the first through hole with metal slurry, respectively stacking at least one surface copper and at least one base material at intervals on one side of the at least two target surface copper and the at least one base material after lamination, laminating, and ensuring that both sides of each base material are the surface copper or the target surface copper, further drilling a pin blind hole on the first through hole filled with the metal slurry, so that the pin blind hole can be drilled by laminating the target surface copper and the base material on which the pin blind hole is pre-manufactured, so as to drill the through hole and plug the metal hole, and then drilling the pin blind hole after laminating with the other part of the surface copper and the base material, the circuit board product with any thickness-diameter ratio can be manufactured and formed by the pin blind holes.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without inventive efforts, wherein:
FIG. 1 is a schematic flow chart of a first embodiment of a method for processing a circuit board according to the present application;
FIG. 2 is a schematic flow chart of a second embodiment of the circuit board processing method of the present application;
FIGS. 3 a-3 i are schematic structural diagrams of an embodiment corresponding to S21-S29 in FIG. 2
Fig. 4 is a schematic structural diagram of an embodiment of a circuit board according to the present application.
Detailed Description
In order to make the technical problems solved, the technical solutions adopted, and the technical effects achieved by the present application clearer, the technical solutions of the embodiments of the present application will be further described in detail below with reference to the accompanying drawings.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Referring to fig. 1, fig. 1 is a schematic flow chart illustrating a first embodiment of a method for processing a circuit board according to the present application. The embodiment comprises the following steps:
s11: providing at least two target surface copper and at least one base material, laminating after respectively arranging at intervals and laminating, and ensuring that the outermost layer is the target surface copper.
Specifically, after at least two target surface copper and at least one circuit board substrate are obtained, the obtained at least two target surface copper and at least one substrate are respectively arranged in a laminated manner at intervals, that is, after both sides of each substrate are ensured to be laminated by the target surface copper and the outermost layer is also laminated by the target surface copper, laminating is performed.
In another embodiment, at least two target surface copper, at least one substrate and at least four prepregs are provided, so that two prepregs are adhered to two sides of each substrate to be further stacked with the corresponding two target surface copper at intervals respectively, and the outermost layer is ensured to be the target surface copper, that is, a prepreg is stacked between each substrate and the corresponding target surface copper, so that the substrate and the target surface copper can be laminated more reliably and tightly.
S12: and drilling a first through hole on the at least two laminated target surface copper and the at least one substrate, and electroplating the first through hole.
Further, drilling a first through hole at a preset position on the at least two target surface copper and the at least one substrate after lamination, and further electroplating the first through hole. The preset position is a corresponding position where a pin blind hole is formed on a circuit board of a final finished product in advance.
S13: the first via hole is filled with a metal paste.
Specifically, after the first through hole is drilled on at least two laminated target surface copper and at least one base material and electroplated, the first through hole is further filled with metal slurry with conductive performance and is fully filled, namely, the first through hole is subjected to metal hole plugging, and the metal slurry filled into the first through hole is ensured to be flush with the outer surface of the outermost target surface copper and have no recess.
S14: and respectively laminating at least one surface copper and at least one base material at intervals after the at least one surface copper and the at least one base material are arranged on one side of at least two target surface copper and at least one base material after lamination, and ensuring that two sides of each base material are both surface copper or target surface copper.
And further, taking at least one surface copper and at least one base material, respectively laminating at intervals on any one side of at least two target surface copper and at least one base material after laminating and metal hole plugging, and then laminating again, wherein two sides of each base material are both the surface copper or the target surface copper, and the outermost layer is also the surface copper or the target surface copper.
In another embodiment, two prepregs are adhered to two sides of each substrate to further laminate with two corresponding target surface copper or surface copper at intervals, and the outermost layer is ensured to be the target surface copper or surface copper, that is, a prepreg is laminated between each substrate and the corresponding target surface copper or surface copper, so that the substrate and the target surface copper or surface copper can be laminated more reliably and tightly.
S15: and drilling a pin blind hole on the first through hole filled with the metal slurry to obtain the circuit board.
After the target surface copper, the base material and the surface copper which are subjected to the metal plug hole and lamination treatment are obtained, a pin blind hole is further drilled at the position of the first through hole filled with the metal slurry, so that a circuit board into which a test probe or a device pin can be inserted is obtained, and the test probe or the device pin can realize corresponding network connection through the metal slurry and electroplated copper in the circuit board.
It can be understood that after the target surface copper and the corresponding base material in the circuit board which is prepared by pin blind holes are laminated and laminated, through drilling the through hole to electroplate and plug the hole with metal, the circuit board can be further laminated with other surface copper and the base material without drilling depth control hole again, and because the electroplated copper and the metal slurry are prepared and formed in the corresponding blind holes, the blind holes do not need to be electroplated, therefore, the circuit board product with pin blind holes of any thickness-diameter ratio can be effectively prepared by reasonably setting the quantity of the target surface copper, the base material and the surface copper in the circuit board.
Different from the situation of the prior art, the processing method of the circuit board in the application comprises the steps of respectively stacking at least two target surface copper and at least one base material at intervals, laminating, and ensuring that the outermost layer is the target surface copper, drilling a first through hole on the at least two target surface copper and the at least one base material after lamination, electroplating the first through hole, filling the first through hole with metal slurry, respectively stacking at least one surface copper and at least one base material at intervals on one side of the at least two target surface copper and the at least one base material after lamination, laminating, and ensuring that both sides of each base material are the surface copper or the target surface copper, further drilling a pin blind hole on the first through hole filled with the metal slurry, so that the pin blind hole can be drilled by laminating the target surface copper and the base material on which the pin blind hole is pre-manufactured, so as to drill the through hole and plug the metal hole, and then drilling the pin blind hole after laminating with the other part of the surface copper and the base material, the circuit board product with any thickness-diameter ratio can be manufactured and formed by the pin blind holes.
Referring to fig. 2 and fig. 3a to 3i, fig. 2 is a schematic flow chart of a second embodiment of a processing method of a circuit board of the present application, and fig. 3a to 3i are schematic structural diagrams of an embodiment corresponding to S21 to S29 in fig. 2. The embodiment comprises the following steps:
s21: providing at least two target surface copper and at least one base material, and carrying out circuit pattern manufacturing on the target surface copper which is pre-laminated and arranged in the at least two target surface copper and the inner layer of the at least one base material.
Specifically, after obtaining at least two target surface copper layers and at least one circuit board substrate, all the target surface copper layers pre-laminated in the at least two target surface copper layers and at least one substrate inner layer, that is, all the target surface copper layers except the target surface copper layers pre-laminated in the outermost layer, are selected, and pattern etching of a preset circuit is performed on each target surface copper layer.
In the embodiment, the surface copper is set to be 31, 32, 33, 34, 35, 36, and the base material is 41, 42, 43, 44, 45, respectively, and the surface copper 31, 32, 33, 34 in which pin blind holes are pre-formed is used as the target surface copper for convenience of description, taking the number of the surface copper in the final finished circuit board as 6 and the corresponding base material as 5 as an example, as shown in fig. 3a and 3 i. After the target surface copper 32, 33 and the base material 41 are obtained, the target surface copper 32, 33 is first subjected to circuit pattern formation.
It is understood that, in other embodiments, the number of the surface copper for forming the circuit board and the corresponding target surface copper and the number of the base material may be other numbers, which are not described herein and in the subsequent steps.
S22: and laminating after respectively stacking at least two target surface copper and at least one base material at intervals, and ensuring that the outermost layer is the target surface copper.
Specifically, as shown in fig. 3a and 3b, after the target surface copper 32, 33 is patterned, the target surface copper 31, 32, 33, 34 and the base material 41, 42, 43 are stacked at intervals, and further laminated.
S23: and drilling a first through hole on at least two laminated target surface copper and at least one base material by a drill bit which is at least 0.2mm larger than the diameter of the pin blind hole, and electroplating the first through hole.
Further, as shown in fig. 3c and 3d, a drill bit with a diameter at least 0.2mm larger than the diameter of the blind hole of the predetermined pin is used, for example, a drill bit with any reasonable diameter such as 0.25mm, 0.3mm or 0.35mm larger than the diameter of the blind hole of the predetermined pin is used to drill a first through hole at a predetermined position of the laminated target surface copper 31, 32, 33, 34 and the base material 41, 42, 43, so as to prevent deviation when the corresponding surface copper and the base material are aligned again, and the first through hole is electroplated to form the first copper plated layer 51.
S24: the first via hole is filled with a metal paste.
Specifically, as shown in fig. 3e, after the first through hole is electroplated to form the first electroplated copper layer 51, the first through hole is further filled with a metal paste 61 having conductive properties and filled with the first through hole.
S25: and carrying out circuit pattern manufacturing on the at least two laminated target surface copper and the target surface copper on the outermost layer of the at least one base material.
Further, as shown in fig. 3e, the target surface copper 31, 32, 33, 34 and the outermost target surface copper 31, 34 of the base materials 41, 42, 43 are subjected to wiring pattern formation after lamination and metal via-filling.
S26: and carrying out circuit pattern manufacturing on the copper of each surface in the at least one surface, the at least one base material, the laminated at least two target surface copper and the laminated inner layer of the at least one base material.
Specifically, as shown in fig. 3f, the surface copper 35 in the inner layer of the surface copper 35, 36 and the base material 44, 45, and the laminated target surface copper 31, 32, 33, 34 and the base material 41, 42, 43 is subjected to wiring formation.
S27: and respectively laminating at least one surface copper and at least one base material at intervals after the at least one surface copper and the at least one base material are arranged on one side of at least two target surface copper and at least one base material after lamination, and ensuring that two sides of each base material are both surface copper or target surface copper.
Specifically, as shown in fig. 3f, the surface copper 35, 36 and the base material 44, 45 are further laminated on one side of the laminated target surface copper 31, 32, 33, 34 and the base material 41, 42, 43 at intervals, and then laminated again.
S28: and drilling a second through hole at preset positions on the at least one laminated copper surface, the at least two target copper surfaces and the at least two base materials, and electroplating the second through hole.
Specifically, as shown in fig. 3f and 3h, second through holes are further drilled at predetermined positions of the target surface copper 31, 32, 33, 34 and the base materials 41, 42, 43 and the surface copper 35, 36, the base materials 44, 45 after lamination, and the second through holes are electroplated to make and form a second copper electroplating layer 52.
S29: and drilling a pin blind hole on the first through hole filled with the metal slurry, and ensuring that the depth of the pin blind hole is at least 0.1mm smaller than that of the first through hole so as to obtain the circuit board.
Specifically, as shown in fig. 3i, a pin blind hole is further drilled in the first through hole filled with the metal paste 61, and it is ensured that the depth of the pin blind hole is at least 0.1mm smaller than the depth of the first through hole, for example, it is ensured that the depth of the pin blind hole is at least 0.15mm, 0.2mm, or 0.25mm smaller than the depth of the first through hole, and any reasonable length is such as 0.15mm, 0.2mm, or 0.25mm, so as to ensure that the bottom of the pin blind hole includes the metal paste 61 with a thickness greater than 0.1mm, thereby obtaining a finished circuit board.
Based on the general inventive concept, the present application further provides a circuit board, please refer to fig. 4, and fig. 4 is a schematic structural diagram of an embodiment of the circuit board of the present application. In the present embodiment, the circuit board 7 includes: at least three patterned surface copper 71 and at least two base materials 72 which are arranged in a spaced and laminated mode.
For example, the circuit board includes 6 patterned surface copper 71 and 5 base materials 72 stacked at intervals, as shown in fig. 4, a blind hole is disposed on the circuit board 7, and a bottom of the blind hole is flush with a side of the patterned surface copper 71 of one of the inner layers away from the blind hole. And a copper electroplating layer 73 is further disposed on the inner wall of the blind via, and a copper metal layer 74 is further disposed on the copper electroplating layer 73 and the bottom of the blind via, wherein the copper metal layer 74 specifically includes a first copper metal layer 741 and a second copper metal layer 742 which are integrally connected to each other, and the first copper metal layer 741 is disposed on the copper electroplating layer 73, and the second copper metal layer 742 is disposed on the bottom of the blind via.
Optionally, the sum of the thicknesses of the electroplated copper layer 73 and the first metallic copper layer 741 is not less than 0.1mm, so that when a test probe or a device pin is inserted into the blind hole in the following, the electrical connection between the test probe or the device pin and the corresponding patterned surface copper 71 can be effectively realized.
Optionally, the thickness of the second metallic copper layer 742 is not less than 0.1 mm.
It is understood that, in other embodiments, the number of the patterned surface copper 71 and the substrate 72 disposed in a stacked manner may be other numbers, so as to be able to fabricate the circuit board 7 with blind vias having any thickness-to-diameter ratio, which is not limited in the present application.
Different from the situation of the prior art, the processing method of the circuit board in the application comprises the steps of respectively stacking at least two target surface copper and at least one base material at intervals, laminating, and ensuring that the outermost layer is the target surface copper, drilling a first through hole on the at least two target surface copper and the at least one base material after lamination, electroplating the first through hole, filling the first through hole with metal slurry, respectively stacking at least one surface copper and at least one base material at intervals on one side of the at least two target surface copper and the at least one base material after lamination, laminating, and ensuring that both sides of each base material are the surface copper or the target surface copper, further drilling a pin blind hole on the first through hole filled with the metal slurry, so that the pin blind hole can be drilled by laminating the target surface copper and the base material on which the pin blind hole is pre-manufactured, so as to drill the through hole and plug the metal hole, and then drilling the pin blind hole after laminating with the other part of the surface copper and the base material, the circuit board product with any thickness-diameter ratio can be manufactured and formed by the pin blind holes.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings, or which are directly or indirectly applied to other related technical fields, are intended to be included within the scope of the present application.

Claims (10)

1. A processing method of a circuit board is characterized by comprising the following steps:
providing at least two target surface copper and at least one base material, laminating after respectively arranging at intervals in a laminated manner, and ensuring that the outermost layer is the target surface copper;
drilling a first through hole on at least two target surface copper and at least one substrate after lamination, and electroplating the first through hole;
filling the first via hole with a metal paste;
respectively laminating at least one surface copper and at least one base material at intervals after the laminated at least two target surface copper and one side of at least one base material are laminated, and ensuring that both sides of each base material are the surface copper or the target surface copper;
and drilling a pin blind hole on the first through hole filled with the metal slurry to obtain the circuit board.
2. The method of claim 1, wherein the step of providing at least two target surface copper layers and at least one substrate, laminating the target surface copper layers after the at least two substrate layers are separately stacked, and ensuring that the outermost layer is the target surface copper layer comprises:
providing at least two target surface copper layers and at least one base material, and carrying out circuit pattern manufacturing on the target surface copper layers which are pre-laminated and arranged in the at least two target surface copper layers and the inner layer of the at least one base material;
and laminating after respectively stacking at least two target surface copper and at least one base material at intervals, and ensuring that the outermost layer is the target surface copper.
3. The method for processing a circuit board according to claim 2, wherein after the step of filling the first through hole with the metal paste, the step of laminating the at least one surface copper and the at least one base material after respectively disposing the at least one surface copper and the at least one base material in a spaced-apart and stacked manner on one side of the at least two target surface copper and the at least one base material after lamination, and before the step of ensuring that both sides of each base material are the surface copper or the target surface copper, further comprises:
carrying out circuit pattern manufacturing on at least two laminated target surface copper and at least one target surface copper on the outermost layer of the base material;
and carrying out circuit pattern manufacturing on each surface copper in at least one surface copper, at least one base material, at least two target surface copper and at least one base material inner layer which are pre-laminated and arranged on the at least one surface copper.
4. The method according to claim 1, wherein after the step of laminating at least one surface copper and at least one substrate at intervals on one side of at least two target surface copper and at least one substrate after lamination and ensuring that both sides of each substrate are the surface copper or the target surface copper, the step of drilling the pin blind via on the first through hole filled with the metal paste to obtain the circuit board further comprises:
and drilling a second through hole at a preset position on at least one laminated surface copper, at least two laminated target surface copper and at least two laminated base materials, and electroplating the second through hole.
5. The method of claim 1, wherein drilling a first via hole in at least two of the target surface copper and at least one of the substrates after lamination and electroplating the first via hole comprises:
and drilling the first through holes on at least two laminated target surface copper and at least one substrate through a drill bit with the diameter at least 0.2mm larger than that of the pin blind hole, and electroplating the first through holes.
6. The method for processing a circuit board according to claim 1, wherein the step of drilling a pin blind hole in the first through hole filled with the metal paste to obtain the circuit board comprises:
drilling a pin blind hole in the first through hole filled with the metal slurry, and ensuring that the depth of the pin blind hole is at least 0.1mm smaller than that of the first through hole so as to obtain the circuit board.
7. The method of claim 1, wherein the step of providing at least two target surface copper layers and at least one substrate, laminating the target surface copper layers after the at least two substrate layers are separately stacked, and ensuring that the outermost layer is the target surface copper layer comprises:
providing at least two target surface copper, at least one base material and at least four prepregs, respectively arranging each base material and the corresponding two target surface copper at intervals in a laminated mode through the two prepregs, and ensuring that the outermost layer is the target surface copper.
8. A circuit board, comprising:
the circuit board comprises at least three patterned surface copper layers and at least two base materials, wherein the patterned surface copper layers are arranged at intervals in a laminated mode, blind holes are formed in the circuit board, and the bottoms of the blind holes are flush with one side, away from the blind holes, of the patterned surface copper layer of one inner layer;
the copper electroplating layer is arranged on the inner wall of the blind hole;
the blind hole comprises a blind hole, a metal copper layer and a second metal copper layer, wherein the blind hole is formed in the blind hole, the metal copper layer comprises a first metal copper layer and a second metal copper layer which are mutually communicated to form an integral structure, the first metal copper layer is arranged on the electroplated copper layer, and the second metal copper layer is arranged on the bottom of the blind hole.
9. The circuit board of claim 8,
the sum of the thicknesses of the electroplated copper layer and the first metal copper layer is not less than 0.1 mm.
10. The circuit board of claim 8,
the thickness of the second metal copper layer is not less than 0.1 mm.
CN202010623428.7A 2020-06-30 2020-06-30 Circuit board processing method and circuit board Active CN113873786B (en)

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Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08242077A (en) * 1995-02-17 1996-09-17 Internatl Business Mach Corp <Ibm> Multilayer printed board,and its manufacture
CN101790289A (en) * 2009-06-10 2010-07-28 华为技术有限公司 PCB with interconnected blind holes and processing method thereof
CN102340933A (en) * 2010-07-23 2012-02-01 富葵精密组件(深圳)有限公司 Manufacturing method of circuit board
CN102510683A (en) * 2008-06-05 2012-06-20 欣兴电子股份有限公司 Method for manufacturing circuit board
CN102858087A (en) * 2012-08-27 2013-01-02 吴祖 Blind-hole-conduction double-sided circuit board and processing method thereof
CN102958288A (en) * 2011-08-21 2013-03-06 深南电路有限公司 Printed circuit board drilling method
CN103906360A (en) * 2012-12-28 2014-07-02 富葵精密组件(深圳)有限公司 Flexible circuit board and manufacturing method thereof
CN103929878A (en) * 2014-04-09 2014-07-16 中国科学院微电子研究所 Method for manufacturing PCB substrate plug hole and structure of PCB substrate plug hole
CN104349609A (en) * 2013-08-08 2015-02-11 北大方正集团有限公司 Printed circuit board and manufacturing method thereof
CN104378931A (en) * 2014-11-21 2015-02-25 江门崇达电路技术有限公司 Method for manufacturing metallized counterbore in PCB
CN106332444A (en) * 2015-06-30 2017-01-11 富葵精密组件(深圳)有限公司 Circuit board and fabrication method thereof
CN108235601A (en) * 2017-12-04 2018-06-29 深南电路股份有限公司 PCB intersects method for processing blind hole and with the PCB for intersecting blind hole
JP6446155B1 (en) * 2018-07-17 2018-12-26 株式会社日立パワーソリューションズ Double-sided circuit non-oxide ceramic substrate and manufacturing method thereof

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08242077A (en) * 1995-02-17 1996-09-17 Internatl Business Mach Corp <Ibm> Multilayer printed board,and its manufacture
CN102510683A (en) * 2008-06-05 2012-06-20 欣兴电子股份有限公司 Method for manufacturing circuit board
CN101790289A (en) * 2009-06-10 2010-07-28 华为技术有限公司 PCB with interconnected blind holes and processing method thereof
CN102340933A (en) * 2010-07-23 2012-02-01 富葵精密组件(深圳)有限公司 Manufacturing method of circuit board
CN102958288A (en) * 2011-08-21 2013-03-06 深南电路有限公司 Printed circuit board drilling method
CN102858087A (en) * 2012-08-27 2013-01-02 吴祖 Blind-hole-conduction double-sided circuit board and processing method thereof
CN103906360A (en) * 2012-12-28 2014-07-02 富葵精密组件(深圳)有限公司 Flexible circuit board and manufacturing method thereof
CN104349609A (en) * 2013-08-08 2015-02-11 北大方正集团有限公司 Printed circuit board and manufacturing method thereof
CN103929878A (en) * 2014-04-09 2014-07-16 中国科学院微电子研究所 Method for manufacturing PCB substrate plug hole and structure of PCB substrate plug hole
CN104378931A (en) * 2014-11-21 2015-02-25 江门崇达电路技术有限公司 Method for manufacturing metallized counterbore in PCB
CN106332444A (en) * 2015-06-30 2017-01-11 富葵精密组件(深圳)有限公司 Circuit board and fabrication method thereof
CN108235601A (en) * 2017-12-04 2018-06-29 深南电路股份有限公司 PCB intersects method for processing blind hole and with the PCB for intersecting blind hole
JP6446155B1 (en) * 2018-07-17 2018-12-26 株式会社日立パワーソリューションズ Double-sided circuit non-oxide ceramic substrate and manufacturing method thereof

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