CN113873786B - Circuit board processing method and circuit board - Google Patents
Circuit board processing method and circuit board Download PDFInfo
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- CN113873786B CN113873786B CN202010623428.7A CN202010623428A CN113873786B CN 113873786 B CN113873786 B CN 113873786B CN 202010623428 A CN202010623428 A CN 202010623428A CN 113873786 B CN113873786 B CN 113873786B
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- surface copper
- target surface
- base material
- circuit board
- hole
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- 238000003672 processing method Methods 0.000 title claims abstract description 12
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 218
- 229910052802 copper Inorganic materials 0.000 claims abstract description 218
- 239000010949 copper Substances 0.000 claims abstract description 218
- 239000000758 substrate Substances 0.000 claims abstract description 68
- 239000000463 material Substances 0.000 claims abstract description 59
- 239000002184 metal Substances 0.000 claims abstract description 52
- 229910052751 metal Inorganic materials 0.000 claims abstract description 52
- 238000003475 lamination Methods 0.000 claims abstract description 45
- 238000005553 drilling Methods 0.000 claims abstract description 27
- 238000010030 laminating Methods 0.000 claims abstract description 24
- 238000009713 electroplating Methods 0.000 claims abstract description 19
- 239000002002 slurry Substances 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 239000000047 product Substances 0.000 description 10
- 239000000523 sample Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 150000001879 copper Chemical class 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The application discloses a processing method of a circuit board and the circuit board, wherein the processing method of the circuit board comprises the following steps: providing at least two target surface copper and at least one base material, respectively laminating at intervals, and ensuring that the outermost layer is the target surface copper; drilling first through holes on at least two target surface copper and at least one base material after lamination, and electroplating the first through holes; filling the first through hole with metal paste; laminating at least one surface copper and at least one substrate after being respectively arranged on one side of at least two target surface copper and at least one substrate after lamination in a spaced lamination way, and ensuring that both sides of each substrate are surface copper or target surface copper; and drilling a pin blind hole on the first through hole filled with the metal slurry to obtain the circuit board. Through the mode, the circuit board product with the pin blind holes being any thickness-diameter ratio can be manufactured.
Description
Technical Field
The application relates to the technical field of circuit board processing technology, in particular to a circuit board processing method and a circuit board.
Background
Nowadays, pin blind holes are manufactured and formed on PCB (Printed Circuit Board ) products, which are usually realized by means of outer layer depth-control drilling and electroplating, namely, firstly, blind holes are processed by controlling the depth of drilling according to the depth or level requirements of the products, and then, the side wall and the bottom of the blind holes are plated with a layer of metal by electroplating liquid medicine, so that the connection of the corresponding electrical properties in the PCB products is realized.
However, the above process is limited by the deep plating capability of the electroplating chemical water, so that PCB products with the thickness-to-diameter ratio of blind holes less than or equal to 0.8:1 can be processed, and when PCB products with the thickness-to-diameter ratio of blind holes more than or equal to 0.8:1 are required, the process is difficult to realize.
Disclosure of Invention
The application provides a processing method of a circuit board and the circuit board, which are used for solving the problem that a PCB product with a larger blind hole thickness diameter cannot be manufactured in the prior art.
In order to solve the technical problems, one technical scheme adopted by the application is as follows: the processing method of the circuit board comprises the following steps: providing at least two target surface copper and at least one base material, respectively laminating at intervals, and ensuring that the outermost layer is the target surface copper; drilling first through holes on at least two target surface copper and at least one base material after lamination, and electroplating the first through holes; filling the first through hole with metal paste; laminating at least one surface copper and at least one substrate after being respectively arranged on one side of at least two target surface copper and at least one substrate after lamination in a spaced lamination way, and ensuring that both sides of each substrate are surface copper or target surface copper; and drilling a pin blind hole on the first through hole filled with the metal slurry to obtain the circuit board.
Wherein, providing at least two target surface copper and at least one base material, laminating after being respectively arranged at intervals, and ensuring the outermost layer as the target surface copper comprises the following steps: providing at least two target surface copper and at least one base material, and carrying out circuit pattern manufacture on the target surface copper which is pre-laminated and arranged in the at least two target surface copper and at least one base material inner layer; and respectively laminating at least two target surface copper and at least one base material at intervals, and then laminating, wherein the outermost layer is ensured to be the target surface copper.
After the step of filling the first through hole with the metal paste, at least one surface copper and at least one substrate are respectively laminated at intervals on one side of the at least two target surface copper and one side of the at least one substrate after lamination, and before the step of ensuring that both sides of each substrate are surface copper or target surface copper, the method further comprises the steps of: carrying out circuit pattern manufacture on at least two target surface copper layers and at least one target surface copper layer of the outermost layer of the base material after lamination; and carrying out circuit pattern manufacture on each copper surface of the pre-laminated copper surface, the at least one base material, at least two target copper surfaces after lamination and at least one base material inner layer.
After the step of laminating at least one surface copper and at least one substrate at intervals on at least two target surface copper and one side of the at least one substrate after lamination, and ensuring that both sides of each substrate are surface copper or target surface copper, drilling a pin blind hole on the first through hole filled with metal slurry to obtain a circuit board, the method further comprises the following steps: and drilling a second through hole at a preset position on the laminated at least one surface copper, at least two target surface copper and at least two base materials, and electroplating the second through hole.
Wherein, the step of drilling a first through hole on the laminated at least two target surface copper and at least one base material, and electroplating the first through hole comprises the following steps: and drilling a first through hole on the laminated at least two target surface copper and at least one base material by a drill bit with the diameter at least 0.2mm larger than the diameter of the pin blind hole, and electroplating the first through hole.
Wherein, the step of drilling the contact pin blind hole on the first through hole filled with the metal paste to obtain the circuit board comprises the following steps: and drilling a pin blind hole on the first through hole filled with the metal slurry, and ensuring that the depth of the pin blind hole is at least 0.1mm smaller than that of the first through hole so as to obtain the circuit board.
Wherein, providing at least two target surface copper and at least one base material, laminating after being respectively arranged at intervals, and ensuring the outermost layer as the target surface copper comprises the following steps: providing at least two target surface copper, at least one base material and at least four prepregs, respectively laminating each base material with the corresponding two target surface copper at intervals through the two prepregs, and ensuring that the outermost layer is the target surface copper.
In order to solve the technical problem, another technical scheme adopted by the application is as follows: provided is a circuit board, wherein the circuit board includes: the circuit board is provided with a blind hole, and the bottom of the blind hole is flush with one side of the patterned surface copper of one inner layer, which is far away from the blind hole; the electroplated copper layer is arranged on the inner wall of the blind hole; and the metal copper layer comprises a first metal copper layer and a second metal copper layer which are mutually communicated to form an integrated structure, wherein the first metal copper layer is arranged on the electroplated copper layer, and the second metal copper layer is arranged on the bottom of the blind hole.
Wherein the sum of the thicknesses of the electroplated copper layer and the first metallic copper layer is greater than 0.1mm.
Wherein the thickness of the second metallic copper layer is greater than 0.1mm.
The beneficial effects of this application are: in the processing method of the circuit board, after at least two target surface copper and at least one substrate are respectively arranged in a lamination mode at intervals, lamination is carried out, the outermost layer is guaranteed to be the target surface copper, a first through hole is drilled in the laminated at least two target surface copper and at least one substrate, the first through hole is electroplated, the first through hole is filled with metal paste, at least one surface copper and at least one substrate are respectively arranged on the laminated at least two target surface copper and one side of the at least one substrate in a lamination mode at intervals, lamination is carried out, and two sides of each substrate are respectively the surface copper or the target surface copper, so that pin blind holes are further drilled in the first through hole filled with the metal paste, the target surface copper and the substrate which are prefabricated into pin blind holes can be laminated firstly, the through holes are drilled and the metal holes are drilled, then the pin blind holes are drilled with the surface copper and the substrate which are laminated with other parts, and the pin blind holes can be manufactured, and a circuit board product with any thickness ratio of pin blind holes can be manufactured.
Drawings
For a clearer description of the technical solutions in the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art, wherein:
FIG. 1 is a schematic flow chart of a first embodiment of a method for processing a circuit board according to the present application;
FIG. 2 is a schematic flow chart of a second embodiment of a method for processing a circuit board according to the present application;
FIGS. 3 a-3 i are schematic structural views of an embodiment corresponding to S21-S29 in FIG. 2
Fig. 4 is a schematic structural diagram of an embodiment of a circuit board of the present application.
Detailed Description
In order to make the technical problems solved, the technical scheme adopted and the technical effects achieved by the application clearer, the technical scheme of the embodiment of the application will be described in further detail below with reference to the accompanying drawings.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
Referring to fig. 1, fig. 1 is a flow chart of a first embodiment of a method for processing a circuit board according to the present application. The embodiment comprises the following steps:
s11: providing at least two target surface copper and at least one base material, respectively laminating at intervals, and ensuring that the outermost layer is the target surface copper.
Specifically, after at least two target surface copper and at least one circuit board substrate are obtained, the obtained at least two target surface copper and at least one substrate are respectively laminated at intervals, namely, the target surface copper is ensured to be laminated on both sides of each substrate, and the outermost layer is also the target surface copper, and lamination is carried out after the lamination is carried out.
In another embodiment, at least two target surface copper, at least one substrate and at least four prepregs are provided, so that two sides of each substrate are respectively laminated with the corresponding two target surface copper by pasting the two prepregs, and the outermost layer is ensured to be the target surface copper, that is, one prepreg is laminated between each substrate and the corresponding target surface copper, so that the substrate and the target surface copper can be laminated more reliably and compactly.
S12: and drilling first through holes on the laminated at least two target surface copper and at least one substrate, and electroplating the first through holes.
Further, a first through hole is drilled at a preset position on the laminated at least two target surface copper and at least one substrate, and the first through hole is further electroplated. The preset position is a corresponding position where the pin blind hole is formed on the circuit board of the final product.
S13: the first via is filled with a metal paste.
Specifically, after drilling a first through hole on at least two target surface copper and at least one substrate after lamination and electroplating the first through hole, further filling the first through hole by using metal slurry with conductive performance, and filling the first through hole, namely, plugging the first through hole with metal, and ensuring that the metal slurry filled in the first through hole is finally flush with the outer surface of the outermost target surface copper without dishing.
S14: and respectively laminating at least one surface copper and at least one substrate at intervals on at least two target surface copper and one side of the at least one substrate after lamination, and ensuring that both sides of each substrate are surface copper or target surface copper.
Further, at least one surface copper and at least one base material are additionally taken, laminated at intervals respectively to be arranged on at least two target surface copper and any side of the at least one base material after lamination and metal hole plugging, lamination is carried out again, both sides of each base material are ensured to be surface copper or target surface copper, and the outermost layer is also surface copper or target surface copper.
In another embodiment, two prepregs are adhered to two sides of each substrate to be further laminated with two corresponding target surface copper or surface copper respectively at intervals, and the outermost layer is ensured to be the target surface copper or surface copper, that is, one prepreg is laminated between each substrate and the corresponding target surface copper or surface copper, so that the substrate and the target surface copper can be laminated more reliably and compactly.
S15: and drilling a pin blind hole on the first through hole filled with the metal slurry to obtain the circuit board.
After the target surface copper, the base material and the surface copper subjected to the metal plug hole and the lamination treatment are obtained, pin blind holes are further drilled at the positions of the first through holes filled with the metal paste, so that a circuit board capable of inserting test probes or device pins is obtained, and the test probes or device pins can be connected through corresponding networks through the metal paste and the electroplated copper in the circuit board.
It can be understood that, because the target surface copper and the corresponding base material in the circuit board which is pre-manufactured with the contact pin blind holes are arranged in a lamination way and laminated, through the through holes are drilled, electroplating and metal plugging holes are performed, after the circuit board is further laminated with other surface copper and the base material, the depth control drilling is not required again, and because the electroplating copper and the metal slurry are manufactured and formed in the corresponding blind holes, electroplating is not required for the blind holes, therefore, the circuit board product which forms the contact pin blind holes into any thickness-diameter ratio can be effectively manufactured by reasonably setting the quantity of the target surface copper, the base material and the surface copper in the circuit board.
In the processing method of the circuit board, after at least two target surface copper and at least one substrate are respectively arranged in a lamination mode at intervals, lamination is carried out, the outermost layer is guaranteed to be the target surface copper, a first through hole is drilled in the laminated at least two target surface copper and at least one substrate, the first through hole is electroplated, the first through hole is filled with metal paste, at least one surface copper and at least one substrate are respectively arranged on the laminated at least two target surface copper and one side of the at least one substrate in a lamination mode at intervals, lamination is carried out, and two sides of each substrate are respectively the surface copper or the target surface copper, so that pin blind holes are further drilled in the first through hole filled with the metal paste, the target surface copper and the substrate which are prefabricated into pin blind holes can be laminated firstly, the through holes are drilled and the metal holes are drilled, then the pin blind holes are drilled with the surface copper and the substrate which are laminated with other parts, and the pin blind holes can be manufactured, and a circuit board product with any thickness ratio of pin blind holes can be manufactured.
Referring to fig. 2 and fig. 3a to fig. 3i, fig. 2 is a schematic flow chart of a second example of the processing method of the circuit board of the present application, and fig. 3a to fig. 3i are schematic structural diagrams of an embodiment corresponding to S21 to S29 in fig. 2. The embodiment comprises the following steps:
s21: providing at least two target surface copper and at least one base material, and carrying out circuit pattern manufacture on the target surface copper which is arranged in the at least two target surface copper and at least one base material inner layer in a prestack mode.
Specifically, after at least two target surface copper and at least one circuit board substrate are obtained, all target surface copper which is preset and laminated in at least two target surface copper and at least one substrate inner layer, namely all target surface copper except target surface copper which is preset and laminated in the outermost layer, are selected first, so that pattern etching manufacturing of preset circuits is carried out on each target surface copper.
As shown in fig. 3a and 3i, the number of surface copper in the final circuit board is 6, and the number of corresponding base materials is 5, in this embodiment, the surface copper is set to be 31, 32, 33, 34, 35, 36, and the base materials are 41, 42, 43, 44, 45, respectively, and the surface copper 31, 32, 33, 34 in which the pin blind hole is prepared is set as the target surface copper for convenience of description. After the target surface copper 32, 33 and the base material 41 are obtained, first, the target surface copper 32, 33 is subjected to line pattern formation.
It is understood that in other embodiments, the number of the surface copper and the corresponding target surface copper and the substrate selected to be formed into the circuit board may be other numbers, and this application will not be repeated in this and subsequent steps.
S22: and respectively laminating at least two target surface copper and at least one base material at intervals, and then laminating, wherein the outermost layer is ensured to be the target surface copper.
Specifically, as shown in fig. 3a and 3b, after patterning the target surface copper 32, 33, the target surface copper 31, 32, 33, 34 and the base material 41, 42, 43 are respectively laminated with a gap therebetween, and further laminated.
S23: and drilling a first through hole on the laminated at least two target surface copper and at least one base material by a drill bit with the diameter at least 0.2mm larger than the diameter of the pin blind hole, and electroplating the first through hole.
Further, as shown in fig. 3c and 3d, a first through hole is drilled at a preset position of the target surface copper 31, 32, 33, 34 and the base material 41, 42, 43 after lamination by using a drill bit with at least 0.2mm larger than the diameter of the preset pin blind hole, for example, any reasonable diameter of 0.25mm, 0.3mm or 0.35mm larger than the diameter of the preset pin blind hole, so as to prevent deviation when the corresponding surface copper and the base material are aligned again, and the first through hole is electroplated to manufacture and form an electric first copper plating layer 51.
S24: the first via is filled with a metal paste.
Specifically, as shown in fig. 3e, after the first via hole is electroplated to form the first electroplated copper layer 51, the first via hole is further filled with a metal paste 61 having conductive properties and is filled with the first via hole.
S25: and (3) carrying out circuit pattern manufacture on the at least two target surface copper layers and at least one target surface copper layer of the outermost layer of the substrate after lamination.
Further, as shown in fig. 3e, circuit patterning is performed on the outermost target surface copper 31 and 34 among the target surface copper 31, 32, 33 and 34 and the base materials 41, 42 and 43 after the metal plug is laminated.
S26: and carrying out circuit pattern manufacture on each copper surface of the pre-laminated copper surface, the at least one base material, at least two target copper surfaces after lamination and at least one base material inner layer.
Specifically, as shown in fig. 3f, wiring is performed on the surface copper 35 provided in the inner layers of the surface copper 35, 36 and the base material 44, 45, and the target surface copper 31, 32, 33, 34 and the base material 41, 42, 43 after lamination.
S27: and respectively laminating at least one surface copper and at least one substrate at intervals on at least two target surface copper and one side of the at least one substrate after lamination, and ensuring that both sides of each substrate are surface copper or target surface copper.
Specifically, as shown in fig. 3f, the surface copper 35, 36 and the base material 44, 45 are further laminated on one side of the target surface copper 31, 32, 33, 34 and the base material 41, 42, 43 after lamination, respectively, and then laminated again.
S28: and drilling a second through hole at a preset position on the laminated at least one surface copper, at least two target surface copper and at least two base materials, and electroplating the second through hole.
Specifically, as shown in fig. 3f and 3h, a second through hole is further drilled at a predetermined position of the target surface copper 31, 32, 33, 34 and the substrates 41, 42, 43 and the surface copper 35, 36, the substrates 44, 45 after lamination, and the second through hole is electroplated to make and form a second electroplated copper layer 52.
S29: and drilling a pin blind hole on the first through hole filled with the metal slurry, and ensuring that the depth of the pin blind hole is at least 0.1mm smaller than that of the first through hole so as to obtain the circuit board.
Specifically, as shown in fig. 3i, a pin blind hole is further drilled on the first through hole filled with the metal paste 61, and the depth of the pin blind hole is ensured to be at least 0.1mm smaller than that of the first through hole, for example, the depth of the pin blind hole is ensured to be 0.15mm, 0.2mm or 0.25mm or any reasonable length, which is less than that of the first through hole, so as to ensure that the bottom of the pin blind hole comprises the metal paste 61 with the thickness of more than 0.1mm, thereby obtaining the finished circuit board.
Based on the general inventive concept, the present application further provides a circuit board, referring to fig. 4, fig. 4 is a schematic structural diagram of an embodiment of the circuit board of the present application. In the present embodiment, the circuit board 7 includes: at least three patterned surface copper 71 and at least two substrates 72 are provided in a spaced-apart stack.
For example, as shown in fig. 4, a blind hole is formed in the circuit board 7, and the bottom of the blind hole is flush with one side of the patterned surface copper 71 of one inner layer far away from the blind hole. The inner wall of the blind hole is further provided with an electroplated copper layer 73, and the metal copper layer 74 is further disposed on the electroplated copper layer 73 and the bottom of the blind hole, wherein the metal copper layer 74 specifically comprises a first metal copper layer 741 and a second metal copper layer 742 which are mutually communicated and are in an integrated structure, the first metal copper layer 741 is disposed on the electroplated copper layer 73, and the second metal copper layer 742 is disposed on the bottom of the blind hole.
Optionally, the sum of the thicknesses of the electroplated copper layer 73 and the first metallic copper layer 741 is not less than 0.1mm, so that electrical connection of the test probes or device pins with the corresponding patterned face copper 71 can be effectively achieved when the test probes or device pins are subsequently inserted into the blind holes.
Optionally, the thickness of the second metallic copper layer 742 is not less than 0.1mm.
It will be appreciated that in other embodiments, the number of patterned surface copper 71 and substrate 72 in the spacer stack may be other numbers to enable fabrication of a circuit board 7 having blind vias formed with any aspect ratio, which is not limited in this application.
In the processing method of the circuit board, after at least two target surface copper and at least one substrate are respectively arranged in a lamination mode at intervals, lamination is carried out, the outermost layer is guaranteed to be the target surface copper, a first through hole is drilled in the laminated at least two target surface copper and at least one substrate, the first through hole is electroplated, the first through hole is filled with metal paste, at least one surface copper and at least one substrate are respectively arranged on the laminated at least two target surface copper and one side of the at least one substrate in a lamination mode at intervals, lamination is carried out, and two sides of each substrate are respectively the surface copper or the target surface copper, so that pin blind holes are further drilled in the first through hole filled with the metal paste, the target surface copper and the substrate which are prefabricated into pin blind holes can be laminated firstly, the through holes are drilled and the metal holes are drilled, then the pin blind holes are drilled with the surface copper and the substrate which are laminated with other parts, and the pin blind holes can be manufactured, and a circuit board product with any thickness ratio of pin blind holes can be manufactured.
The foregoing description is only exemplary embodiments of the present application and is not intended to limit the scope of the present application, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present application, or direct or indirect application in other related technical fields are included in the scope of the present application.
Claims (7)
1. The processing method of the circuit board is characterized by comprising the following steps of:
providing at least two target surface copper and at least one base material, respectively laminating at intervals, and ensuring that the outermost layer is the target surface copper;
drilling first through holes on at least two target surface copper and at least one base material after lamination, and electroplating the first through holes;
filling the first through hole with metal paste;
laminating at least one surface copper and at least one substrate after being respectively arranged on one side of at least two target surface copper and at least one substrate after lamination in a spaced lamination mode, and ensuring that the two sides of each substrate are the surface copper or the target surface copper;
and drilling a pin blind hole on the first through hole filled with the metal paste to obtain the circuit board.
2. The method of claim 1, wherein the step of providing at least two target surface copper and at least one substrate, respectively, in a spaced-apart stack arrangement, and then laminating, and ensuring that the outermost layer is the target surface copper comprises:
providing at least two target surface copper and at least one base material, and carrying out circuit pattern manufacture on the target surface copper which is pre-laminated and arranged in at least two target surface copper and at least one base material inner layer;
and respectively laminating at least two target surface copper and at least one base material at intervals, and then laminating to ensure that the outermost layer is the target surface copper.
3. The method according to claim 2, wherein after the step of filling the first through hole with the metal paste, the step of laminating at least one surface copper and at least one base material separately and alternately on one side of at least two target surface copper and at least one base material after lamination, and ensuring that both sides of each base material are the surface copper or the target surface copper, further comprises:
carrying out circuit pattern manufacture on at least two target surface copper and at least one target surface copper of the outermost layer of the base material after lamination;
and carrying out circuit pattern manufacture on each surface copper which is pre-laminated and arranged in at least one surface copper, at least one substrate and at least two target surface copper and at least one substrate inner layer after lamination.
4. The method according to claim 1, wherein after the step of laminating at least one surface copper and at least one base material on one side of at least two target surface copper and at least one base material after lamination, respectively, and ensuring that both sides of each base material are the surface copper or the target surface copper, the step of drilling pin blind holes in the first through holes filled with the metal paste to obtain the circuit board is preceded by the step of:
and drilling second through holes at preset positions on at least one surface copper, at least two target surface copper and at least two base materials after lamination, and electroplating the second through holes.
5. The method of claim 1, wherein the steps of drilling a first via hole in the laminated at least two target surface copper and at least one of the substrates, and electroplating the first via hole comprise:
and drilling the first through holes on the laminated at least two target surface copper and at least one base material by a drill bit with the diameter at least 0.2mm larger than the diameter of the pin blind holes, and electroplating the first through holes.
6. The method of processing a circuit board according to claim 1, wherein the step of drilling a pin blind hole in the first through hole filled with the metal paste to obtain the circuit board comprises:
and drilling a pin blind hole on the first through hole filled with the metal slurry, and ensuring that the depth of the pin blind hole is at least 0.1mm smaller than that of the first through hole so as to obtain the circuit board.
7. The method of claim 1, wherein the step of providing at least two target surface copper and at least one substrate, respectively, in a spaced-apart stack arrangement, and then laminating, and ensuring that the outermost layer is the target surface copper comprises:
providing at least two target surface copper, at least one base material and at least four prepregs, respectively laminating each base material and the corresponding two target surface copper at intervals through the two prepregs, and ensuring that the outermost layer is the target surface copper.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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